/qemu/target/i386/tcg/ |
H A D | cc_helper_template.h.inc | 44 int cf, pf, af, zf, sf, of; 47 cf = dst < src1; 64 int cf, pf, af, zf, sf, of; 87 cf = src1 < src2; 130 cf = 0; 144 cf = src1; 160 cf = src1; 194 cf = src1 & 1; 211 cf = (src1 != 0); 216 of = cf * CC_O; [all …]
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H A D | int_helper.c | 221 int old_al, al, af, cf; in helper_aas() 225 cf = eflags & CC_C; in helper_aas() 234 if ((old_al > 0x99) || cf) { 248 int al, al1, af, cf; in helper_daa() 252 cf = eflags & CC_C; in helper_daa() 260 if (al < 6 || cf) { in helper_daa() 265 if ((al1 > 0x99) || cf) { in helper_das() 237 int old_al, al, af, cf; helper_daa() local 264 int al, al1, af, cf; helper_das() local
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/qemu/target/i386/hvf/ |
H A D | x86_emu.c | 870 bool cf; in do_bt() local 895 set_CF(env, cf); in do_bt() 909 set_CF(env, cf); in do_bt() 939 int of = 0, cf = 0; in exec_shl() local 956 of = cf ^ (res >> 7); in exec_shl() 961 SET_FLAGS_OxxxxC(env, of, cf); in exec_shl() 977 SET_FLAGS_OxxxxC(env, of, cf); in exec_shl() 988 SET_FLAGS_OxxxxC(env, of, cf); in exec_shl() 1186 int of = 0, cf = 0; in exec_rcl() local 1212 SET_FLAGS_OxxxxC(env, of, cf); in exec_rcl() [all …]
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/qemu/target/loongarch/ |
H A D | gdbstub.c | 21 ret |= (uint64_t)env->cf[i] << (i * 8); in read_fcc() 30 env->cf[i] = (val >> (i * 8)) & 1; in write_fcc() 93 return gdb_get_reg8(mem_buf, env->cf[n - 32]); in loongarch_gdb_get_fpu() 110 env->cf[n - 32] = ldub_p(mem_buf); in loongarch_gdb_set_fpu()
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H A D | machine.c | 42 VMSTATE_BOOL_ARRAY(env.cf, LoongArchCPU, 8),
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H A D | cpu.h | 287 bool cf[8]; member
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H A D | insns.decode | 39 &cf cd fj 88 @cf .... ........ ..... ..... fj:5 .. cd:3 &cf 419 movfr2cf 0000 00010001 01001 10100 ..... 00 ... @cf
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H A D | disas.c | 491 INSN(movfr2cf, cf) in INSN()
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/qemu/configs/targets/ |
H A D | m68k-softmmu.mak | 3 TARGET_XML_FILES= gdb-xml/cf-core.xml gdb-xml/cf-fp.xml gdb-xml/m68k-core.xml gdb-xml/m68k-fp.xml
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H A D | m68k-linux-user.mak | 5 TARGET_XML_FILES= gdb-xml/cf-core.xml gdb-xml/cf-fp.xml gdb-xml/m68k-core.xml gdb-xml/m68k-fp.xml
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/qemu/target/hppa/ |
H A D | translate.c | 785 if (cf & 1) { in do_cond() 828 if (cf & 1) { in do_sub_cond() 862 switch (cf) { in do_log_cond() 1145 if (a->cf) { in do_add_reg() 1160 if (a->cf) { in do_add_imm() 1242 if (a->cf) { in do_sub_reg() 1255 if (a->cf) { in do_sub_imm() 1304 if (cf) { in do_log() 1314 if (a->cf) { in do_log_reg() 2805 if (a->cf) { in trans_cmpclr() [all …]
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H A D | insns.decode | 73 &rr_cf_d t r cf d 75 &rrr_cf t r1 r2 cf 76 &rrr_cf_d t r1 r2 cf d 78 &rrr_cf_d_sh t r1 r2 cf d sh 80 &rri_cf t r i cf 81 &rri_cf_d t r i cf d 92 @rr_cf_d ...... r:5 ..... cf:4 ...... . t:5 &rr_cf_d d=%d_5 94 @rrr_cf ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf 95 @rrr_cf_d ...... r2:5 r1:5 cf:4 ...... . t:5 &rrr_cf_d d=%d_5 97 @rrr_cf_d_sh ...... r2:5 r1:5 cf:4 .... sh:2 . t:5 &rrr_cf_d_sh d=%d_5 [all …]
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/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_fmov.c.inc | 25 tcg_gen_ld8u_tl(cond, tcg_env, offsetof(CPULoongArchState, cf[a->ca])); 165 tcg_gen_st8_tl(t0, tcg_env, offsetof(CPULoongArchState, cf[a->cd & 0x7])); 181 offsetof(CPULoongArchState, cf[a->cj & 0x7])); 199 tcg_gen_st8_tl(t0, tcg_env, offsetof(CPULoongArchState, cf[a->cd & 0x7])); 213 offsetof(CPULoongArchState, cf[a->cj & 0x7]));
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H A D | trans_fcmp.c.inc | 46 tcg_gen_st8_tl(var, tcg_env, offsetof(CPULoongArchState, cf[a->cd])); 70 tcg_gen_st8_tl(var, tcg_env, offsetof(CPULoongArchState, cf[a->cd]));
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H A D | trans_branch.c.inc | 70 offsetof(CPULoongArchState, cf[a->cj]));
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H A D | trans_vec.c.inc | 4764 tcg_gen_st8_tl(t1, tcg_env, offsetof(CPULoongArchState, cf[a->cd & 0x7])); \ 4810 tcg_gen_st8_tl(t1, tcg_env, offsetof(CPULoongArchState, cf[a->cd & 0x7])); \
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/qemu/hw/ide/ |
H A D | meson.build | 5 system_ss.add(when: 'CONFIG_IDE_CF', if_true: files('cf.c'))
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/qemu/docs/specs/ |
H A D | standard-vga.rst | 54 ``01cf``
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/qemu/docs/devel/ |
H A D | decodetree.rst | 230 or 000010 rt2:5 r1:5 cf:4 001001 0 rt:5 233 When the *cf* field is zero, the instruction has no side effects,
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/qemu/target/loongarch/kvm/ |
H A D | kvm.c | 441 env->cf[i] = fpu.fcc & 0xFF; in kvm_loongarch_get_regs_fp() 461 fpu.fcc |= env->cf[i] << (8 * i); in kvm_loongarch_put_regs_fp()
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/qemu/target/i386/ |
H A D | ops_sse.h | 1605 uint64_t zf = 0, cf = 0; in glue() local 1610 cf |= (s->Q(i) & ~d->Q(i)); in glue() 1612 CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C); in glue() 2292 uint32_t zf = 0, cf = 0; in SSE_HELPER_L() local 2297 cf |= (s->L(i) & ~d->L(i)); in SSE_HELPER_L() 2299 CC_SRC = ((zf >> 31) ? 0 : CC_Z) | ((cf >> 31) ? 0 : CC_C); in SSE_HELPER_L() 2304 uint64_t zf = 0, cf = 0; in glue() local 2309 cf |= (s->Q(i) & ~d->Q(i)); in glue() 2311 CC_SRC = ((zf >> 63) ? 0 : CC_Z) | ((cf >> 63) ? 0 : CC_C); in glue()
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/qemu/ |
H A D | configure | 686 cf=$source_path/configs/devices/$device_arch-softmmu/$optarg.mak 687 if test -f "$cf"; then 691 error_exit "File $cf does not exist"
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/qemu/target/hexagon/idef-parser/ |
H A D | parser-helpers.c | 1615 HexValue cf = gen_tmp(c, locp, 64, UNSIGNED); in gen_carry_from_add() local 1621 OUT(c, locp, "tcg_gen_add2_i64(", &res, ", ", &cf, ", ", &op1_m, ", ", in gen_carry_from_add() 1624 OUT(c, locp, "tcg_gen_add2_i64(", &res, ", ", &cf, ", ", &res, ", ", &cf); in gen_carry_from_add() 1627 return cf; in gen_carry_from_add()
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/qemu/target/loongarch/tcg/ |
H A D | vec_helper.c | 3136 env->cf[cd & 0x7] = do_match2(0, Vj->D(0), Vj->D(1), MO); \ 3138 env->cf[cd & 0x7] = env->cf[cd & 0x7] || \ 3154 env->cf[cd & 0x7]= !do_match2(0, Vj->D(0), Vj->D(1), MO); \ in SETANYEQZ() 3156 env->cf[cd & 0x7] = env->cf[cd & 0x7] && \ in SETANYEQZ()
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/qemu/tcg/i386/ |
H A D | tcg-target.c.inc | 1334 tcg_target_long val, int cf) 1346 if (!cf) { 1369 * by this transformation, so do it only if cf == 0.
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