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/qemu/hw/net/
H A Dvirtio-net.c3551 static void virtio_net_handle_migration_primary(VirtIONet *n, MigrationEvent *e) in virtio_net_handle_migration_primary() argument
3563 if (e->type == MIG_EVENT_PRECOPY_SETUP && !should_be_hidden) { in virtio_net_handle_migration_primary()
3571 } else if (e->type == MIG_EVENT_PRECOPY_FAILED) { in virtio_net_handle_migration_primary()
3582 MigrationEvent *e, Error **errp) in virtio_net_migration_state_notifier() argument
3585 virtio_net_handle_migration_primary(n, e); in virtio_net_migration_state_notifier()
H A Dvhost_net.c361 int r, e, i, index_end = data_queue_pairs * 2; in vhost_net_start() local
429 e = k->set_guest_notifiers(qbus->parent, total_notifiers, false); in vhost_net_start()
430 if (e < 0) { in vhost_net_start()
431 fprintf(stderr, "vhost guest notifier cleanup failed: %d\n", e); in vhost_net_start()
/qemu/hw/display/
H A Dvirtio-gpu.c814 int e, v; in virtio_gpu_create_mapping_iov() local
839 for (e = 0, v = 0; e < nr_entries; e++) { in virtio_gpu_create_mapping_iov()
840 uint64_t a = le64_to_cpu(ents[e].addr); in virtio_gpu_create_mapping_iov()
841 uint32_t l = le32_to_cpu(ents[e].length); in virtio_gpu_create_mapping_iov()
852 " element %d\n", __func__, e); in virtio_gpu_create_mapping_iov()
/qemu/tests/qtest/
H A Dvirtio-9p-test.c95 static bool fs_dirents_contain_name(struct V9fsDirent *e, const char* name) in fs_dirents_contain_name() argument
97 for (; e; e = e->next) { in fs_dirents_contain_name()
98 if (!strcmp(e->name, name)) { in fs_dirents_contain_name()
/qemu/target/riscv/
H A Dvcrypto_helper.c515 uint64_t T1 = h + sum1_64(e) + ch(e, f, g) + W0; in vsha2c_64()
520 f = e; in vsha2c_64()
521 e = d + T1; in vsha2c_64()
527 T1 = h + sum1_64(e) + ch(e, f, g) + W1; in vsha2c_64()
531 f = e; in vsha2c_64()
532 e = d + T1; in vsha2c_64()
539 vd[1] = e; in vsha2c_64()
549 uint32_t T1 = h + sum1_32(e) + ch(e, f, g) + W0; in vsha2c_32()
554 f = e; in vsha2c_32()
561 T1 = h + sum1_32(e) + ch(e, f, g) + W1; in vsha2c_32()
[all …]
/qemu/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc103 * If LMUL < 0, i.e. fractional LMUL, any vector register is allowed.
393 * with a mask value (e.g., comparisons) or the scalar result
/qemu/target/hppa/
H A Dinsns.decode125 mfctl 000000 r:5 00000- e:1 -01000101 t:5
/qemu/qapi/
H A Dui.json957 '9', '0', 'minus', 'equal', 'backspace', 'tab', 'q', 'w', 'e',
1332 # graphical interfaces (e.g. VGA and virtual console character
H A Dvirtio.json477 # may not have their own device-specific features (e.g. virtio-rng).
H A Dcxl.json201 # locally detected errors (e.g. ECC failure) or poisoned writes
H A Debpf.json52 # applications (e.g. libvirt) may load it and pass file descriptors to
H A Dmisc.json21 # "@dbus-display" or the name of a character device (e.g. from
186 # only available during the preconfig state (i.e. when the --preconfig
H A Dnet.json603 # unique local address i.e. start with fd00::/8 and have length of
H A Dreplay.json72 # i.e. at instruction counts greater than the current one. The
H A Drun-state.json664 # or action-optional (e.g. a failure during memory scrub).
H A Dblock-core.json139 # @format: Extent type (e.g. FLAT or SPARSE)
1139 # (e.g. the host file for a qcow2 image). If there is no
1373 # target, i.e. same data and new writes are done synchronously to
1770 # i.e., writes data between 'top' and 'base' into 'base'.
2248 # @persistent: the bitmap is persistent, i.e. it will be saved to the
2411 # still be set after the merge, i.e., this operation does not clear
2790 # whichever exists) child (i.e., base at the beginning of the job)
3551 # should be issued when a snapshot operation (e.g. deleting a
4006 # @path: path to the NVMe namespace's character device (e.g.
4021 # @path: path to the PCI device's sysfs directory (e.g.
[all …]
H A Dblock.json26 # tracks across all heads (i.e. cylinders*heads<131072), otherwise
H A Dstats.json190 # (e.g., for each vCPU).
215 # @exponent together form a SI prefix (e.g., _nano-_ for
216 # ``base=10`` and ``exponent=-9``) or IEC binary prefix (e.g.
265 # providers that source statistics externally, e.g. from Linux.
/qemu/linux-user/
H A Dstrace.c1531 print_enums(const struct enums *e, abi_long enum_arg, int last) in print_enums() argument
1533 for (; e->e_string != NULL; e++) { in print_enums()
1534 if (e->e_value == enum_arg) { in print_enums()
1535 qemu_log("%s", e->e_string); in print_enums()
1540 if (e->e_string == NULL) { in print_enums()
/qemu/hw/nvme/
H A Dctrl.c479 NvmeFdpEvent *e = NULL; in nvme_update_ruh() local
494 e->type = FDP_EVT_RU_NOT_FULLY_WRITTEN; in nvme_update_ruh()
495 e->flags = FDPEF_PIV | FDPEF_NSIDV | FDPEF_LV; in nvme_update_ruh()
496 e->pid = cpu_to_le16(pid); in nvme_update_ruh()
497 e->nsid = cpu_to_le32(ns->params.nsid); in nvme_update_ruh()
498 e->rgid = cpu_to_le16(rg); in nvme_update_ruh()
499 e->ruhid = cpu_to_le16(ruhid); in nvme_update_ruh()
4489 static void nvme_cq_notifier(EventNotifier *e) in nvme_cq_notifier() argument
4494 if (!event_notifier_test_and_clear(e)) { in nvme_cq_notifier()
4529 static void nvme_sq_notifier(EventNotifier *e) in nvme_sq_notifier() argument
[all …]
/qemu/docs/specs/
H A Dpvpanic.rst6 management apps (e.g. libvirt) to be notified and respond to the event.
/qemu/docs/devel/
H A Datomics.rst36 used data structures (e.g. the lock-free singly-linked list operations
201 second depends on the result of the first (e.g., the first load
H A Dclocks.rst358 which returns a prettified string-representation, e.g. "33.3 MHz".
397 (i.e. it has period zero). If the inputs imply a tick count that
/qemu/docs/system/i386/
H A Dsgx.rst29 By default, QEMU does not assign EPC to a VM, i.e. fully enabling SGX in a VM
31 memory types, e.g. hugetlbfs, EPC is exposed as a memory backend.
33 SGX EPC is enumerated through CPUID, i.e. EPC "devices" need to be realized
39 guest, e.g. QEMU will happily allow you to create 64 1M EPC sections. Be aware
40 that some kernels may not recognize all EPC sections, e.g. the Linux SGX driver
55 a subset of the full EPC, e.g. 92M or 128M) and the EPC must be naturally
82 e.g. via ``-cpu <model>,+sgx`` or ``-cpu <model>,+sgx,+sgxlc``.
84 All SGX sub-features enumerated through CPUID, e.g. SGX2, MISCSELECT,
87 i.e. may marginally reduce SGX performance in the guest. All SGX sub-features
88 controlled via -cpu are prefixed with "sgx", e.g.::
[all …]
/qemu/docs/system/arm/
H A Dsbsa.rst39 (i.e. CPUs and memory). As a result it must have a firmware specifically built

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