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Searched refs:BWN_TMSLOW_MACPHYCLKEN (Results 1 – 2 of 2) sorted by last modified time

/dragonfly/sys/dev/netif/bwn/bwn/
H A Dif_bwn_phy_common.c214 val |= BWN_TMSLOW_MACPHYCLKEN; in bwn_mac_phy_clock_set()
216 val &= ~BWN_TMSLOW_MACPHYCLKEN; in bwn_mac_phy_clock_set()
H A Dif_bwnreg.h100 #define BWN_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Control Enable (rev >= 5) */ macro