Searched refs:MSR_PR (Results 1 – 4 of 4) sorted by relevance
2151 (1ull << MSR_PR) |2226 (1ull << MSR_PR) |2264 (1ull << MSR_PR) |2321 (1ull << MSR_PR) |2395 (1ull << MSR_PR) |2433 (1ull << MSR_PR) |2474 (1ull << MSR_PR) | in POWERPC_FAMILY()2515 (1ull << MSR_PR) | in POWERPC_FAMILY()2570 (1ull << MSR_PR) | in POWERPC_FAMILY()2609 (1ull << MSR_PR) | in POWERPC_FAMILY()[all …]
101 QEMU_BUILD_BUG_ON(MSR_PR != HFLAGS_PR); in hreg_compute_hflags_value()104 msr_mask = ((1 << MSR_LE) | (1 << MSR_PR) | in hreg_compute_hflags_value()182 dmmu_idx = msr & (1 << MSR_PR) ? 0 : 1; in hreg_compute_hflags_value()298 if (is_book3s_arch2x(env) && ((value >> MSR_PR) & 1)) { in hreg_store_msr()
3181 return env->msr & ((target_ulong)1 << MSR_PR); in ppc_cpu_debug_check_breakpoint()3183 return (!(env->msr & ((target_ulong)1 << MSR_PR)) && in ppc_cpu_debug_check_breakpoint()3186 return (!(env->msr & ((target_ulong)1 << MSR_PR)) && in ppc_cpu_debug_check_breakpoint()3211 if ((env->msr & ((target_ulong)1 << MSR_PR)) && !pr) { in ppc_cpu_debug_check_watchpoint()
444 #define MSR_PR PPC_BIT_NR(49) /* Problem state hflags */ macro494 FIELD(MSR, PR, MSR_PR, 1)