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Searched refs:MSR_S (Results 1 – 2 of 2) sorted by relevance

/qemu/target/ppc/
H A Dcpu.h436 #define MSR_S PPC_BIT_NR(41) /* Secure state */ macro
486 FIELD(MSR, S, MSR_S, 1)
H A Dtranslate.c4788 mask = ~((1ULL << MSR_LE) | (1ULL << MSR_ME) | (1ULL << MSR_S) | in gen_mtmsrd()
4827 mask &= ~((1ULL << MSR_LE) | (1ULL << MSR_ME) | (1ULL << MSR_S)); in gen_mtmsr()