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Searched refs:MSR_TGPR (Results 1 – 5 of 5) sorted by relevance

/qemu/target/ppc/
H A Dhelper_regs.c281 ((value ^ env->msr) & (1 << MSR_TGPR)))) { in hreg_store_msr()
H A Dmachine.c22 env->msr ^= env->msr_mask & ~((1ULL << MSR_TGPR) | MSR_HVB); in post_load_update_msr()
H A Dexcp_helper.c661 if (!(new_msr & ((target_ulong)1 << MSR_TGPR))) { in powerpc_excp_6xx()
662 new_msr |= (target_ulong)1 << MSR_TGPR; in powerpc_excp_6xx()
2599 msr &= ~(1ULL << MSR_TGPR); in do_rfi()
H A Dcpu.h440 #define MSR_TGPR PPC_BIT_NR(46) /* TGPR usage on 602/603 x */ macro
490 FIELD(MSR, TGPR, MSR_TGPR, 1)
H A Dcpu_init.c2568 (1ull << MSR_TGPR) | in POWERPC_FAMILY()
2606 (1ull << MSR_TGPR) | in POWERPC_FAMILY()
3282 (1ull << MSR_TGPR) |
3321 (1ull << MSR_TGPR) |
3366 (1ull << MSR_TGPR) | in POWERPC_FAMILY()