| /freebsd/contrib/llvm-project/libunwind/src/ |
| H A D | AddressSpace.hpp | 194 uint64_t getRegister(pint_t addr);
216 inline uint64_t LocalAddressSpace::getRegister(pint_t addr) { in getRegister() function in libunwind::LocalAddressSpace
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| H A D | CompactUnwinder.hpp | 608 registers.setIP(registers.getRegister(UNW_AARCH64_LR)); in stepWithCompactEncodingFrameless()
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| H A D | DwarfInstructions.hpp | 68 return (pint_t)((sint_t)registers.getRegister((int)prolog.cfaRegister) + in getCFA()
96 return (pint_t)addressSpace.getRegister(cfa + (pint_t)savedReg.value); in getSavedRegister()
103 return (pint_t)addressSpace.getRegister(evaluateExpression( in getSavedRegister()
111 return registers.getRegister((int)savedReg.value); in getSavedRegister()
343 pint_t sp = newRegisters.getRegister(UNW_REG_SP); in stepWithDwarf()
803 *(++sp) = registers.getRegister((int)reg); in evaluateExpression()
810 *(++sp) = registers.getRegister((int)reg); in evaluateExpression()
849 svalue += static_cast<sint_t>(registers.getRegister((int)reg)); in evaluateExpression()
858 svalue += static_cast<sint_t>(registers.getRegister((int)reg)); in evaluateExpression()
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| H A D | Registers.hpp | 64 uint32_t getRegister(int num) const;
282 uint64_t getRegister(int num) const;
601 uint32_t getRegister(int num) const;
1173 uint64_t getRegister(int num) const;
1824 uint64_t getRegister(int num) const;
2113 uint32_t getRegister(int num) const;
2618 uint32_t getRegister(int num) const;
2817 uint32_t getRegister(int num) const;
3152 uint64_t getRegister(int num) const;
3641 uint64_t getRegister(int num) const;
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| H A D | UnwindCursor.hpp | 643 _msContext.R0 = r.getRegister(UNW_ARM_R0); in UnwindCursor()
644 _msContext.R1 = r.getRegister(UNW_ARM_R1); in UnwindCursor()
645 _msContext.R2 = r.getRegister(UNW_ARM_R2); in UnwindCursor()
646 _msContext.R3 = r.getRegister(UNW_ARM_R3); in UnwindCursor()
647 _msContext.R4 = r.getRegister(UNW_ARM_R4); in UnwindCursor()
648 _msContext.R5 = r.getRegister(UNW_ARM_R5); in UnwindCursor()
649 _msContext.R6 = r.getRegister(UNW_ARM_R6); in UnwindCursor()
650 _msContext.R7 = r.getRegister(UNW_ARM_R7); in UnwindCursor()
1350 return _registers.getRegister(regNum); in getReg()
2262 registers.getRegister(2) + in getInfoFromTBTable()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 759 SDValue getRegister(unsigned Reg, EVT VT);
774 getRegister(Reg, N.getValueType()), N);
783 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue };
799 SDValue Ops[] = { Chain, getRegister(Reg, VT) };
809 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue };
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| H A D | TargetRegisterInfo.h | 90 MCRegister getRegister(unsigned i) const { in getRegister() function
91 return MC->getRegister(i); in getRegister()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.h | 132 uint32_t getRegister() const { return RegNum; } in getRegister() function
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCDwarf.h | 661 unsigned getRegister() const { in getRegister() function
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| H A D | MCRegisterInfo.h | 65 unsigned getRegister(unsigned i) const { in getRegister() function
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | AsmPrinterDwarf.cpp | 218 OutStreamer->emitCFIDefCfa(Inst.getRegister(), Inst.getOffset(), Loc); in emitCFIInstruction()
221 OutStreamer->emitCFIDefCfaRegister(Inst.getRegister(), Loc); in emitCFIInstruction()
224 OutStreamer->emitCFILLVMDefAspaceCfa(Inst.getRegister(), Inst.getOffset(), in emitCFIInstruction()
228 OutStreamer->emitCFIOffset(Inst.getRegister(), Inst.getOffset(), Loc); in emitCFIInstruction()
231 OutStreamer->emitCFIRegister(Inst.getRegister(), Inst.getRegister2(), Loc); in emitCFIInstruction()
240 OutStreamer->emitCFISameValue(Inst.getRegister(), Loc); in emitCFIInstruction()
250 OutStreamer->emitCFIRestore(Inst.getRegister(), Loc); in emitCFIInstruction()
253 OutStreamer->emitCFIUndefined(Inst.getRegister(), Loc); in emitCFIInstruction()
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| H A D | DwarfCompileUnit.cpp | 1305 unsigned Register = Param.getRegister(); in constructCallSiteParmEntryDIEs()
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| H A D | DwarfDebug.h | 327 unsigned getRegister() const { return Register; } in getRegister() function
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CFIInstrInserter.cpp | 196 SetRegister = CFI.getRegister(); in calculateOutgoingCFAInfo()
205 SetRegister = CFI.getRegister(); in calculateOutgoingCFAInfo()
218 CSRRestored.set(CFI.getRegister()); in calculateOutgoingCFAInfo()
254 auto It = CSRLocMap.find(CFI.getRegister()); in calculateOutgoingCFAInfo()
257 {CFI.getRegister(), CSRSavedLocation(CSRReg, CSROffset)}); in calculateOutgoingCFAInfo()
261 CSRSaved.set(CFI.getRegister()); in calculateOutgoingCFAInfo()
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| H A D | ExecutionDomainFix.cpp | 248 LLVM_DEBUG(dbgs() << printReg(RC->getRegister(rx), TRI) << ":\t" << *MI); in processDefs()
340 const int Def = RDA->getReachingDef(mi, RC->getRegister(rx)); in visitSoftInstr()
342 return RDA->getReachingDef(mi, RC->getRegister(I)) <= Def; in visitSoftInstr()
446 for (MCRegAliasIterator AI(RC->getRegister(i), TRI, true); AI.isValid(); in runOnMachineFunction()
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| H A D | MachineOperand.cpp | 671 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
687 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
694 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
706 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
713 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
721 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
734 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
752 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
758 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 2228 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { in getRegister() function in SelectionDAG
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| H A D | SelectionDAGBuilder.cpp | 1039 Ops.push_back(DAG.getRegister(Regs[I], RegVTs[I])); in AddInlineAsmOperands()
1055 Ops.push_back(DAG.getRegister(TheReg, RegisterVT)); in AddInlineAsmOperands()
2274 DAG.getRegister(SwiftError.getOrCreateVRegUseAt( in visitRet()
8346 DAG.getRegister(SwiftError.getOrCreateVRegUseAt(&CB, FuncInfo.MBB, V), in LowerCallTo()
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| H A D | SelectionDAGISel.cpp | 3681 CurDAG->getRegister(RegNo, VT), nullptr)); in SelectCodeCommon()
3693 CurDAG->getRegister(RegNo, VT), nullptr)); in SelectCodeCommon()
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCDwarf.cpp | 1328 unsigned Reg1 = Instr.getRegister(); in emitCFIInstruction()
1348 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1370 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1381 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1391 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1407 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1437 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1443 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
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| H A D | MCStreamer.cpp | 464 Frame.CurrentCfaRegister = Inst.getRegister(); in emitCFIStartProc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AsmPrinter.cpp | 905 unsigned RegToPrint = RC->getRegister(RI->getEncodingValue(Reg)); in printAsmRegInClass()
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| H A D | AArch64ISelDAGToDAG.cpp | 337 Imm = CurDAG->getRegister(BaseReg + C, MVT::Other); in ImmToReg()
1968 SDValue SubReg = CurDAG->getRegister(BaseReg, MVT::Other); in SelectMultiVectorMove()
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| H A D | AArch64ISelLowering.cpp | 8070 Ops.push_back(DAG.getRegister(RegToPass.first, in LowerCall()
8320 DAG.getRegister(RetVal.first, RetVal.second.getValueType())); in LowerReturn()
8338 DAG.getRegister(RetValReg, getPointerTy(DAG.getDataLayout()))); in LowerReturn()
8345 RetOps.push_back(DAG.getRegister(*I, MVT::i64)); in LowerReturn()
8798 SDValue TEB = DAG.getRegister(AArch64::X18, MVT::i64); in LowerWindowsGlobalTLSAddress()
10728 Res.first = AArch64::FPR64RegClass.getRegister(RegNo); in getRegForInlineAsmConstraint()
10731 Res.first = AArch64::FPR128RegClass.getRegister(RegNo); in getRegForInlineAsmConstraint()
10779 Result = DAG.getRegister(AArch64::XZR, MVT::i64); in LowerAsmOperandForConstraint()
10781 Result = DAG.getRegister(AArch64::WZR, MVT::i32); in LowerAsmOperandForConstraint()
21173 Inc = DAG.getRegister(AArch64::XZR, MVT::i64); in performPostLD1Combine()
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| H A D | AArch64RegisterInfo.cpp | 201 UpdatedCSRs.push_back(AArch64::GPR64commonRegClass.getRegister(i)); in UpdateCustomCalleeSavedRegs()
334 subregs_inclusive(AArch64::GPR64commonRegClass.getRegister(i))) { in UpdateCustomCallPreservedMask()
430 markSuperRegs(Reserved, AArch64::GPR32commonRegClass.getRegister(i)); in getStrictlyReservedRegs()
471 markSuperRegs(Reserved, AArch64::GPR32commonRegClass.getRegister(i)); in getReservedRegs()
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