Searched refs:mpll (Results 1 – 16 of 16) sorted by relevance
68 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_legacy_get_memory_clock() local74 fb_div *= mpll->reference_freq; in radeon_legacy_get_memory_clock()108 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_read_clocks_OF() local183 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_get_clock_info() local215 if (mpll->reference_div < 2) in radeon_get_clock_info()328 mpll->min_post_div = 1; in radeon_get_clock_info()329 mpll->max_post_div = 1; in radeon_get_clock_info()330 mpll->min_ref_div = 2; in radeon_get_clock_info()331 mpll->max_ref_div = 0xff; in radeon_get_clock_info()332 mpll->min_feedback_div = 4; in radeon_get_clock_info()[all …]
732 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_combios_get_clock_info() local773 mpll->reference_freq = RBIOS16(pll_info + 0x26); in radeon_combios_get_clock_info()774 mpll->reference_div = RBIOS16(pll_info + 0x28); in radeon_combios_get_clock_info()775 mpll->pll_out_min = RBIOS32(pll_info + 0x2a); in radeon_combios_get_clock_info()776 mpll->pll_out_max = RBIOS32(pll_info + 0x2e); in radeon_combios_get_clock_info()779 mpll->pll_in_min = RBIOS32(pll_info + 0x5a); in radeon_combios_get_clock_info()780 mpll->pll_in_max = RBIOS32(pll_info + 0x5e); in radeon_combios_get_clock_info()783 mpll->pll_in_min = 40; in radeon_combios_get_clock_info()784 mpll->pll_in_max = 500; in radeon_combios_get_clock_info()
1137 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_atom_get_clock_info() local1216 mpll->reference_freq = in radeon_atom_get_clock_info()1219 mpll->reference_freq = in radeon_atom_get_clock_info()1221 mpll->reference_div = 0; in radeon_atom_get_clock_info()1223 mpll->pll_out_min = in radeon_atom_get_clock_info()1225 mpll->pll_out_max = in radeon_atom_get_clock_info()1229 if (mpll->pll_out_min == 0) { in radeon_atom_get_clock_info()1231 mpll->pll_out_min = 64800; in radeon_atom_get_clock_info()1233 mpll->pll_out_min = 20000; in radeon_atom_get_clock_info()1236 mpll->pll_in_min = in radeon_atom_get_clock_info()[all …]
252 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv740_populate_mclk_value()
172 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv730_populate_mclk_value()
443 u32 ref_clk = rdev->clock.mpll.reference_freq; in cypress_map_clkf_to_ibias()559 u32 reference_clock = rdev->clock.mpll.reference_freq; in cypress_populate_mclk_value()
656 u32 ref_clk = rdev->clock.mpll.reference_freq; in rv6xx_program_mclk_spread_spectrum_parameters()
408 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv770_populate_mclk_value()
275 struct radeon_pll mpll; member
2240 u32 reference_clock = rdev->clock.mpll.reference_freq; in ni_populate_mclk_value()
2865 u32 reference_clock = rdev->clock.mpll.reference_freq; in ci_calculate_mclk_params()
4916 u32 reference_clock = rdev->clock.mpll.reference_freq; in si_populate_mclk_value()
249 struct amdgpu_pll *mpll = &adev->clock.mpll; in amdgpu_atomfirmware_get_clock_info() local309 mpll->reference_freq = le32_to_cpu(umc_info->v31.mem_refclk_10khz); in amdgpu_atomfirmware_get_clock_info()311 mpll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()312 mpll->min_post_div = 1; in amdgpu_atomfirmware_get_clock_info()313 mpll->max_post_div = 1; in amdgpu_atomfirmware_get_clock_info()314 mpll->min_ref_div = 2; in amdgpu_atomfirmware_get_clock_info()315 mpll->max_ref_div = 0xff; in amdgpu_atomfirmware_get_clock_info()316 mpll->min_feedback_div = 4; in amdgpu_atomfirmware_get_clock_info()317 mpll->max_feedback_div = 0xff; in amdgpu_atomfirmware_get_clock_info()318 mpll->best_vco = 0; in amdgpu_atomfirmware_get_clock_info()
570 struct amdgpu_pll *mpll = &adev->clock.mpll; in amdgpu_atombios_get_clock_info() local642 mpll->reference_freq = in amdgpu_atombios_get_clock_info()644 mpll->reference_div = 0; in amdgpu_atombios_get_clock_info()646 mpll->pll_out_min = in amdgpu_atombios_get_clock_info()648 mpll->pll_out_max = in amdgpu_atombios_get_clock_info()655 mpll->pll_in_min = in amdgpu_atombios_get_clock_info()657 mpll->pll_in_max = in amdgpu_atombios_get_clock_info()665 mpll->min_post_div = 1; in amdgpu_atombios_get_clock_info()666 mpll->max_post_div = 1; in amdgpu_atombios_get_clock_info()667 mpll->min_ref_div = 2; in amdgpu_atombios_get_clock_info()[all …]
358 struct amdgpu_pll mpll; member
5379 u32 reference_clock = adev->clock.mpll.reference_freq; in si_populate_mclk_value()