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Searched refs:nr_threads (Results 1 – 25 of 25) sorted by relevance

/qemu/target/ppc/
H A Dtimebase_helper.c65 uint32_t nr_threads = cs->nr_threads; in helper_store_purr() local
67 if (nr_threads == 1 || !(env->flags & POWERPC_FLAG_SMT_1LPAR)) { in helper_store_purr()
84 uint32_t nr_threads = cs->nr_threads; in helper_store_tbl() local
86 if (nr_threads == 1 || !(env->flags & POWERPC_FLAG_SMT_1LPAR)) { in helper_store_tbl()
101 uint32_t nr_threads = cs->nr_threads; in helper_store_tbu() local
103 if (nr_threads == 1 || !(env->flags & POWERPC_FLAG_SMT_1LPAR)) { in helper_store_tbu()
143 uint32_t nr_threads = cs->nr_threads; in helper_store_hdecr() local
145 if (nr_threads == 1 || !(env->flags & POWERPC_FLAG_SMT_1LPAR)) { in helper_store_hdecr()
160 uint32_t nr_threads = cs->nr_threads; in helper_store_vtb() local
177 uint32_t nr_threads = cs->nr_threads; in helper_store_tbu40() local
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H A Dmisc_helper.c51 uint32_t nr_threads = cs->nr_threads; in helper_spr_core_write_generic() local
53 if (nr_threads == 1) { in helper_spr_core_write_generic()
222 uint32_t nr_threads = cs->nr_threads; in helper_load_dpdes() local
228 nr_threads = 1; /* DPDES behaves as 1-thread in LPAR-per-thread mode */ in helper_load_dpdes()
231 if (nr_threads == 1) { in helper_load_dpdes()
258 uint32_t nr_threads = cs->nr_threads; in helper_store_dpdes() local
263 nr_threads = 1; /* DPDES behaves as 1-thread in LPAR-per-thread mode */ in helper_store_dpdes()
266 if (val & ~(nr_threads - 1)) { in helper_store_dpdes()
269 val &= (nr_threads - 1); /* Ignore the invalid bits */ in helper_store_dpdes()
272 if (nr_threads == 1) { in helper_store_dpdes()
H A Dcompat.c254 int n_threads = CPU(cpu)->nr_threads; in ppc_compat_max_vthreads()
H A Dexcp_helper.c3020 uint32_t nr_threads = cs->nr_threads; in helper_book3s_msgsndp() local
3026 nr_threads = 1; /* msgsndp behaves as 1-thread in LPAR-per-thread mode*/ in helper_book3s_msgsndp()
3029 if (!dbell_type_server(rb) || ttir >= nr_threads) { in helper_book3s_msgsndp()
3033 if (nr_threads == 1) { in helper_book3s_msgsndp()
H A Dcpu.h1397 (POWERPC_CPU(cs)->env.spr_cb[SPR_PIR].default_value & ~(cs->nr_threads - 1))
H A Dcpu_init.c6866 if (env_cpu(env)->nr_threads > 1) { in ppc_cpu_realize()
/qemu/include/hw/i386/
H A Dtopology.h131 unsigned nr_threads = topo_info->threads_per_core; in x86_topo_ids_from_idx() local
133 topo_ids->pkg_id = cpu_index / (nr_dies * nr_cores * nr_threads); in x86_topo_ids_from_idx()
134 topo_ids->die_id = cpu_index / (nr_cores * nr_threads) % nr_dies; in x86_topo_ids_from_idx()
135 topo_ids->core_id = cpu_index / nr_threads % nr_cores; in x86_topo_ids_from_idx()
136 topo_ids->smt_id = cpu_index % nr_threads; in x86_topo_ids_from_idx()
/qemu/hw/cpu/
H A Dcore.c48 int64_t value = core->nr_threads; in core_prop_get_nr_threads()
63 core->nr_threads = value; in core_prop_set_nr_threads()
76 core->nr_threads = current_machine->smp.threads; in cpu_core_instance_init()
/qemu/hw/ppc/
H A Dspapr_cpu_core.c217 for (i = 0; i < cc->nr_threads; i++) { in spapr_cpu_core_reset()
245 for (i = 0; i < cc->nr_threads; i++) { in spapr_cpu_core_unrealize()
346 sc->threads = g_new0(PowerPCCPU *, cc->nr_threads); in spapr_cpu_core_realize()
347 for (i = 0; i < cc->nr_threads; i++) { in spapr_cpu_core_realize()
H A Dpnv_core.c260 for (i = 0; i < cc->nr_threads; i++) { in pnv_core_reset()
278 pc->threads = g_new(PowerPCCPU *, cc->nr_threads); in pnv_core_realize()
279 for (i = 0; i < cc->nr_threads; i++) { in pnv_core_realize()
295 for (j = 0; j < cc->nr_threads; j++) { in pnv_core_realize()
338 for (i = 0; i < cc->nr_threads; i++) { in pnv_core_unrealize()
H A Dpnv.c141 int smt_threads = CPU_CORE(pc)->nr_threads; in pnv_dt_core()
249 uint32_t nr_threads) in pnv_dt_icp() argument
261 irange[1] = cpu_to_be32(nr_threads); in pnv_dt_icp()
263 rsize = sizeof(uint64_t) * 2 * nr_threads; in pnv_dt_icp()
265 for (i = 0; i < nr_threads; i++) { in pnv_dt_icp()
1143 if (chip->nr_threads == 8) { in pnv_chip_pir_p9()
1165 if (chip->nr_threads == 8) { in pnv_chip_pir_p10()
1348 for (j = 0; j < CPU_CORE(pnv_core)->nr_threads; j++) { in pnv_chip_icp_realize()
2182 chip->nr_threads, &error_fatal); in pnv_chip_core_realize()
2221 DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1),
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H A Dspapr.c2739 int nr_threads = smp_threads; in spapr_init_cpus() local
2743 nr_threads = smp_cpus - i * smp_threads; in spapr_init_cpus()
2746 object_property_set_int(core, "nr-threads", nr_threads, in spapr_init_cpus()
3925 for (i = 0; i < cc->nr_threads; i++) { in spapr_core_unplug()
4056 for (i = 0; i < cc->nr_threads; i++) { in spapr_core_plug()
4063 for (i = 0; i < cc->nr_threads; i++) { in spapr_core_plug()
4103 if (mc->has_hotpluggable_cpus && (cc->nr_threads != smp_threads)) { in spapr_core_pre_plug()
4104 error_setg(errp, "invalid nr-threads %d, must be %d", cc->nr_threads, in spapr_core_pre_plug()
/qemu/include/hw/cpu/
H A Dcore.h25 int nr_threads; member
/qemu/include/hw/ppc/
H A Dpnv_chip.h30 uint32_t nr_threads; member
/qemu/hw/core/
H A Dcpu-common.c261 cpu->nr_threads = 1; in cpu_common_initfn()
/qemu/target/i386/
H A Dcpu.c6172 topo_info.threads_per_core = cs->nr_threads; in cpu_x86_cpuid()
6209 if (cs->nr_cores * cs->nr_threads > 1) { in cpu_x86_cpuid()
6384 *ebx = cs->nr_threads; in cpu_x86_cpuid()
6389 *ebx = cs->nr_cores * cs->nr_threads; in cpu_x86_cpuid()
6419 *ebx = cs->nr_threads; in cpu_x86_cpuid()
6429 *ebx = cs->nr_cores * cs->nr_threads; in cpu_x86_cpuid()
6657 if (cs->nr_cores * cs->nr_threads > 1) { in cpu_x86_cpuid()
6724 if (cs->nr_cores * cs->nr_threads > 1) { in cpu_x86_cpuid()
6732 ((cs->nr_cores * cs->nr_threads) - 1); in cpu_x86_cpuid()
7624 cs->nr_threads > 1) { in x86_cpu_realizefn()
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/qemu/system/
H A Dcpus.c655 cpu->nr_threads = ms->smp.threads; in qemu_init_vcpu()
/qemu/include/hw/core/
H A Dcpu.h455 int nr_threads; member
/qemu/target/i386/tcg/sysemu/
H A Dmisc_helper.c482 val = (cs->nr_threads * cs->nr_cores) | (cs->nr_cores << 16); in helper_rdmsr()
/qemu/target/mips/tcg/sysemu/
H A Dcp0_helper.c128 vpe_idx = tc_idx / cs->nr_threads; in mips_cpu_map_tc()
129 *tc = tc_idx % cs->nr_threads; in mips_cpu_map_tc()
/qemu/hw/mips/
H A Dmalta.c978 smp_cpus * cs->nr_threads - 1); in malta_mips_config()
/qemu/hw/intc/
H A Dpnv_xive.c489 for (j = 0; j < cc->nr_threads; j++) { in pnv_xive_match_nvt()
H A Dpnv_xive2.c480 for (j = 0; j < cc->nr_threads; j++) { in pnv_xive2_match_nvt()
/qemu/target/i386/hvf/
H A Dx86_emu.c748 val = cs->nr_threads * cs->nr_cores; /* thread count, bits 15..0 */ in simulate_rdmsr()
/qemu/target/i386/kvm/
H A Dkvm.c2527 *val = cs->nr_threads * cs->nr_cores; /* thread count, bits 15..0 */ in kvm_rdmsr_core_thread_count()