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12345678910>>...398

/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/
H A Dfix-wwm-liveness.mir16 - { id: 0, class: sreg_64, preferred-register: '' }
17 - { id: 1, class: sgpr_32, preferred-register: '' }
18 - { id: 2, class: sgpr_32, preferred-register: '' }
19 - { id: 3, class: vgpr_32, preferred-register: '' }
20 - { id: 4, class: vgpr_32, preferred-register: '' }
21 - { id: 5, class: vgpr_32, preferred-register: '' }
22 - { id: 6, class: vgpr_32, preferred-register: '' }
23 - { id: 7, class: vgpr_32, preferred-register: '' }
25 - { id: 9, class: sreg_64, preferred-register: '' }
27 - { id: 11, class: sreg_64, preferred-register: '' }
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
H A Dconvert-rr-to-ri-instrs.mir1022 - { id: 0, class: g8rc, preferred-register: '' }
1023 - { id: 1, class: g8rc, preferred-register: '' }
1024 - { id: 2, class: gprc, preferred-register: '' }
1025 - { id: 3, class: gprc, preferred-register: '' }
1027 - { id: 5, class: gprc, preferred-register: '' }
1028 - { id: 6, class: g8rc, preferred-register: '' }
1081 - { id: 0, class: g8rc, preferred-register: '' }
1082 - { id: 1, class: g8rc, preferred-register: '' }
1084 - { id: 3, class: g8rc, preferred-register: '' }
1134 - { id: 0, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
H A Dconvert-rr-to-ri-instrs.mir1022 - { id: 0, class: g8rc, preferred-register: '' }
1023 - { id: 1, class: g8rc, preferred-register: '' }
1024 - { id: 2, class: gprc, preferred-register: '' }
1025 - { id: 3, class: gprc, preferred-register: '' }
1027 - { id: 5, class: gprc, preferred-register: '' }
1028 - { id: 6, class: g8rc, preferred-register: '' }
1081 - { id: 0, class: g8rc, preferred-register: '' }
1082 - { id: 1, class: g8rc, preferred-register: '' }
1084 - { id: 3, class: g8rc, preferred-register: '' }
1134 - { id: 0, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dconvert-rr-to-ri-p9-vector.mir14 - { id: 1, class: g8rc, preferred-register: '' }
16 - { id: 3, class: gprc, preferred-register: '' }
17 - { id: 4, class: g8rc, preferred-register: '' }
18 - { id: 5, class: g8rc, preferred-register: '' }
19 - { id: 6, class: g8rc, preferred-register: '' }
20 - { id: 7, class: vssrc, preferred-register: '' }
21 - { id: 8, class: gprc, preferred-register: '' }
22 - { id: 9, class: g8rc, preferred-register: '' }
23 - { id: 10, class: g8rc, preferred-register: '' }
24 - { id: 11, class: g8rc, preferred-register: '' }
[all …]
/dports/net/google-cloud-sdk/google-cloud-sdk/lib/third_party/prompt_toolkit/layout/
H A Ddimension.py42 if preferred is None:
43 preferred = min
47 self.preferred = preferred
51 if self.preferred < self.min:
52 self.preferred = self.min
54 if self.preferred > self.max:
55 self.preferred = self.max
79 preferred = sum([d.preferred for d in dimensions])
81 return LayoutDimension(min=min, max=max, preferred=preferred)
90 preferred = max([d.preferred for d in dimensions])
[all …]
/dports/devel/py-prompt-toolkit1/prompt_toolkit-1.0.18/prompt_toolkit/layout/
H A Ddimension.py42 if preferred is None:
43 preferred = min
47 self.preferred = preferred
51 if self.preferred < self.min:
52 self.preferred = self.min
54 if self.preferred > self.max:
55 self.preferred = self.max
79 preferred = sum([d.preferred for d in dimensions])
81 return LayoutDimension(min=min, max=max, preferred=preferred)
90 preferred = max([d.preferred for d in dimensions])
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A Dwqm.mir17 - { id: 0, class: sgpr_32, preferred-register: '' }
18 - { id: 1, class: sgpr_32, preferred-register: '' }
19 - { id: 2, class: sgpr_32, preferred-register: '' }
20 - { id: 3, class: vgpr_32, preferred-register: '' }
21 - { id: 4, class: vgpr_32, preferred-register: '' }
22 - { id: 5, class: sgpr_32, preferred-register: '' }
23 - { id: 6, class: vgpr_32, preferred-register: '' }
24 - { id: 7, class: vgpr_32, preferred-register: '' }
26 - { id: 9, class: sreg_32, preferred-register: '' }
27 - { id: 10, class: sreg_32, preferred-register: '' }
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dwqm.mir17 - { id: 0, class: sgpr_32, preferred-register: '' }
18 - { id: 1, class: sgpr_32, preferred-register: '' }
19 - { id: 2, class: sgpr_32, preferred-register: '' }
20 - { id: 3, class: vgpr_32, preferred-register: '' }
21 - { id: 4, class: vgpr_32, preferred-register: '' }
22 - { id: 5, class: sgpr_32, preferred-register: '' }
23 - { id: 6, class: vgpr_32, preferred-register: '' }
24 - { id: 7, class: vgpr_32, preferred-register: '' }
26 - { id: 9, class: sreg_32, preferred-register: '' }
27 - { id: 10, class: sreg_32, preferred-register: '' }
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/
H A Dfix-wwm-liveness.mir13 - { id: 0, class: sreg_64, preferred-register: '' }
14 - { id: 1, class: sgpr_32, preferred-register: '' }
15 - { id: 2, class: sgpr_32, preferred-register: '' }
16 - { id: 3, class: vgpr_32, preferred-register: '' }
17 - { id: 4, class: vgpr_32, preferred-register: '' }
18 - { id: 5, class: vgpr_32, preferred-register: '' }
19 - { id: 6, class: vgpr_32, preferred-register: '' }
20 - { id: 7, class: vgpr_32, preferred-register: '' }
22 - { id: 9, class: sreg_64, preferred-register: '' }
24 - { id: 11, class: sreg_64, preferred-register: '' }
[all …]
/dports/devel/py-prompt-toolkit2/prompt_toolkit-2.0.10/prompt_toolkit/layout/
H A Ddimension.py40 assert preferred is None or preferred >= 0
51 if preferred is None:
52 preferred = min
58 self.preferred = preferred
66 if self.preferred < self.min:
67 self.preferred = self.min
69 if self.preferred > self.max:
112 preferred = sum(d.preferred for d in dimensions)
114 return Dimension(min=min, max=max, preferred=preferred)
155 preferred = max(d.preferred for d in dimensions)
[all …]
/dports/devel/py-lineedit/lineedit-0.1.6/lineedit/deps/prompt_toolkit/layout/
H A Ddimension.py40 assert preferred is None or preferred >= 0
51 if preferred is None:
52 preferred = min
58 self.preferred = preferred
66 if self.preferred < self.min:
67 self.preferred = self.min
69 if self.preferred > self.max:
112 preferred = sum(d.preferred for d in dimensions)
114 return Dimension(min=min, max=max, preferred=preferred)
155 preferred = max(d.preferred for d in dimensions)
[all …]

12345678910>>...398