/freebsd/sys/contrib/device-tree/Bindings/reset/ |
H A D | zynq-reset.txt | 25 0 : soft reset 26 32 : ddr reset 28 96 : dmac reset 29 128: usb0 reset 30 129: usb1 reset 31 160: gem0 reset 32 161: gem1 reset 41 224: spi0 reset 42 225: spi1 reset 58 416: smc reset [all …]
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H A D | socionext,uniphier-reset.yaml | 4 $id: http://devicetree.org/schemas/reset/socionext,uniphier-reset.yaml# 7 title: UniPhier reset controller 15 - description: System reset 17 - socionext,uniphier-ld4-reset 18 - socionext,uniphier-pro4-reset 27 - description: Media I/O (MIO) reset, SD reset 39 - description: Peripheral reset 55 "#reset-cells": 65 - "#reset-cells" 69 reset-controller { [all …]
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H A D | reset.txt | 10 reset consumer (the module being reset, or a module managing when a sub- 14 A reset signal is represented by the phandle of the provider, plus a reset 24 may be reset. Instead, reset signals should be represented in the DT node 35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes 37 reset outputs. 41 rst: reset-controller { 42 #reset-cells = <1>; 55 reset-names: List of reset signal name strings sorted in the same order as 57 match reset signal names with reset specifiers. 63 reset-names = "reset"; [all …]
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H A D | socionext,uniphier-glue-reset.yaml | 4 $id: http://devicetree.org/schemas/reset/socionext,uniphier-glue-reset.yaml# 26 - socionext,uniphier-nx1-usb3-reset 34 "#reset-cells": 47 reset-names: true 70 reset-names: 82 reset-names: 90 - "#reset-cells" 94 - reset-names 98 usb_rst: reset-controller@0 { 101 #reset-cells = <1>; [all …]
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H A D | xlnx,zynqmp-reset.yaml | 4 $id: http://devicetree.org/schemas/reset/xlnx,zynqmp-reset.yaml# 16 The PS reset subsystem is responsible for handling the external reset 20 Please also refer to reset.txt in this directory for common reset 23 node as specified in reset.txt. 34 - xlnx,zynqmp-reset 35 - xlnx,versal-reset 36 - xlnx,versal-net-reset 38 "#reset-cells": 43 - "#reset-cells" 49 zynqmp_reset: reset-controller { [all …]
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H A D | ti-syscon-reset.txt | 27 "ti,syscon-reset" 28 - #reset-cells : Should be 1. Please see the reset consumer node below 30 - ti,reset-bits : Contains the reset control register information 35 Cell #2 : bit position of the reset in the reset 39 Cell #4 : bit position of the reset in the reset 44 reset status register 57 to a reset specifier as defined above. 59 Please also refer to Documentation/devicetree/bindings/reset/reset.txt for 74 pscrst: reset-controller { 76 #reset-cells = <1>; [all …]
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H A D | snps,hsdk-reset.txt | 1 Binding for the Synopsys HSDK reset controller 3 This binding uses the common reset binding[1]. 5 [1] Documentation/devicetree/bindings/reset/reset.txt 8 - compatible: should be "snps,hsdk-reset". 12 - #reset-cells: from common reset binding; Should always be set to 1. 15 reset: reset@880 { 16 compatible = "snps,hsdk-reset"; 17 #reset-cells = <1>; 21 Specifying reset lines connected to IP modules: 24 resets = <&reset HSDK_V1_ETH_RESET>; [all …]
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H A D | fsl,imx7-src.txt | 4 Please also refer to reset.txt in this directory for common reset 17 - #reset-cells: 1, see below 21 src: reset-controller@30390000 { 25 #reset-cells = <1>; 32 The system reset controller can be used to reset various set of 35 specified in reset.txt. 52 <dt-bindings/reset/imx7-reset.h> for i.MX7, 53 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ and 54 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MM and 55 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MN and [all …]
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H A D | xlnx,zynqmp-reset.txt | 9 Please also refer to reset.txt in this directory for common reset 14 "xlnx,versal-reset" for Versal platform 15 - #reset-cells: Specifies the number of cells needed to encode reset 27 zynqmp_reset: reset-controller { 28 compatible = "xlnx,zynqmp-reset"; 29 #reset-cells = <1>; 34 Specifying reset lines connected to IP modules 39 specified in reset.txt. 42 <dt-bindings/reset/xlnx-zynqmp-resets.h> 44 <dt-bindings/reset/xlnx-versal-resets.h> [all …]
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H A D | brcm,brcmstb-reset.yaml | 4 $id: http://devicetree.org/schemas/reset/brcm,brcmstb-reset.yaml# 12 reset lines. 14 Please also refer to reset.txt in this directory for common reset 22 const: brcm,brcmstb-reset 27 "#reset-cells": 33 - "#reset-cells" 39 reset: reset-controller@8404318 { 40 compatible = "brcm,brcmstb-reset"; 42 #reset-cells = <1>; 46 resets = <&reset 26>; [all …]
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H A D | snps,axs10x-reset.txt | 1 Binding for the AXS10x reset controller 6 represents up-to 32 reset lines. 11 This binding uses the common reset binding[1]. 13 [1] Documentation/devicetree/bindings/reset/reset.txt 16 - compatible: should be "snps,axs10x-reset". 19 - #reset-cells: from common reset binding; Should always be set to 1. 22 reset: reset-controller@11220 { 23 compatible = "snps,axs10x-reset"; 24 #reset-cells = <1>; 28 Specifying reset lines connected to IP modules: [all …]
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H A D | img,pistachio-reset.txt | 13 Please refer to Documentation/devicetree/bindings/reset/reset.txt 14 for common reset controller binding usage. 18 - compatible: Contains "img,pistachio-reset" 20 - #reset-cells: Contains 1 31 pistachio_reset: reset-controller { 32 compatible = "img,pistachio-reset"; 33 #reset-cells = <1>; 37 Specifying reset control of devices 43 Documentation/devicetree/bindings/reset/reset.txt. 50 reset-names = "rst"; [all …]
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H A D | uniphier-reset.txt | 1 UniPhier glue reset controller 4 Peripheral core reset in glue layer 13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3 14 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3 15 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3 21 - #reset-cells: Should be 1. 30 - reset-names: Should contain 43 usb_rst: reset@0 { 44 compatible = "socionext,uniphier-ld20-usb3-reset"; 46 #reset-cells = <1>; [all …]
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H A D | brcm,brcmstb-reset.txt | 1 Broadcom STB SW_INIT-style reset controller 4 Broadcom STB SoCs have a SW_INIT-style reset controller with separate 6 reset lines. 8 Please also refer to reset.txt in this directory for common reset 12 - compatible: should be brcm,brcmstb-reset 14 - #reset-cells: must be set to 1 18 reset: reset-controller@8404318 { 19 compatible = "brcm,brcmstb-reset"; 21 #reset-cells = <1>; 25 resets = <&reset 26>; [all …]
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H A D | fsl,imx7-src.yaml | 4 $id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml# 13 The system reset controller can be used to reset various set of 16 specified in reset.txt. 18 For list of all valid reset indices see 19 <dt-bindings/reset/imx7-reset.h> for i.MX7, 20 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ, i.MX8MM and i.MX8MN, 21 <dt-bindings/reset/imx8mp-reset.h> for i.MX8MP. 45 '#reset-cells': 52 - '#reset-cells' 60 reset-controller@30390000 { [all …]
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H A D | hisilicon,hi3660-reset.yaml | 4 $id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml# 13 Please also refer to reset.txt in this directory for common reset 15 The reset controller registers are part of the system-ctl block on 22 - const: hisilicon,hi3660-reset 24 - const: hisilicon,hi3670-reset 25 - const: hisilicon,hi3660-reset 33 description: phandle of the reset's syscon. 36 '#reset-cells': 43 Cell #2 : bit position of the reset in the reset control register 54 compatible = "hisilicon,hi3660-reset"; [all …]
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H A D | allwinner,sun6i-a31-clock-reset.yaml | 4 $id: http://devicetree.org/schemas/reset/allwinner,sun6i-a31-clock-reset.yaml# 20 - allwinner,sun6i-a31-ahb1-reset 21 - allwinner,sun6i-a31-clock-reset 31 "#reset-cells": 40 - allwinner,sun6i-a31-ahb1-reset 41 - allwinner,sun6i-a31-clock-reset 47 - "#reset-cells" 55 ahb1_rst: reset@1c202c0 { 56 #reset-cells = <1>; 62 apbs_rst: reset@80014b0 { [all …]
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H A D | hisilicon,hi3660-reset.txt | 4 Please also refer to reset.txt in this directory for common reset 7 The reset controller registers are part of the system-ctl block on 12 "hisilicon,hi3660-reset" for HI3660 13 "hisilicon,hi3670-reset", "hisilicon,hi3660-reset" for HI3670 14 - hisi,rst-syscon: phandle of the reset's syscon. 15 - #reset-cells : Specifies the number of cells needed to encode a 18 Cell #1 : offset of the reset assert control 22 Cell #2 : bit position of the reset in the reset control register 31 compatible = "hisilicon,hi3660-reset"; 33 #reset-cells = <2>; [all …]
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H A D | nuvoton,npcm750-reset.yaml | 4 $id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml# 15 - nuvoton,npcm750-reset # Poleg NPCM7XX SoC 16 - nuvoton,npcm845-reset # Arbel NPCM8XX SoC 21 '#reset-cells': 28 nuvoton,sw-reset-number: 34 If not specified, software reset is disabled. 39 - '#reset-cells' 46 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h> 48 compatible = "nuvoton,npcm750-reset"; 50 #reset-cells = <2>; [all …]
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H A D | snps,axs10x-reset.yaml | 4 $id: http://devicetree.org/schemas/reset/snps,axs10x-reset.yaml# 7 title: AXS10x reset controller 16 represents up-to 32 reset lines. 22 const: snps,axs10x-reset 27 '#reset-cells': 33 - '#reset-cells' 39 reset: reset-controller@11220 { 40 compatible = "snps,axs10x-reset"; 41 #reset-cells = <1>; 45 // Specifying reset lines connected to IP modules: [all …]
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H A D | nuvoton,npcm-reset.txt | 4 - compatible : "nuvoton,npcm750-reset" for NPCM7XX BMC 6 - #reset-cells: must be set to 2 9 - nuvoton,sw-reset-number - Contains the software reset number to restart the SoC. 10 NPCM7xx contain four software reset that represent numbers 1 to 4. 12 If 'nuvoton,sw-reset-number' is not specified software reset is disabled. 16 compatible = "nuvoton,npcm750-reset"; 18 #reset-cells = <2>; 19 nuvoton,sw-reset-number = <2>; 22 Specifying reset lines connected to IP NPCM7XX modules 32 The index could be found in <dt-bindings/reset/nuvoton,npcm7xx-reset.h>.
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H A D | qca,ar7100-reset.yaml | 5 $id: http://devicetree.org/schemas/reset/qca,ar7100-reset.yaml# 8 title: Qualcomm Atheros AR7xxx/AR9XXX reset controller 17 - qca,ar9132-reset 18 - qca,ar9331-reset 19 - const: qca,ar7100-reset 24 "#reset-cells": 30 - "#reset-cells" 36 reset-controller@1806001c { 37 compatible = "qca,ar9132-reset", "qca,ar7100-reset"; 39 #reset-cells = <1>;
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/freebsd/sys/contrib/device-tree/Bindings/power/reset/ |
H A D | keystone-reset.txt | 3 This node is intended to allow SoC reset in case of software reset 14 - compatible: ti,keystone-reset 18 reset control registers. 26 - ti,soft-reset: Boolean option indicating soft reset. 27 By default hard reset is used. 37 Setup keystone reset so that in case software reset or 50 rstctrl: reset-controller { 51 compatible = "ti,keystone-reset"; 58 Setup keystone reset so that in case of software reset or 61 rstctrl: reset-controller { [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/apple/ |
H A D | t8103-pmgr.dtsi | 14 #reset-cells = <0>; 23 #reset-cells = <0>; 32 #reset-cells = <0>; 41 #reset-cells = <0>; 49 #reset-cells = <0>; 57 #reset-cells = <0>; 65 #reset-cells = <0>; 73 #reset-cells = <0>; 82 #reset-cells = <0>; 91 #reset-cells = <0>; [all …]
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H A D | t8112-pmgr.dtsi | 14 #reset-cells = <0>; 23 #reset-cells = <0>; 32 #reset-cells = <0>; 41 #reset-cells = <0>; 49 #reset-cells = <0>; 57 #reset-cells = <0>; 66 #reset-cells = <0>; 75 #reset-cells = <0>; 84 #reset-cells = <0>; 93 #reset-cells = <0>; [all …]
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