/qemu/tests/tcg/i386/ |
H A D | test-i386-shift.h | 38 if (s1 != 1) in exec_opq() 52 if (s1 != 1) in exec_opl() 65 if (s1 != 1) in exec_opw() 89 if (s1 != 1) in exec_opq() 103 if (s1 != 1) in exec_opl() 116 if (s1 != 1) in exec_opw() 132 if (s1 != 1) in exec_opb() 144 exec_opq(s2, s0, s1, 0); in exec_op() 146 exec_opl(s2, s0, s1, 0); in exec_op() 153 exec_opb(s0, s1, 0); in exec_op() [all …]
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H A D | test-i386.h | 71 EXECOP2("q", "", res, s1, flags); in exec_opq() 100 void exec_op(long s0, long s1) in exec_op() argument 103 s1 = i2l(s1); in exec_op() 105 exec_opq(s0, s1, 0); in exec_op() 107 exec_opl(s0, s1, 0); in exec_op() 108 exec_opw(s0, s1, 0); in exec_op() 109 exec_opb(s0, s1, 0); in exec_op() 112 exec_opq(s0, s1, CC_C); in exec_op() 114 exec_opl(s0, s1, CC_C); in exec_op() 115 exec_opw(s0, s1, CC_C); in exec_op() [all …]
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H A D | test-i386-muldiv.h | 4 long res, s1, s0, flags; in glue() local 6 s1 = op1; in glue() 15 : "q" (s1), "0" (res), "1" (flags)); in glue() 17 stringify(OP) "b", s0, s1, res, flags & CC_MASK); in glue() 22 long res, s1, flags, resh; in glue() local 23 s1 = op1; in glue() 33 : "q" (s1), "0" (res), "1" (flags), "2" (resh)); in glue() 40 long res, s1, flags, resh; in glue() local 41 s1 = op1; in glue() 59 long res, s1, flags, resh; in glue() local [all …]
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H A D | test-i386-pcmpistri.c | 12 union u s1 = { .uc = "abcdefghijklmnop" }; variable 24 if (_mm_cmpistri(s1.x, s2.x, 0x4c) != 15) { in main() 28 if (_mm_cmpistri(s1.x, s3.x, 0x4c) != 16) { in main()
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H A D | test-i386.c | 512 long res, s1, s0, flags; in test_imulw2() local 514 s1 = op1; in test_imulw2() 523 : "q" (s1), "0" (res), "1" (flags)); in test_imulw2() 530 long res, s1, s0, flags; in test_imull2() local 532 s1 = op1; in test_imull2() 541 : "q" (s1), "0" (res), "1" (flags)); in test_imull2() 549 long res, s1, s0, flags; in test_imulq2() local 551 s1 = op1; in test_imulq2() 560 : "q" (s1), "0" (res), "1" (flags)); in test_imulq2() 568 long res, flags, s1;\ [all …]
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/qemu/tests/tcg/s390x/ |
H A D | clst.c | 5 static int clst(char sep, const char **s1, const char **s2) in clst() argument 7 const char *r1 = *s1; in clst() 20 *s1 = r1; in clst() 30 const char *s1; member 38 .s1 = "aa", 46 .s1 = "a\x01", 54 .s1 = "abc\x02", 64 const char *s1, *s2; in main() local 70 s1 = t->s1; in main() 72 cc = clst(t->sep, &s1, &s2); in main() [all …]
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/qemu/crypto/ |
H A D | aes.c | 1464 s1 = GETU32(in + 4) ^ rk[1]; in AES_encrypt() 1546 AES_Te1[(s1 >> 16) & 0xff] ^ in AES_encrypt() 1551 AES_Te0[(s1 >> 24) ] ^ in AES_encrypt() 1560 AES_Te3[(s1 ) & 0xff] ^ in AES_encrypt() 1580 s1 = in AES_encrypt() 1611 s1 = in AES_encrypt() 1617 PUTU32(out + 4, s1); in AES_encrypt() 1655 s1 = GETU32(in + 4) ^ rk[1]; in AES_decrypt() 1771 s1 = in AES_decrypt() 1802 s1 = in AES_decrypt() [all …]
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/qemu/pc-bios/vof/ |
H A D | libc.c | 15 int strcmp(const char *s1, const char *s2) in strcmp() argument 17 while (*s1 != 0 && *s2 != 0) { in strcmp() 18 if (*s1 != *s2) { in strcmp() 21 s1 += 1; in strcmp() 25 return *s1 - *s2; in strcmp()
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/qemu/tests/qtest/ |
H A D | ivshmem-test.c | 199 IVState state1, state2, *s1, *s2; in test_ivshmem_pair() local 204 s1 = &state1; in test_ivshmem_pair() 212 read_mem(s1, 0, data, TMPSHMSIZE); in test_ivshmem_pair() 223 write_mem(s1, 0, data, TMPSHMSIZE); in test_ivshmem_pair() 234 read_mem(s1, 0, data, TMPSHMSIZE); in test_ivshmem_pair() 239 cleanup_vm(s1); in test_ivshmem_pair() 308 IVState state1, state2, *s1, *s2; in test_ivshmem_server() local 330 s1 = &state1; in test_ivshmem_server() 335 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server() 342 ret = qpci_msix_table_size(s1->dev); in test_ivshmem_server() [all …]
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/qemu/pc-bios/s390-ccw/ |
H A D | libc.h | 34 static inline void *memcpy(void *s1, const void *s2, size_t n) in memcpy() argument 36 uint8_t *dest = s1; in memcpy() 44 return s1; in memcpy() 47 static inline int memcmp(const void *s1, const void *s2, size_t n) in memcmp() argument 50 const uint8_t *p1 = s1, *p2 = s2; in memcmp()
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/qemu/target/riscv/ |
H A D | vector_internals.h | 184 TX1 s1 = *((T1 *)vs1 + HS1(i)); \ 186 *((TD *)vd + HD(i)) = OP(s2, s1); \ 203 typedef void opivx2_fn(void *vd, target_long s1, void *vs2, int i); 210 static void do_##NAME(void *vd, target_long s1, void *vs2, int i) \ 213 *((TD *)vd + HD(i)) = OP(s2, (TX1)(T1)s1); \ 216 void do_vext_vx(void *vd, void *v0, target_long s1, void *vs2, 222 void HELPER(NAME)(void *vd, void *v0, target_ulong s1, \ 226 do_vext_vx(vd, v0, s1, vs2, env, desc, \
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H A D | vector_helper.c | 75 if (s1 <= vlmax) { in HELPER() 76 vl = s1; in HELPER() 1445 muls64(&lo_64, &hi_64, s1, s2); in do_mulh_d() 1468 mulu64(&lo_64, &hi_64, s2, s1); in do_mulhu_d() 1510 mulu64(&lo_64, &hi_64, s2, s1); in do_mulhsu_d() 1512 hi_64 -= s2 < 0 ? s1 : 0; in do_mulhsu_d() 2109 vext_vx_rm_1(vd, v0, s1, vs2, in vext_vx_rm_2() 2113 vext_vx_rm_1(vd, v0, s1, vs2, in vext_vx_rm_2() 4447 s1 = OP(s1, (TD)s2); \ in RVVCALL() 4533 s1 = OP(s1, (TD)s2, &env->fp_status); \ [all …]
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H A D | insn16.decode | 28 %imm_ci 12:s1 2:5 33 %imm_cb 12:s1 5:2 2:1 10:2 3:2 !function=ex_shift_1 34 %imm_cj 12:s1 8:1 9:2 6:1 7:1 2:1 11:1 3:3 !function=ex_shift_1 45 %imm_addi16sp 12:s1 3:2 5:1 2:1 6:1 !function=ex_shift_4 46 %imm_lui 12:s1 2:5 !function=ex_shift_12
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H A D | vector_internals.c | 62 void do_vext_vx(void *vd, void *v0, target_long s1, void *vs2, in do_vext_vx() argument 81 fn(vd, s1, vs2, i); in do_vext_vx()
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/qemu/target/i386/tcg/ |
H A D | translate.c | 1520 gen_op_ld_v(s1, ot, s1->T0, s1->A0); in gen_op() 1526 tcg_gen_add_tl(s1->T0, s1->tmp4, s1->T1); in gen_op() 1530 tcg_gen_add_tl(s1->T0, s1->T0, s1->T1); in gen_op() 1531 tcg_gen_add_tl(s1->T0, s1->T0, s1->tmp4); in gen_op() 1545 tcg_gen_sub_tl(s1->T0, s1->T0, s1->T1); in gen_op() 1557 tcg_gen_add_tl(s1->T0, s1->T0, s1->T1); in gen_op() 1571 tcg_gen_sub_tl(s1->T0, s1->T0, s1->T1); in gen_op() 1583 tcg_gen_and_tl(s1->T0, s1->T0, s1->T1); in gen_op() 1594 tcg_gen_or_tl(s1->T0, s1->T0, s1->T1); in gen_op() 1605 tcg_gen_xor_tl(s1->T0, s1->T0, s1->T1); in gen_op() [all …]
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/qemu/target/sparc/ |
H A D | vis_helper.c | 323 int s1, s2; in VIS_CMPHELPER() local 325 s1 = (src1 >> (56 - (i * 8))) & 0xff; in VIS_CMPHELPER() 329 s1 -= s2; in VIS_CMPHELPER() 330 if (s1 < 0) { in VIS_CMPHELPER() 331 s1 = -s1; in VIS_CMPHELPER() 334 sum += s1; in VIS_CMPHELPER()
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/qemu/hw/display/ |
H A D | tcx.c | 138 static void tcx_draw_line32(TCXState *s1, uint8_t *d, in tcx_draw_line32() argument 147 *p++ = s1->palette[val]; in tcx_draw_line32() 151 static void tcx_draw_cursor32(TCXState *s1, uint8_t *d, in tcx_draw_cursor32() argument 158 y = y - s1->cursy; in tcx_draw_cursor32() 159 mask = s1->cursmask[y]; in tcx_draw_cursor32() 160 bits = s1->cursbits[y]; in tcx_draw_cursor32() 161 len = MIN(width - s1->cursx, 32); in tcx_draw_cursor32() 162 p = &p[s1->cursx]; in tcx_draw_cursor32() 166 *p = s1->palette[259]; in tcx_draw_cursor32() 168 *p = s1->palette[258]; in tcx_draw_cursor32() [all …]
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/qemu/target/arm/ |
H A D | ptw.c | 3013 if (s1 == 4 || s2 == 4) { in combine_cacheattr_nibble() 3016 } else if (extract32(s1, 2, 2) == 0 || extract32(s1, 2, 2) == 2) { in combine_cacheattr_nibble() 3018 return s1; in combine_cacheattr_nibble() 3025 return s1; in combine_cacheattr_nibble() 3045 s1lo = extract32(s1.attrs, 0, 4); in combined_attrs_nofwb() 3047 s1hi = extract32(s1.attrs, 4, 4); in combined_attrs_nofwb() 3105 return s1.attrs; in combined_attrs_fwb() 3122 return s1.attrs; in combined_attrs_fwb() 3151 assert(!s1.is_s2_format); in combine_cacheattrs() 3154 if (s1.attrs == 0xf0) { in combine_cacheattrs() [all …]
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/qemu/ |
H A D | qemu-io-cmds.c | 473 char s1[64], s2[64], ts[64]; in print_report() local 477 cvtstr((double)total, s1, sizeof(s1)); in print_report() 2009 char s1[64]; in length_f() local 2017 cvtstr(size, s1, sizeof(s1)); in length_f() 2018 printf("%s\n", s1); in length_f() 2037 char s1[64], s2[64]; in info_f() local 2055 cvtstr(bdi.cluster_size, s1, sizeof(s1)); in info_f() 2179 char s1[64]; in alloc_f() local 2218 cvtstr(start, s1, sizeof(s1)); in alloc_f() 2268 char s1[64], s2[64]; in map_f() local [all …]
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H A D | job.c | 208 static void job_state_transition_locked(Job *job, JobStatus s1) in job_state_transition_locked() argument 211 assert(s1 >= 0 && s1 < JOB_STATUS__MAX); in job_state_transition_locked() 213 JobSTT[s0][s1] ? "allowed" : "disallowed", in job_state_transition_locked() 214 JobStatus_str(s0), JobStatus_str(s1)); in job_state_transition_locked() 215 assert(JobSTT[s0][s1]); in job_state_transition_locked() 216 job->status = s1; in job_state_transition_locked() 218 if (!job_is_internal(job) && s1 != s0) { in job_state_transition_locked()
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/qemu/accel/tcg/ |
H A D | ldst_atomicity.c.inc | 934 int s1 = 4 - s2; 938 val_le = store_whole_le4(pv, s1, val_le); 1004 int s1 = 8 - s2; 1008 val_le = store_whole_le8(pv, s1, val_le); 1009 store_bytes_leN(pv + s1, s2, val_le); 1013 store_whole_le8(pv + s1, s2, val_le); 1082 int s1 = 16 - s2; 1089 val_le = store_whole_le16(pv, s1, val); 1090 store_bytes_leN(pv + s1, s2, val_le); 1094 val = int128_urshift(val, s1 * 8); [all …]
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/qemu/target/s390x/tcg/ |
H A D | mem_helper.c | 636 __func__, l, s1, s2); in do_helper_clc() 863 s1 = wrap_address(env, s1); in HELPER() 875 return int128_make128(s2, s1); in HELPER() 2575 uint8_t s0, s1, s2, s3; in decode_utf8() local 2597 c = (c << 6) | (s1 & 0x3f); in decode_utf8() 2610 c = (c << 6) | (s1 & 0x3f); in decode_utf8() 2616 && ((s1 & 0xc0) != 0x80 in decode_utf8() 2632 c = (c << 6) | (s1 & 0x3f); in decode_utf8() 2637 && ((s1 & 0xc0) != 0x80 in decode_utf8() 2658 uint16_t s0, s1; in decode_utf16() local [all …]
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/qemu/target/riscv/insn_trans/ |
H A D | trans_rvm.c.inc | 90 static void gen_mulh(TCGv ret, TCGv s1, TCGv s2) 94 tcg_gen_muls2_tl(discard, ret, s1, s2); 97 static void gen_mulh_w(TCGv ret, TCGv s1, TCGv s2) 99 tcg_gen_mul_tl(ret, s1, s2); 154 static void gen_mulhu(TCGv ret, TCGv s1, TCGv s2) 158 tcg_gen_mulu2_tl(discard, ret, s1, s2);
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/qemu/ebpf/ |
H A D | trace-events | 4 ebpf_error(const char *s1, const char *s2) "error in %s: %s"
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/qemu/target/hppa/ |
H A D | insns.decode | 28 %assemble_12 0:s1 2:1 3:10 !function=expand_shl2 31 %assemble_17 0:s1 16:5 2:1 3:10 !function=expand_shl2 32 %assemble_22 0:s1 16:10 2:1 3:10 !function=expand_shl2 35 %assemble_21 0:s1 1:11 14:2 16:5 12:2 !function=expand_shl11 37 %lowsign_11 0:s1 1:10 48 %im5_0 0:s1 1:4 49 %im5_16 16:s1 17:4
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