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Searched refs:tile_width (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Di915_gem_tiling.c139 unsigned int tile_width; in i915_tiling_ok() local
167 tile_width = 128; in i915_tiling_ok()
169 tile_width = 512; in i915_tiling_ok()
171 if (!stride || !IS_ALIGNED(stride, tile_width)) in i915_tiling_ok()
H A Dintel_display.c2009 unsigned int *tile_width, in intel_tile_dims() argument
2228 unsigned int tile_width, in __intel_adjust_tile_offset() argument
2274 swap(tile_width, tile_height); in _intel_adjust_tile_offset()
2342 swap(tile_width, tile_height); in _intel_compute_tile_offset()
2350 tiles = *x / tile_width; in _intel_compute_tile_offset()
2351 *x %= tile_width; in _intel_compute_tile_offset()
2491 int tile_width, tile_height; in intel_fill_fb_info() local
2496 tile_width *= hsub; in intel_fill_fb_info()
2499 ccs_x = (x * hsub) % tile_width; in intel_fill_fb_info()
2585 swap(tile_width, tile_height); in intel_fill_fb_info()
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/dragonfly/sys/dev/drm/radeon/
H A Dr600_cs.c255 u32 tile_width = 8; in r600_get_array_mode_alignment() local
259 u32 tile_bytes = tile_width * tile_height * values->blocksize * values->nsamples; in r600_get_array_mode_alignment()
277 *pitch_align = max((u32)tile_width, in r600_get_array_mode_alignment()
285 *pitch_align = max((u32)macro_tile_width * tile_width, in r600_get_array_mode_alignment()
287 (values->blocksize * values->nsamples * tile_width))); in r600_get_array_mode_alignment()