/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 164 unsigned IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 226 unsigned IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 366 unsigned IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 441 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 533 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 679 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local 755 Register IncrReg = MI.getOperand(3).getReg(); in expandAtomicMinMaxOp() local
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandAtomicPseudoInsts.cpp | 224 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 286 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 426 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 241 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 303 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 443 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 241 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 303 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 443 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 241 Register IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 303 Register IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 443 Register IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/RISCV/ |
H A D | RISCVExpandPseudoInsts.cpp | 241 unsigned IncrReg = MI.getOperand(3).getReg(); in doAtomicBinOpExpansion() local 303 unsigned IncrReg = MI.getOperand(3).getReg(); in doMaskedAtomicBinOpExpansion() local 443 unsigned IncrReg = MI.getOperand(4).getReg(); in expandAtomicMinMaxOp() local
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