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Searched defs:ResVT (Results 1 – 22 of 22) sorted by relevance

/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp265 EVT ResVT = N->getValueType(0); in ScalarizeVecRes_OverflowOp() local
1667 EVT ResVT = N->getValueType(0); in SplitVecRes_OverflowOp() local
2964 EVT ResVT = N->getValueType(0); in SplitVecOp_VECREDUCE() local
2983 EVT ResVT = N->getValueType(0); in SplitVecOp_VECREDUCE_SEQ() local
3009 EVT ResVT = N->getValueType(0); in SplitVecOp_VP_REDUCE() local
3033 EVT ResVT = N->getValueType(0); in SplitVecOp_UnaryOp() local
3092 EVT ResVT = N->getValueType(0); in SplitVecOp_INSERT_SUBVECTOR() local
3776 EVT ResVT = N->getValueType(0); in SplitVecOp_FP_ROUND() local
3836 EVT ResVT = N->getValueType(0); in SplitVecOp_FP_TO_XINT_SAT() local
4473 EVT ResVT = N->getValueType(0); in WidenVecRes_OverflowOp() local
[all …]
H A DLegalizeIntegerTypes.cpp310 EVT ResVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in PromoteIntRes_Atomic0() local
2280 EVT ResVT = N->getValueType(0); in PromoteIntOp_VECREDUCE() local
5667 EVT ResVT = N->getValueType(0); in PromoteIntOp_CONCAT_VECTORS() local
H A DSelectionDAG.cpp1913 SDValue SelectionDAG::getStepVector(const SDLoc &DL, EVT ResVT) { in getStepVector()
1918 SDValue SelectionDAG::getStepVector(const SDLoc &DL, EVT ResVT, APInt StepVal) { in getStepVector()
11472 EVT ResVT = N->getValueType(0); in UnrollVectorOverflowOp() local
H A DDAGCombiner.cpp7431 EVT ResVT = ExtractFrom.getValueType(); in extractShiftForRotate() local
17824 EVT ResVT = Use->getValueType(0); in canMergeExpensiveCrossRegisterBankCopy() local
/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2370 EVT ResVT = N->getValueType(0); in performVectorExtendToFPCombine() local
2404 EVT ResVT = N->getValueType(0); in performVectorExtendCombine() local
2471 EVT ResVT; in performVectorTruncZeroCombine() local
2518 EVT ResVT; in performVectorTruncZeroCombine() local
/openbsd/gnu/llvm/llvm/lib/Target/VE/
H A DVVPISelLowering.cpp345 MVT ResVT = splitVectorType(Op.getValue(0).getSimpleValueType()); in splitVectorOp() local
H A DVECustomDAG.cpp562 SDValue VECustomDAG::getLegalReductionOpVVP(unsigned VVPOpcode, EVT ResVT, in getLegalReductionOpVVP()
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp1694 EVT ResVT = TLI->getValueType(DL, ResTy); in getExtendedReductionCost() local
1729 EVT ResVT = TLI->getValueType(DL, ResTy); in getMulAccReductionCost() local
H A DARMISelLowering.cpp16923 EVT ResVT = N->getValueType(0); in PerformVECREDUCE_ADDCombine() local
21022 bool ARMTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
/openbsd/gnu/llvm/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp5098 EVT ResVT = N->getValueType(0); in ReplaceLoadVector() local
5243 EVT ResVT = N->getValueType(0); in ReplaceINTRINSIC_W_CHAIN() local
/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1652 EVT ResVT = getTLI()->getValueType(DL, RetTy, true); in getIntrinsicInstrCost() local
H A DTargetLowering.h3071 virtual bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
/openbsd/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp3511 EVT ResVT = Op.getValueType(); in lowerBITCAST() local
6051 SDValue SystemZTargetLowering::combineExtract(const SDLoc &DL, EVT ResVT, in combineExtract()
6183 EVT ResVT = (TruncBytes < 4 ? MVT::i32 : TruncVT); in combineTruncateExtract() local
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86FastISel.cpp3563 EVT ResVT = VA.getValVT(); in fastLowerCall() local
H A DX86ISelLowering.cpp11597 MVT ResVT = Op.getSimpleValueType(); in LowerAVXCONCAT_VECTORS() local
11660 MVT ResVT = Op.getSimpleValueType(); in LowerCONCAT_VECTORSvXi1() local
22101 EVT ResVT = getSetCCResultType(DAG.getDataLayout(), in FP_TO_INTHelper() local
22724 MVT ResVT = MVT::v4i32; in LowerFP_TO_INT() local
22765 MVT ResVT = VT; in LowerFP_TO_INT() local
33689 EVT ResVT = EleVT == MVT::i32 ? MVT::v4i32 : MVT::v8i16; in ReplaceNodeResults() local
44495 EVT ResVT = in combineVPDPBUSDPattern() local
44570 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), ExtractVT, in combineBasicSADPattern() local
51851 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i16, in detectPMADDUBSW() local
54715 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, in matchPMADDWD() local
[all …]
H A DX86ISelDAGToDAG.cpp4653 MVT ResVT = Setcc.getSimpleValueType(); in tryVPTESTM() local
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1664 bool AArch64TargetLowering::shouldExpandGetActiveLaneMask(EVT ResVT, in shouldExpandGetActiveLaneMask()
15029 bool AArch64TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
18876 EVT ResVT = N->getValueType(0); in performUzpCombine() local
19018 EVT ResVT = N->getValueType(0); in performGLD1Combine() local
20606 EVT ResVT = N->getValueType(0); in performVSelectCombine() local
20630 EVT ResVT = N->getValueType(0); in performSelectCombine() local
23356 EVT ResVT = SrcVT.getVectorElementType(); in LowerVECREDUCE_SEQ_FADD() local
23436 EVT ResVT = (Opcode == AArch64ISD::UADDV_PRED) ? MVT::i64 : in LowerReductionToSVE() local
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp1641 bool SITargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
4676 auto ResVT = DAG.GetSplitDestVTs(VT); in splitTernaryVectorOp() local
10795 EVT ResVT = N->getValueType(0); in performExtractVectorEltCombine() local
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp2154 bool HexagonTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4429 EVT ResVT = VecVT.changeVectorElementTypeToInteger(); in trySETCC() local
H A DPPCISelLowering.cpp7903 EVT ResVT = Op.getValueType(); in LowerSELECT_CC() local
14848 EVT ResVT = Val.getValueType(); in combineStoreFPToInt() local
/openbsd/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1463 bool RISCVTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
5983 static SDValue lowerReductionSeq(unsigned RVVOpcode, MVT ResVT, in lowerReductionSeq()