| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm2837.dtsi | 42 /* Source for d/i-cache-line-size and d/i-cache-sets
55 d-cache-size = <0x8000>;
58 i-cache-size = <0x8000>;
70 d-cache-size = <0x8000>;
73 i-cache-size = <0x8000>;
109 /* Source for cache-line-size + cache-sets
112 * Source for cache-size
116 compatible = "cache";
117 cache-unified;
118 cache-size = <0x80000>;
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| /freebsd/crypto/openssl/crypto/x509/ |
| H A D | pcy_cache.c | 37 if (cache->data == NULL) { in policy_cache_create()
76 cache->data = NULL; in policy_cache_create()
92 cache = OPENSSL_malloc(sizeof(*cache)); in policy_cache_new()
93 if (cache == NULL) { in policy_cache_new()
97 cache->anyPolicy = NULL; in policy_cache_new()
98 cache->data = NULL; in policy_cache_new()
99 cache->any_skip = -1; in policy_cache_new()
101 cache->map_skip = -1; in policy_cache_new()
103 x->policy_cache = cache; in policy_cache_new()
180 if (!cache) in ossl_policy_cache_free()
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| /freebsd/contrib/processor-trace/libipt/src/ |
| H A D | pt_msec_cache.c | 38 if (!cache) in pt_msec_cache_init()
41 memset(cache, 0, sizeof(*cache)); in pt_msec_cache_init()
48 if (!cache) in pt_msec_cache_fini()
52 pt_msec_fini(&cache->msec); in pt_msec_cache_fini()
60 if (!cache) in pt_msec_cache_invalidate()
83 if (!cache || !pmsec) in pt_msec_cache_read()
86 msec = &cache->msec; in pt_msec_cache_read()
87 isid = cache->isid; in pt_msec_cache_read()
108 if (!cache || !pmsec) in pt_msec_cache_fill()
115 msec = &cache->msec; in pt_msec_cache_fill()
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| /freebsd/contrib/dialog/ |
| H A D | inputstr.c | 212 || cache->list == 0 in same_cache2()
219 cache->list = dlg_realloc(int, need, cache->list); in same_cache2()
224 if (cache->s_len >= s_len && cache->string != 0) { in same_cache2()
252 if (cache->s_len >= s_len && cache->string != 0) { in same_cache1()
336 cache->i_len = 0; in dlg_count_wchars()
362 cache->list[0] = 0; in dlg_index_wchars()
373 cache->list[inx] = cache->list[inx - 1] + width; in dlg_index_wchars()
426 result = ((cache->list[inx] | 7) + 1) - cache->list[inx]; in dlg_index_columns()
452 cache->list[inx + 1] += cache->list[inx]; in dlg_index_columns()
464 ((cache->list[inx] | 7) + 1) - cache->list[inx]; in dlg_index_columns()
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-ap806-dual.dtsi | 25 i-cache-size = <0xc000>;
27 i-cache-sets = <256>;
28 d-cache-size = <0x8000>;
30 d-cache-sets = <256>;
42 i-cache-sets = <256>;
45 d-cache-sets = <256>;
49 l2: l2-cache {
50 compatible = "cache";
53 cache-sets = <512>;
54 cache-level = <2>;
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| /freebsd/sys/contrib/device-tree/Bindings/cpufreq/ |
| H A D | cpufreq-qcom-hw.yaml | 227 L2_0: l2-cache {
229 cache-unified;
232 L3_0: l3-cache {
234 cache-unified;
250 cache-unified;
266 cache-unified;
282 cache-unified;
298 cache-unified;
314 cache-unified;
330 cache-unified;
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| H A D | cpufreq-qcom-hw.txt | 60 L2_0: l2-cache {
61 compatible = "cache";
63 L3_0: l3-cache {
76 L2_100: l2-cache {
77 compatible = "cache";
89 L2_200: l2-cache {
102 L2_300: l2-cache {
115 L2_400: l2-cache {
128 L2_500: l2-cache {
141 L2_600: l2-cache {
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| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am642.dtsi | 34 i-cache-size = <0x8000>;
36 i-cache-sets = <256>;
39 d-cache-sets = <128>;
50 i-cache-sets = <256>;
53 d-cache-sets = <128>;
59 compatible = "cache";
60 cache-level = <2>;
61 cache-unified;
62 cache-size = <0x40000>;
63 cache-line-size = <64>;
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| /freebsd/sys/contrib/device-tree/Bindings/riscv/ |
| H A D | sifive-l2-cache.txt | 12 - cache-block-size: Specifies the block size in bytes of the cache.
15 - cache-level: Should be set to 2 for a level 2 cache
17 - cache-sets: Specifies the number of associativity sets of the cache.
20 - cache-size: Specifies the size in bytes of the cache. Should be 2097152
22 - cache-unified: Specifies the cache is a unified cache
30 - next-level-cache: phandle to the next level cache if present.
41 cache-block-size = <64>;
42 cache-level = <2>;
43 cache-sets = <1024>;
44 cache-size = <2097152>;
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| H A D | sifive,ccache0.yaml | 49 cache-block-size:
52 cache-level:
55 cache-sets:
58 cache-size:
61 cache-unified: true
118 cache-sets:
123 cache-sets:
147 - cache-level
148 - cache-sets
149 - cache-size
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| H A D | sifive-l2-cache.yaml | 44 cache-block-size:
47 cache-level:
50 cache-sets:
53 cache-size:
56 cache-unified: true
110 cache-sets:
115 cache-sets:
123 - cache-level
124 - cache-sets
125 - cache-size
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| /freebsd/sys/contrib/device-tree/Bindings/cache/ |
| H A D | sifive,ccache0.yaml | 51 cache-block-size:
54 cache-level:
57 cache-sets:
60 cache-size:
63 cache-unified: true
122 cache-sets:
127 cache-sets:
151 - cache-level
152 - cache-sets
153 - cache-size
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| H A D | l2c2x0.yaml | 35 - arm,l220-cache
36 - arm,l210-cache
57 cache-level:
60 cache-unified: true
61 cache-size: true
62 cache-sets: true
63 cache-block-size: true
64 cache-line-size: true
118 cache-id-part:
224 - cache-unified
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| /freebsd/sys/contrib/device-tree/src/arm64/apple/ |
| H A D | t6002.dtsi | 74 i-cache-size = <0x20000>;
75 d-cache-size = <0x10000>;
208 compatible = "cache";
209 cache-level = <2>;
210 cache-unified;
215 compatible = "cache";
216 cache-level = <2>;
217 cache-unified;
222 compatible = "cache";
223 cache-level = <2>;
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| H A D | t600x-common.dtsi | 66 i-cache-size = <0x20000>;
67 d-cache-size = <0x10000>;
200 compatible = "cache";
201 cache-level = <2>;
202 cache-unified;
207 compatible = "cache";
208 cache-level = <2>;
209 cache-unified;
214 compatible = "cache";
215 cache-level = <2>;
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| /freebsd/cddl/compat/opensolaris/lib/libumem/ |
| H A D | umem.c | 109 if(cache == NULL) in umem_cache_create()
112 cache->constructor = constructor; in umem_cache_create()
113 cache->destructor = destructor; in umem_cache_create()
115 cache->bufsize = bufsize; in umem_cache_create()
117 return cache; in umem_cache_create()
125 void *buf = malloc(cache->bufsize); in umem_cache_alloc()
135 if(cache->constructor != NULL) { in umem_cache_alloc()
136 if(cache->constructor(buf, cache->callback_data, flags) != 0) { in umem_cache_alloc()
155 if(cache->destructor != NULL) in umem_cache_free()
156 cache->destructor(buffer, cache->callback_data); in umem_cache_free()
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| /freebsd/sys/contrib/device-tree/src/arm64/amd/ |
| H A D | elba-16core.dtsi | 75 compatible = "cache";
76 cache-unified;
77 cache-level = <2>;
114 compatible = "cache";
115 cache-unified;
116 cache-level = <2>;
153 compatible = "cache";
154 cache-unified;
155 cache-level = <2>;
193 cache-unified;
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| /freebsd/sys/cam/scsi/ |
| H A D | scsi_enc_safte.c | 393 cache->elm_map[oid].encstat[0] = in safte_process_status()
411 cache->elm_map[oid].encstat[0] = in safte_process_status()
436 cache->elm_map[oid++].svalid = 1; in safte_process_status()
474 cache->elm_map[oid].encstat[0] = in safte_process_status()
538 cache->elm_map[oid].encstat[0] = in safte_process_status()
544 cache->elm_map[oid++].svalid = 1; in safte_process_status()
561 cache->elm_map[oid++].svalid = 1; in safte_process_status()
620 cache->elm_map[oid++].svalid = 1; in safte_process_status()
651 cache->elm_map[oid++].svalid = 1; in safte_process_status()
655 cache->enc_status = in safte_process_status()
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8qm.dtsi | 70 i-cache-sets = <256>;
73 d-cache-sets = <128>;
87 i-cache-sets = <256>;
90 d-cache-sets = <128>;
104 i-cache-sets = <256>;
107 d-cache-sets = <128>;
160 cache-level = <2>;
161 cache-unified;
164 cache-sets = <1024>;
169 cache-level = <2>;
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| H A D | fsl-lx2160a.dtsi | 37 d-cache-sets = <128>;
40 i-cache-sets = <192>;
54 d-cache-sets = <128>;
303 cache-unified;
312 cache-unified;
321 cache-unified;
330 cache-unified;
339 cache-unified;
348 cache-unified;
357 cache-unified;
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| H A D | imx8qxp.dtsi | 65 i-cache-sets = <256>;
68 d-cache-sets = <128>;
82 i-cache-sets = <256>;
85 d-cache-sets = <128>;
99 i-cache-sets = <256>;
102 d-cache-sets = <128>;
116 i-cache-sets = <256>;
119 d-cache-sets = <128>;
128 cache-level = <2>;
129 cache-unified;
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sm4450.dtsi | 48 L2_0: l2-cache {
51 cache-unified;
54 L3_0: l3-cache {
57 cache-unified;
75 cache-unified;
93 cache-unified;
111 cache-unified;
129 cache-unified;
147 cache-unified;
165 cache-unified;
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| /freebsd/sys/contrib/device-tree/Bindings/nds32/ |
| H A D | atl2c.txt | 1 * Andestech L2 cache Controller
3 The level-2 cache controller plays an important role in reducing memory latency
5 Level-2 cache controller in general enhances overall system performance
10 representation of an Andestech L2 cache controller.
17 - reg : Physical base address and size of cache controller's memory mapped
18 - cache-unified : Specifies the cache is a unified cache.
19 - cache-level : Should be set to 2 for a level 2 cache.
23 cache-controller@e0500000 {
26 cache-unified;
27 cache-level = <2>;
|
| /freebsd/contrib/file/magic/Magdir/ |
| H A D | apt | 11 0 name apt-cache-64bit-be
17 0 name apt-cache-32bit-be
23 0 name apt-cache-be
29 >8 ubeshort <10 APT cache data, version %u
31 >>0 use apt-cache-64bit-be
36 >>0 use \^apt-cache-64bit-be
41 >>0 use apt-cache-32bit-be
42 >4 ubyte >9 APT cache data, version %u
44 >>0 use apt-cache-be
49 >>0 use \^apt-cache-32bit-be
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| /freebsd/sys/contrib/device-tree/src/riscv/sifive/ |
| H A D | fu540-c000.dtsi | 29 i-cache-sets = <128>;
30 i-cache-size = <16384>;
46 d-cache-sets = <64>;
52 i-cache-sets = <64>;
73 d-cache-sets = <64>;
79 i-cache-sets = <64>;
100 d-cache-sets = <64>;
106 i-cache-sets = <64>;
127 d-cache-sets = <64>;
305 cache-level = <2>;
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