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/qemu/tests/tcg/cris/bare/
H A Dcheck_cmpc.s7 cmp.d -2,r3
12 cmp.d 1,r3
16 move.d 0xffff,r3
17 cmp.d -0xffff,r3
22 cmp.d 1,r3
26 move.d 0x78134452,r3
27 cmp.d -0x5432f789,r3
41 move.d 0xffff,r3
46 move.d 0xfedaffff,r3
51 move.d 0x78134452,r3
[all …]
H A Dcheck_subc.s8 sub.d -2,r3
13 sub.d 1,r3
17 move.d 0xffff,r3
18 sub.d -0xffff,r3
23 sub.d 1,r3
27 move.d 0x78134452,r3
28 sub.d -0x5432f789,r3
42 move.d 0xffff,r3
47 move.d 0xfedaffff,r3
52 move.d 0x78134452,r3
[all …]
H A Dcheck_subm.s14 move.d x,r5
15 sub.d [r5+],r3
20 sub.d [r5],r3
25 move.d 0xffff,r3
26 sub.d [r5+],r3
31 sub.d [r5+],r3
35 move.d 0x78134452,r3
36 sub.d [r5+],r3
50 move.d 0xffff,r3
55 move.d 0xfedaffff,r3
[all …]
H A Dcheck_addm.s14 move.d x,r5
15 add.d [r5+],r3
20 add.d [r5],r3
25 move.d 0xffff,r3
26 add.d [r5+],r3
31 add.d [r5+],r3
35 move.d 0x78134452,r3
36 add.d [r5+],r3
50 move.d 0xffff,r3
55 move.d 0xfedaffff,r3
[all …]
H A Dcheck_cmpm.s14 move.d x,r5
15 cmp.d [r5+],r3
20 cmp.d [r5],r3
25 move.d 0xffff,r3
26 cmp.d [r5+],r3
31 cmp.d [r5+],r3
35 move.d 0x78134452,r3
36 cmp.d [r5+],r3
50 move.d 0xffff,r3
55 move.d 0xfedaffff,r3
[all …]
H A Dcheck_btst.s27 move.d 0x5a67f19f,r3
31 move.d 0xda67f19f,r3
32 move.d 29,r4
36 move.d 0xda67f19f,r3
37 move.d 32,r4
41 move.d 0xda67f191,r3
42 move.d 33,r4
84 move.d 0x1111,r3
88 ;; move.d 0xff, $r0
92 ;; and.d 0xff, $r0
[all …]
H A Dcheck_boundc.s8 bound.d 2,r3
13 bound.d 0xffffffff,r3
17 move.d 0xffff,r3
18 bound.d 0xffff,r3
23 bound.d 0xffffffff,r3
27 move.d 0x78134452,r3
28 bound.d 0x5432f789,r3
47 move.d 0xffff,r3
52 move.d 0xfedaffff,r3
77 move.d 0xff,r3
[all …]
H A Dcheck_orm.s13 move.d x,r5
14 or.d [r5+],r3
18 or.d [r5],r3
22 move.d 0xf0ff,r3
23 or.d [r5+],r3
27 or.d [r5+],r3
30 move.d 0x78134452,r3
31 or.d [r5+],r3
34 move.d 0xffff0001,r3
44 move.d 0xfedaffaf,r3
[all …]
H A Dcheck_orc.s7 or.d 2,r3
12 or.d 1,r3
16 move.d 0xf0ff,r3
17 or.d 0xff0f,r3
22 or.d -1,r3
26 move.d 0x78134452,r3
27 or.d 0x5432f789,r3
31 move.d 0xffff0001,r3
41 move.d 0xfedaffaf,r3
46 move.d 0x78134452,r3
[all …]
H A Dcheck_lapc.s10 lapc.d 0f,r3
12 sub.d .,r3
17 sub.d .,r3
20 lapc.d .,r3
21 sub.d .,r3
25 sub.d .,r3
32 lapc.d 0b,r3
33 sub.d .,r3
37 lapc.d 0f,r3
39 sub.d .,r3
[all …]
H A Dcheck_xarith.s12 move.d $r0, $r3
14 move.d $r1, $r3
17 move.d 0, $r0
23 move.d $r0, $r3
25 move.d $r1, $r3
50 move.d $r0, $r1
54 or.d $r1, $r2
59 move.d $r0, $r4
60 move.d $r1, $r5
61 move.d $r2, $r6
[all …]
H A Dcheck_andm.s13 move.d x,r5
14 and.d [r5+],r3
19 and.d [r5],r3
24 move.d 0xffff,r3
25 and.d [r5+],r3
30 and.d [r5+],r3
34 move.d 0x78134452,r3
35 and.d [r5+],r3
49 move.d 0xfffff,r3
55 move.d 0xfedaffaf,r3
[all …]
H A Dcheck_andc.s7 and.d 2,r3
12 and.d -1,r3
16 move.d 0xffff,r3
17 and.d 0xffff,r3
22 and.d -1,r3
26 move.d 0x78134452,r3
27 and.d 0x5432f789,r3
41 move.d 0xfffff,r3
46 move.d 0xfedaffaf,r3
51 move.d 0x78134452,r3
[all …]
/qemu/hw/ipmi/
H A Dipmi_bt.c39 #define IPMI_BT_GET_CLR_WR(d) (((d) >> IPMI_BT_CLR_WR_BIT) & 0x1) argument
41 #define IPMI_BT_GET_CLR_RD(d) (((d) >> IPMI_BT_CLR_RD_BIT) & 0x1) argument
43 #define IPMI_BT_GET_H2B_ATN(d) (((d) >> IPMI_BT_H2B_ATN_BIT) & 0x1) argument
46 #define IPMI_BT_GET_B2H_ATN(d) (((d) >> IPMI_BT_B2H_ATN_BIT) & 0x1) argument
47 #define IPMI_BT_SET_B2H_ATN(d, v) ((d) = (((d) & ~IPMI_BT_B2H_ATN_MASK) | \ argument
52 #define IPMI_BT_SET_SMS_ATN(d, v) ((d) = (((d) & ~IPMI_BT_SMS_ATN_MASK) | \ argument
56 #define IPMI_BT_GET_HBUSY(d) (((d) >> IPMI_BT_HBUSY_BIT) & 0x1) argument
57 #define IPMI_BT_SET_HBUSY(d, v) ((d) = (((d) & ~IPMI_BT_HBUSY_MASK) | \ argument
61 #define IPMI_BT_SET_BBUSY(d, v) ((d) = (((d) & ~IPMI_BT_BBUSY_MASK) | \ argument
71 #define IPMI_BT_SET_B2H_IRQ_EN(d, v) ((d) = (((d) & ~IPMI_BT_B2H_IRQ_EN_MASK) |\ argument
[all …]
/qemu/tests/tcg/xtensa/
H A Dtest_dfp0_arith.S33 test_op2 add.d, f6, f7, f8, F64_MAX, F64_MAX, \
40 test_op2 add.d, f6, f7, f8, F64_1, F64_PINF, \
45 test_op2 add.d, f0, f1, f2, F64_PINF, F64_NINF, \
52 test_op2 add.d, f9, f10, f11, F64_1, F64_QNAN(1), \
56 test_op2 add.d, f12, f13, f14, F64_1, F64_SNAN(1), \
61 test_op2 add.d, f15, f0, f1, F64_SNAN(1), F64_SNAN(2), \
65 test_op2 add.d, f5, f6, f7, F64_QNAN(1), F64_SNAN(2), \
82 test_op2 mul.d, f0, f1, f2, F64_1 | 1, F64_1 | 1, \
86 test_op2 mul.d, f6, f7, f8, F64_MAX_2, F64_MAX_2, \
94 test_op2 mul.d, f6, f7, f8, F64_PINF, F64_0, \
[all …]
/qemu/host/include/aarch64/host/crypto/
H A Daes-round.h40 "aesd %0.16b, %1.16b" : "+w"(d) : "w"(k)); in aes_accel_aesd()
41 return d; in aes_accel_aesd()
47 "aese %0.16b, %1.16b" : "+w"(d) : "w"(k)); in aes_accel_aese()
48 return d; in aes_accel_aese()
54 "aesmc %0.16b, %1.16b" : "=w"(d) : "w"(d)); in aes_accel_aesmc()
55 return d; in aes_accel_aesmc()
61 "aesimc %0.16b, %1.16b" : "=w"(d) : "w"(d)); in aes_accel_aesimc()
62 return d; in aes_accel_aesimc()
71 return d; in aes_accel_aesd_imc()
79 "aesmc %0.16b, %0.16b" : "+w"(d) : "w"(k)); in aes_accel_aese_mc()
[all …]
/qemu/hw/input/
H A Dtrace-events5 adb_device_kbd_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x"
12 adb_device_mouse_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x"
18 adb_bus_request(uint8_t addr, const char *cmd, int size) "device 0x%x %s cmdsize=%d"
20 adb_bus_autopoll_block(bool blocked) "blocked: %d"
33 …ed int modifiers, int set, int xlate) "%p qcode %d down %d modifier 0x%x modifiers 0x%x set %d xla…
35 ps2_set_ledstate(void *s, int ledstate) "%p ledstate %d"
37 ps2_write_keyboard(void *opaque, int val) "%p val %d"
38 ps2_keyboard_set_translation(void *opaque, int mode) "%p mode %d"
39 ps2_mouse_send_packet(void *s, int dx1, int dy1, int dz1, int b) "%p x %d y %d z %d bs 0x%x"
41 ps2_write_mouse(void *opaque, int val) "%p val %d"
[all …]
/qemu/net/
H A Dtrace-events4 …announce_self_iter(const char *id, const char *name, const char *mac, int skip) "%s:%s:%s skip: %d"
5 qemu_announce_timer_del(bool free_named, bool free_timer, char *id) "free named: %d free timer: %d …
8 vhost_user_event(const char *chr, int event) "chr: %s got event: %d"
12 …et_info(const char *sta, uint32_t vnet_hdr, int size) ": %s pkt->vnet_hdr_len = %u, pkt->size = %d"
17 colo_compare_udp_miscompare(const char *sta, int size) ": %s = %d"
18 colo_compare_icmp_miscompare(const char *sta, int size) ": %s = %d"
19 …ssize, const char *stc, const char *std) "ppkt size = %d, ip_src = %s, ip_dst = %s, spkt size = %d…
21 …len, int pdlen, int offset, int flags) "%s: seq/ack= %u/%u hdlen= %d pdlen= %d offset= %d flags=%d"
29 …s, uint8_t cmd, int data_num, int data_size) "vdpa state: %p class: %u cmd: %u sg_num: %d size: %d"
30 …md_retval(void *s, uint8_t class, uint8_t cmd, int r) "vdpa state: %p class: %u cmd: %u retval: %d"
[all …]
/qemu/hw/i386/xen/
H A Dxen_platform.c136 object_unparent(OBJECT(d)); in unplug_nic()
220 DeviceState *dev = DEVICE(d); in pci_xen_ide_unplug()
224 pci_device_reset(d); in pci_xen_ide_unplug()
235 if (pci_device_is_passthrough(d)) in unplug_disks()
241 pci_xen_ide_unplug(d, aux); in unplug_disks()
493 memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d, in platform_ioport_bar_setup()
522 memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d, in platform_mmio_setup()
566 platform_ioport_bar_setup(d); in xen_platform_realize()
570 platform_mmio_setup(d); in xen_platform_realize()
572 &d->mmio_bar); in xen_platform_realize()
[all …]
/qemu/hw/fsi/
H A Dtrace-events1 fsi_scratchpad_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
2 fsi_scratchpad_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x%…
3 fsi_slave_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
4 fsi_slave_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x%"PRIx…
5 fsi_cfam_config_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
6 fsi_cfam_config_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x…
7 fsi_cfam_unimplemented_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
10 fsi_master_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
11 fsi_master_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x%"PRI…
12 fsi_aspeed_apb2opb_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
[all …]
/qemu/hw/rtc/
H A Dm48t59-isa.c64 M48txxISAState *d = M48TXX_ISA(obj); in m48txx_isa_read() local
65 return m48t59_read(&d->state, addr); in m48txx_isa_read()
70 M48txxISAState *d = M48TXX_ISA(obj); in m48txx_isa_write() local
71 m48t59_write(&d->state, addr, val); in m48txx_isa_write()
76 M48txxISAState *d = M48TXX_ISA(obj); in m48txx_isa_toggle_lock() local
77 m48t59_toggle_lock(&d->state, lock); in m48txx_isa_toggle_lock()
89 M48txxISAState *isa = M48TXX_ISA(d); in m48t59_reset_isa()
100 M48t59State *s = &d->state; in m48t59_isa_realize()
102 if (d->isairq >= ISA_NUM_IRQS) { in m48t59_isa_realize()
112 if (d->io_base != 0) { in m48t59_isa_realize()
[all …]
/qemu/migration/
H A Dtrace-events5 qemu_loadvm_state_section_command(int ret) "%d"
7 qemu_loadvm_state_post_main(int ret) "%d"
14 loadvm_handle_cmd_packaged_main(int ret) "%d"
71 …ar *name, int field_version, int version, int result) "%s:%s field_version %d version %d result %d"
160 migrate_send_rp_message(int msg_type, uint16_t len) "%d: len %d"
191 process_incoming_migration_co_end(int ret, int ps) "ret=%d postcopy-state=%d"
243 … int nb_sent, int nb_chunks) "(%d) Not clobbering: block: %d chunk %" PRIu64 " current %" PRIu64 "…
290 postcopy_ram_fault_thread_fds_core(int baseufd, int quitfd) "ufd: %d quitfd: %d"
315 migration_fd_outgoing(int fd) "fd=%d"
316 migration_fd_incoming(int fd) "fd=%d"
[all …]
/qemu/hw/net/
H A Dtrace-events52 pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) "s=%p INTA=%d<=%d"
54 pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) "s=%p rlen=%d tlen=%d"
107 …isabled(bool link_up, bool rx_enabled, bool pci_master) "link_up: %d, rx_enabled %d, pci_master %d"
133 …) "Set link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control …
134 …) "Get link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control …
136 …k_up, bool full_dplx, uint32_t speed, uint32_t asdv) "Link up: %d, Duplex: %d, Speed: %d, ASDV: %d"
182 …d, new_ex_dis: %d, L4 header protocol %d, has_ext_headers %d, ex_dst_valid %d, ex_src_valid %d, mr…
184 …ta_protocols(bool hasip4, bool hasip6, int l4hdr_protocol) "protocols: ip4: %d, ip6: %d, l4hdr: %d"
380 sunhme_tx_xsum_add(int offset, int len) "adding xsum at offset %d, len %d"
434 imx_phy_read(uint32_t val, int phy, int reg) "0x%04"PRIx32" <= phy[%d].reg[%d]"
[all …]
H A Dlance.c51 SysBusPCNetState *d = opaque; in parent_lance_reset() local
53 pcnet_h_reset(&d->state); in parent_lance_reset()
59 SysBusPCNetState *d = opaque; in lance_mem_write() local
68 SysBusPCNetState *d = opaque; in lance_mem_read() local
106 SysBusPCNetState *d = SYSBUS_PCNET(dev); in lance_realize() local
107 PCNetState *s = &d->state; in lance_realize()
109 memory_region_init_io(&s->mmio, OBJECT(d), &lance_mem_ops, d, in lance_realize()
125 SysBusPCNetState *d = SYSBUS_PCNET(dev); in lance_reset() local
127 pcnet_h_reset(&d->state); in lance_reset()
132 SysBusPCNetState *d = SYSBUS_PCNET(obj); in lance_instance_init() local
[all …]
/qemu/hw/pci-bridge/
H A Dcxl_root_port.c60 static uint8_t cxl_rp_aer_vector(const PCIDevice *d) in DECLARE_INSTANCE_CHECKER()
62 switch (msi_nr_vectors_allocated(d)) { in DECLARE_INSTANCE_CHECKER()
93 static void cxl_rp_interrupts_uninit(PCIDevice *d) in cxl_rp_interrupts_uninit() argument
95 msi_uninit(d); in cxl_rp_interrupts_uninit()
234 static void cxl_rp_aer_vector_update(PCIDevice *d) in cxl_rp_aer_vector_update() argument
239 pcie_aer_root_set_vector(d, rpc->aer_vector(d)); in cxl_rp_aer_vector_update()
248 pci_get_long(d->config + d->exp.aer_cap + PCI_ERR_ROOT_COMMAND); in cxl_rp_write_config()
250 pcie_cap_slot_get(d, &slt_ctl, &slt_sta); in cxl_rp_write_config()
251 pci_bridge_write_config(d, address, val, len); in cxl_rp_write_config()
252 cxl_rp_aer_vector_update(d); in cxl_rp_write_config()
[all …]

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