/qemu/target/i386/tcg/sysemu/ |
H A D | svm_helper.c | 668 uint32_t t0, t1; in cpu_svm_check_intercept_param() local 673 t1 = (env->regs[R_ECX] * 2) / 8; in cpu_svm_check_intercept_param() 677 t1 = (t0 / 8); in cpu_svm_check_intercept_param() 682 t1 = (t0 / 8); in cpu_svm_check_intercept_param() 688 t1 = 0; in cpu_svm_check_intercept_param() 691 if (x86_ldub_phys(cs, addr + t1) & ((1 << param) << t0)) { in cpu_svm_check_intercept_param()
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/qemu/tests/avocado/acpi-bits/bits-tests/ |
H A D | smilatency.py2 | 78 deltas = (bits.format_tsc(t2 - t1) for t1,t2 in zip(bin.times, bin.times[1:]))
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/qemu/tcg/arm/ |
H A D | tcg-target.c.inc | 2857 TCGv_vec v0, v1, v2, t1, t2, c1; 2882 t1 = tcg_temp_new_vec(type); 2883 tcg_gen_neg_vec(vece, t1, v2); 2891 tcg_temp_free_vec(t1); 2895 t1 = tcg_temp_new_vec(type); 2899 tcg_temp_free_vec(t1); 2904 t1 = tcg_temp_new_vec(type); 2913 tcg_temp_free_vec(t1); 2918 t1 = tcg_temp_new_vec(type); 2921 tcg_gen_neg_vec(vece, t1, v2); [all …]
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/qemu/target/arm/tcg/ |
H A D | translate-sve.c | 3058 TCGv_i64 op0, op1, t0, t1, tmax; in trans_WHILE() local 3095 t1 = tcg_temp_new_i64(); in trans_WHILE() 3131 tcg_gen_movi_i64(t1, maxval); in trans_WHILE() 3139 tcg_gen_movi_i64(t1, 0); in trans_WHILE() 3166 TCGv_i64 op0, op1, diff, t1, tmax; in trans_WHILE_ptr() local 3188 t1 = tcg_temp_new_i64(); in trans_WHILE_ptr() 4051 t1 = tcg_temp_new_i64(); in gen_sve_ldr() 4079 t1 = tcg_temp_new_i64(); in gen_sve_ldr() 4113 t1 = tcg_temp_new_i64(); in gen_sve_ldr() 4154 t1 = tcg_temp_new_i64(); in gen_sve_str() [all …]
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H A D | translate-neon.c | 3583 static void gen_neon_trn_u8(TCGv_i32 t0, TCGv_i32 t1) in gen_neon_trn_u8() argument 3592 tcg_gen_andi_i32(tmp, t1, 0x00ff00ff); in gen_neon_trn_u8() 3595 tcg_gen_shri_i32(t1, t1, 8); in gen_neon_trn_u8() 3596 tcg_gen_andi_i32(t1, t1, 0x00ff00ff); in gen_neon_trn_u8() 3598 tcg_gen_or_i32(t1, t1, tmp); in gen_neon_trn_u8() 3602 static void gen_neon_trn_u16(TCGv_i32 t0, TCGv_i32 t1) in gen_neon_trn_u16() argument 3610 tcg_gen_andi_i32(tmp, t1, 0xffff); in gen_neon_trn_u16() 3612 tcg_gen_shri_i32(t1, t1, 16); in gen_neon_trn_u16() 3614 tcg_gen_or_i32(t1, t1, tmp); in gen_neon_trn_u16()
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H A D | pauth_helper.c | 143 int i0, i4, i8, ic, t0, t1, t2, t3; in pac_mult() local 151 t1 = rot_cell(ic, 1) ^ rot_cell(i4, 1) ^ rot_cell(i0, 2); in pac_mult() 157 o |= (uint64_t)t1 << (b + 8 * 4); in pac_mult()
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H A D | gengvec.c | 1390 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_sqadd_d() local 1396 tcg_gen_xor_i64(t1, a, b); in gen_sqadd_d() 1398 tcg_gen_andc_i64(t1, t2, t1); in gen_sqadd_d() 1404 tcg_gen_movcond_i64(TCG_COND_LT, res, t1, tcg_constant_i64(0), t2, t0); in gen_sqadd_d() 1535 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_sqsub_d() local 1541 tcg_gen_xor_i64(t1, a, b); in gen_sqsub_d() 1543 tcg_gen_and_i64(t1, t1, t2); in gen_sqsub_d() 1549 tcg_gen_movcond_i64(TCG_COND_LT, res, t1, tcg_constant_i64(0), t2, t0); in gen_sqsub_d()
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H A D | vec_helper.c | 2723 float32 t1, t2; in DO_MMLA_B() local 2729 t1 = float32_mul(e1 << 16, e2 << 16, &bf_status); in DO_MMLA_B() 2731 t1 = float32_add(t1, t2, &bf_status); in DO_MMLA_B() 2732 t1 = float32_add(sum, t1, &bf_status); in DO_MMLA_B() 2734 return t1; in DO_MMLA_B()
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/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_arith.c.inc | 114 TCGv t1 = tcg_temp_new(); 126 tcg_gen_setcondi_tl(TCG_COND_EQ, t1, src2, 0); 128 tcg_gen_or_tl(ret, ret, t1);
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/qemu/tcg/ |
H A D | optimize.c | 930 TCGArg t1 = arg_new_temp(ctx); in do_constant_folding_cond2() local 933 op1->args[0] = t1; in do_constant_folding_cond2() 940 args[0] = t1; in do_constant_folding_cond2() 1026 uint64_t t1 = arg_info(op->args[1])->val; in fold_const2() local 1029 t1 = do_constant_folding(op->opc, ctx->type, t1, t2); in fold_const2() 1030 return tcg_opt_gen_movi(ctx, op, op->args[0], t1); in fold_const2() 1597 uint64_t t1 = arg_info(op->args[1])->val; in fold_deposit() local 1600 t1 = deposit64(t1, op->args[3], op->args[4], t2); in fold_deposit() 1601 return tcg_opt_gen_movi(ctx, op, op->args[0], t1); in fold_deposit()
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H A D | tcg.c | 2342 tcg_gen_callN(func, info, ret, &t1); in tcg_gen_call1() 2346 TCGTemp *t1, TCGTemp *t2) in tcg_gen_call2() argument 2348 TCGTemp *args[2] = { t1, t2 }; in tcg_gen_call2() 2353 TCGTemp *t1, TCGTemp *t2, TCGTemp *t3) in tcg_gen_call3() argument 2355 TCGTemp *args[3] = { t1, t2, t3 }; in tcg_gen_call3() 2360 TCGTemp *t1, TCGTemp *t2, TCGTemp *t3, TCGTemp *t4) in tcg_gen_call4() argument 2362 TCGTemp *args[4] = { t1, t2, t3, t4 }; in tcg_gen_call4() 2369 TCGTemp *args[5] = { t1, t2, t3, t4, t5 }; in tcg_gen_call5() 2374 TCGTemp *t1, TCGTemp *t2, TCGTemp *t3, in tcg_gen_call6() argument 2377 TCGTemp *args[6] = { t1, t2, t3, t4, t5, t6 }; in tcg_gen_call6() [all …]
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H A D | tci.c | 376 tcg_target_ulong t1; in tcg_qemu_tb_exec() local 479 tci_args_ri(insn, &r0, &t1); in tcg_qemu_tb_exec() 480 regs[r0] = t1; in tcg_qemu_tb_exec()
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/qemu/tcg/ppc/ |
H A D | tcg-target.c.inc | 1083 TCGReg t1 = dst == src ? dst : TCG_REG_R0; 1106 tcg_out_rld(s, RLDICL, t1, src, 32, 0); 1109 tcg_out_rlw(s, RLWIMI, t0, t1, 8, 0, 31); 1111 tcg_out_rlw(s, RLWIMI, t0, t1, 24, 0, 7); 3907 TCGv_vec t1; 3920 t1 = tcg_constant_vec(type, MO_8, imm); 3962 TCGv_vec t1; 3963 t1 = v1, v1 = v2, v2 = t1; 3978 TCGv_vec t1 = tcg_temp_new_vec(type); 4014 tcg_gen_add_vec(MO_32, v0, t1, t2); [all …]
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/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 50 "t1", 2471 /* t1 = 000a */ 2477 /* t1 = 0abc */ 2481 /* t1 = 00b0 */ 2507 /* t1 = 0abc */ 2511 /* t1 = 00b0 */ 2525 /* t1 = 0000000a */ 2532 /* t1 = 00000abc */ 2536 /* t1 = 000000b0 */ 2546 /* t1 = 000000c0 */ [all …]
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/qemu/tests/avocado/ |
H A D | replay_kernel.py | 76 t1 = self.run_vm(kernel_path, kernel_command_line, console_pattern, 81 logger.info('replay overhead {:.2%}'.format(t2 / t1 - 1))
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/qemu/target/riscv/insn_trans/ |
H A D | trans_rvv.c.inc | 2268 TCGv_i64 t1; 2281 t1 = tcg_temp_new_i64(); 2282 do_nanbox(s, t1, cpu_fpr[rs1]); 2622 TCGv_i64 t1; 3279 TCGv_i64 t1; 3282 t1 = tcg_temp_new_i64(); 3304 TCGv_i64 t1; 3310 t1 = tcg_temp_new_i64(); 3317 tcg_gen_ext_tl_i64(t1, s1); 3364 TCGv_i64 t1; [all …]
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H A D | trans_rvm.c.inc | 138 TCGv t1 = tcg_temp_new(); 141 tcg_gen_ext32s_tl(t1, arg1); 143 tcg_gen_mul_tl(ret, t1, t2);
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/qemu/target/cris/ |
H A D | op_helper.c | 197 uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs) in helper_btst() argument 212 sbit = t1 & 31; in helper_btst()
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H A D | translate_v10.c.inc | 73 TCGv t1 = tcg_temp_new(); 81 tcg_gen_andi_tl(t1, cpu_PR[PR_CCS], F_FLAG_V10); 82 tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); 87 tcg_gen_shri_tl(t1, t1, 1); /* shift F to P position */ 88 tcg_gen_or_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], t1); /*P=F*/
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/qemu/target/hppa/ |
H A D | translate.c | 386 TCGv_i64 t1 = tcg_temp_new_i64(); in cond_make_vv() local 389 tcg_gen_mov_i64(t1, a1); in cond_make_vv() 390 return cond_make_tt(c, t0, t1); in cond_make_vv() 948 TCGv_i64 t1 = tcg_temp_new_i64(); in do_sub_cond() local 952 tcg_gen_ext32u_i64(t1, in1); in do_sub_cond() 955 tcg_gen_ext32s_i64(t1, in1); in do_sub_cond() 958 return cond_make_tt(tc, t1, t2); in do_sub_cond() 3266 TCGv_i64 r, t0, t1, t2, t3; in trans_permh() local 3276 t1 = tcg_temp_new_i64(); in trans_permh() 4027 TCGv_i64 t1 = tcg_temp_new_i64(); in trans_blr() local [all …]
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/qemu/tests/tcg/multiarch/ |
H A D | sha512.c | 264 uint64_t t1 = *h + Sigma1(e) + Ch(e, f, g) + k + w; in Round() local 266 *d += t1; in Round() 267 *h = t1 + t2; in Round()
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/qemu/target/i386/tcg/ |
H A D | translate.c | 2299 TCGv_i128 t1 = tcg_temp_new_i128(); in gen_jmp_rel() 2303 tcg_gen_qemu_ld_i128(t1, s->tmp0, mem_index, mop); in gen_jmp_rel() 2306 tcg_gen_st_i128(t1, tcg_env, offset + offsetof(YMMReg, YMM_X(1))); in gen_jmp_rel() 2379 TCGv_i64 t0, t1; in gen_sto_env_A0() 2400 t1 = tcg_temp_new_i64(); in gen_ldy_env_A0() 2402 tcg_gen_xor_i64(t1, s->T1, cpu_regs[R_EDX]); in gen_ldy_env_A0() 2403 tcg_gen_or_i64(t0, t0, t1); 2394 TCGv_i128 t1 = tcg_temp_new_i128(); gen_ldy_env_A0() local 2474 TCGv_i64 t0, t1; gen_cmpxchg16b() local
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/qemu/migration/ |
H A D | ram.c | 3188 uint64_t t1 = (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - t0) / in ram_save_iterate() local 3190 if (t1 > MAX_WAIT) { in ram_save_iterate() 3191 trace_ram_save_iterate_big_wait(t1, i); in ram_save_iterate()
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/qemu/ |
H A D | qemu-img.c | 4524 struct timeval t1, t2; in img_bench() local 4735 gettimeofday(&t1, NULL); in img_bench() 4744 (t2.tv_sec - t1.tv_sec) in img_bench() 4745 + ((double)(t2.tv_usec - t1.tv_usec) / 1000000)); in img_bench()
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/qemu/target/ppc/ |
H A D | fpu_helper.c | 1254 static inline uint32_t evcmp_merge(int t0, int t1) in evcmp_merge() argument 1256 return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1); in evcmp_merge()
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