| /dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | rs780_dpm.c | 385 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_force_voltage()
401 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_force_voltage()
411 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_force_fbdiv()
421 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_force_fbdiv()
539 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_enable_voltage_scaling()
559 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_enable_voltage_scaling()
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| H A D | rs780d.h | 167 #define GFX_MACRO_BYPASS_CNTL 0x30c0 macro
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
| H A D | rs780_dpm.c | 386 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_force_voltage()
402 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_force_voltage()
412 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_force_fbdiv()
422 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_force_fbdiv()
540 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_enable_voltage_scaling()
560 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_enable_voltage_scaling()
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| H A D | rs780d.h | 167 #define GFX_MACRO_BYPASS_CNTL 0x30c0 macro
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| H A D | r600d.h | 1552 #define GFX_MACRO_BYPASS_CNTL 0x30c0 macro
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| H A D | r600.c | 218 WREG32_P(GFX_MACRO_BYPASS_CNTL, UPLL_BYPASS_CNTL, in r600_set_uvd_clocks()
280 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~UPLL_BYPASS_CNTL); in r600_set_uvd_clocks()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
| H A D | rs780_dpm.c | 386 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_force_voltage()
402 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_force_voltage()
412 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_force_fbdiv()
422 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_force_fbdiv()
540 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_enable_voltage_scaling()
560 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_enable_voltage_scaling()
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| H A D | rs780d.h | 167 #define GFX_MACRO_BYPASS_CNTL 0x30c0 macro
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| H A D | r600d.h | 1552 #define GFX_MACRO_BYPASS_CNTL 0x30c0 macro
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| H A D | r600.c | 218 WREG32_P(GFX_MACRO_BYPASS_CNTL, UPLL_BYPASS_CNTL, in r600_set_uvd_clocks()
280 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~UPLL_BYPASS_CNTL); in r600_set_uvd_clocks()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
| H A D | rs780_dpm.c | 386 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_force_voltage()
402 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_force_voltage()
412 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_force_fbdiv()
422 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_force_fbdiv()
540 WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); in rs780_enable_voltage_scaling()
560 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); in rs780_enable_voltage_scaling()
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| H A D | rs780d.h | 167 #define GFX_MACRO_BYPASS_CNTL 0x30c0 macro
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| H A D | r600d.h | 1552 #define GFX_MACRO_BYPASS_CNTL 0x30c0 macro
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| H A D | r600.c | 218 WREG32_P(GFX_MACRO_BYPASS_CNTL, UPLL_BYPASS_CNTL, in r600_set_uvd_clocks()
280 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~UPLL_BYPASS_CNTL); in r600_set_uvd_clocks()
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