/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/ |
H A D | s390-opc.c | 277 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | s390-opc.c | 277 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | s390-opc.c | 277 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro
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/dports/devel/djgpp-binutils/binutils-2.17/opcodes/ |
H A D | s390-opc.c | 294 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro
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/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/ |
H A D | s390-dis.c | 704 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 869 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 889 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 898 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/devel/avr-gdb/gdb-7.3.1/opcodes/ |
H A D | s390-opc.c | 416 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } macro
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/dports/emulators/qemu/qemu-6.2.0/disas/ |
H A D | s390.c | 771 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 962 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 982 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 991 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/emulators/qemu42/qemu-4.2.1/disas/ |
H A D | s390.c | 771 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 962 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 982 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 991 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/emulators/qemu5/qemu-5.2.0/disas/ |
H A D | s390.c | 771 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 962 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 982 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 991 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/emulators/qemu60/qemu-6.0.0/disas/ |
H A D | s390.c | 771 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 962 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 982 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 991 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/ |
H A D | s390.c | 772 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 963 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 983 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 992 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/emulators/qemu-utils/qemu-4.2.1/disas/ |
H A D | s390.c | 771 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 962 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 982 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 991 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/ |
H A D | s390.c | 771 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 962 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 982 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 991 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/ |
H A D | s390.c | 771 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 962 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 982 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 991 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/ |
H A D | s390.c | 771 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } macro 962 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 982 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, 991 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2},
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/dports/devel/gdb761/gdb-7.6.1/opcodes/ |
H A D | s390-opc.c | 549 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } macro
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/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/ |
H A D | s390-opc.c | 602 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } macro
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/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/ |
H A D | s390-opc.c | 602 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } macro
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/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/ |
H A D | s390-opc.c | 626 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } macro
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/dports/devel/gdb/gdb-11.1/opcodes/ |
H A D | s390-opc.c | 626 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } macro
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/dports/devel/gnulibiberty/binutils-2.37/opcodes/ |
H A D | s390-opc.c | 626 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } macro
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/dports/devel/binutils/binutils-2.37/opcodes/ |
H A D | s390-opc.c | 626 #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } macro
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