/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonMapAsm2IntrinV62.gen.td | 9 multiclass T_VR_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> { 10 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2), 25 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2), 32 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2), 39 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2, HvxVR:$src3), 47 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2), 70 def: Pat<(IntID HvxQR:$src1, IntRegs:$src2), 85 def: Pat<(IntID HvxQR:$src1, HvxVR:$src2), 92 def: Pat<(IntID IntRegs:$src1), 99 def: Pat<(IntID HvxQR:$src1, HvxQR:$src2), [all …]
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H A D | HexagonIntrinsicsV60.td | 84 multiclass T_R_pat <InstHexagon MI, Intrinsic IntID> { 91 def: Pat<(IntID HvxVR:$src1), 99 def: Pat<(IntID HvxWR:$src1), 107 def: Pat<(IntID HvxQR:$src1), 115 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2), 123 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2), 131 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2), 139 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2), 147 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2), 155 def: Pat<(IntID HvxQR:$src1, IntRegs:$src2), [all …]
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H A D | HexagonIntrinsics.td | 11 class T_R_pat <InstHexagon MI, Intrinsic IntID> 12 : Pat <(IntID I32:$Rs), 15 class T_RR_pat <InstHexagon MI, Intrinsic IntID> 16 : Pat <(IntID I32:$Rs, I32:$Rt), 19 class T_RP_pat <InstHexagon MI, Intrinsic IntID> 20 : Pat <(IntID I32:$Rs, I64:$Rt), 187 : Pat<(IntID I32:$Rs, Val:$Rt, I32:$Ru), 372 def: Pat<(!cast<Intrinsic>(IntID#"_128B") 380 def: Pat<(!cast<Intrinsic>(IntID#"_128B") 398 def: Pat<(!cast<Intrinsic>(IntID#"_128B") [all …]
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H A D | HexagonOptimizeSZextends.cpp | 47 bool intrinsicAlreadySextended(Intrinsic::ID IntID); 56 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended() argument 57 switch(IntID) { in intrinsicAlreadySextended()
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H A D | HexagonVectorCombine.cpp | 126 Value *createHvxIntrinsic(IRBuilderBase &Builder, Intrinsic::ID IntID, 2136 Intrinsic::ID IntID, Type *RetTy, in createHvxIntrinsic() argument 2163 Function *IntrFn = Intrinsic::getDeclaration(F.getParent(), IntID, ArgTys); in createHvxIntrinsic()
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H A D | HexagonISelLowering.cpp | 3837 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_L2_loadw_locked in emitLoadLinked() local 3839 Function *Fn = Intrinsic::getDeclaration(M, IntID); in emitLoadLinked() 3863 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_S2_storew_locked in emitStoreConditional() local 3865 Function *Fn = Intrinsic::getDeclaration(M, IntID); in emitStoreConditional()
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/openbsd/gnu/llvm/llvm/lib/Transforms/ObjCARC/ |
H A D | ARCRuntimeEntryPoints.h | 138 Function *getIntrinsicEntryPoint(Function *&Decl, Intrinsic::ID IntID) { in getIntrinsicEntryPoint() argument 142 return Decl = Intrinsic::getDeclaration(TheModule, IntID); in getIntrinsicEntryPoint()
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrAltivec.td | 268 class VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty> 271 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>; 288 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>; 294 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>; 302 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>; 310 [(set OutTy:$vD, (IntID In1Ty:$vA, In2Ty:$vB))]>; 313 class VX2_Int_SP<bits<11> xo, string opc, Intrinsic IntID> 316 [(set v4f32:$vD, (IntID v4f32:$vB))]>; 324 [(set OutTy:$vD, (IntID InTy:$vB))]>; 329 [(set Ty:$vD, (IntID Ty:$vA))]>; [all …]
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H A D | PPCISelDAGToDAG.cpp | 5155 auto IntID = N->getConstantOperandVal(0); in Select() local 5156 if (IntID == Intrinsic::ppc_fsels) { in Select() 5162 if (IntID == Intrinsic::ppc_bcdadd_p || IntID == Intrinsic::ppc_bcdsub_p) { in Select() 5165 IntID == Intrinsic::ppc_bcdadd_p ? PPC::BCDADD_rec : PPC::BCDSUB_rec; in Select() 5242 switch (IntID) { in Select()
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/openbsd/gnu/llvm/clang/lib/CodeGen/ |
H A D | CGObjC.cpp | 2168 static llvm::Function *getARCIntrinsic(llvm::Intrinsic::ID IntID, in getARCIntrinsic() argument 2170 llvm::Function *fn = CGM.getIntrinsic(IntID); in getARCIntrinsic() 2180 llvm::Function *&fn, llvm::Intrinsic::ID IntID, in emitARCValueOperation() argument 2186 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCValueOperation() 2204 llvm::Intrinsic::ID IntID) { in emitARCLoadOperation() argument 2206 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCLoadOperation() 2227 llvm::Intrinsic::ID IntID, in emitARCStoreOperation() argument 2232 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCStoreOperation() 2251 llvm::Intrinsic::ID IntID) { in emitARCCopyOperation() argument 2255 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCCopyOperation()
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H A D | CodeGenFunction.h | 4227 unsigned IntID); 4230 unsigned IntID); 4242 unsigned IntID); 4245 unsigned IntID); 4248 unsigned IntID);
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H A D | CGBuiltin.cpp | 7563 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); in packTBLDVectorList() 8936 unsigned IntID; in EmitSVEPredicateCast() local 8948 IntID = Intrinsic::aarch64_sve_convert_to_svbool; in EmitSVEPredicateCast() 8953 Function *F = CGM.getIntrinsic(IntID, IntrinsicTy); in EmitSVEPredicateCast() 8984 F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEGatherLoad() 9032 F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEScatterStore() 9093 Function *F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEGatherPrefetch() 9105 switch (IntID) { in EmitSVEStructLoad() 9129 Function *F = CGM.getIntrinsic(IntID, {VTy}); in EmitSVEStructLoad() 9149 switch (IntID) { in EmitSVEStructStore() [all …]
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/openbsd/gnu/llvm/llvm/include/llvm/IR/ |
H A D | GlobalValue.h | 169 Intrinsic::ID IntID = (Intrinsic::ID)0U;
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H A D | Function.h | 204 Intrinsic::ID getIntrinsicID() const LLVM_READONLY { return IntID; } in getIntrinsicID()
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/openbsd/gnu/llvm/llvm/lib/IR/ |
H A D | Function.cpp | 420 if (IntID) in Function() 421 setAttributes(Intrinsic::getAttributes(getContext(), IntID)); in Function() 832 return isTargetIntrinsic(IntID); in isTargetIntrinsic() 880 IntID = Intrinsic::not_intrinsic; in recalculateIntrinsicID() 884 IntID = lookupIntrinsicID(Name); in recalculateIntrinsicID()
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 3214 SDValue IntID = in lowerVECTOR_SHUFFLE() local 3217 IntID, in lowerVECTOR_SHUFFLE() 5742 SDValue IntID = DAG.getTargetConstant( in LowerINTRINSIC_W_CHAIN() local 5846 SDValue IntID = DAG.getTargetConstant( in LowerINTRINSIC_VOID() local 6604 SDValue IntID = DAG.getTargetConstant( in lowerFixedLengthVectorLoadToRVV() local 6606 SmallVector<SDValue, 4> Ops{Load->getChain(), IntID}; in lowerFixedLengthVectorLoadToRVV() 6651 SDValue IntID = DAG.getTargetConstant( in lowerFixedLengthVectorStoreToRVV() local 6698 unsigned IntID = in lowerMaskedLoad() local 6764 unsigned IntID = in lowerMaskedStore() local 7418 unsigned IntID = in lowerMaskedGather() local [all …]
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H A D | RISCVISelDAGToDAG.cpp | 120 SDValue IntID = in PreprocessISelDAG() local 123 IntID, in PreprocessISelDAG()
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 2179 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in computeKnownBitsForTargetNode() local 2180 switch (IntID) { in computeKnownBitsForTargetNode() 22200 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in ReplaceNodeResults() local 22201 switch (IntID) { in ReplaceNodeResults()
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 19876 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in computeKnownBitsForTargetNode() local 19877 switch (IntID) { in computeKnownBitsForTargetNode()
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