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Searched refs:SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7873 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h8542 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h10024 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h10422 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT 0x0 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16031 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT … macro
H A Dgc_9_1_sh_mask.h17340 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h17215 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h19514 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h9464 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h21177 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h23536 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h23507 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h21684 #define SPI_PS_INPUT_CNTL_20__OFFSET__SHIFT … macro