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Searched refs:pixel_rate (Results 1 – 16 of 16) sorted by relevance

/openbsd/sys/dev/pci/drm/i915/display/
H A Dintel_sprite.c233 unsigned int pixel_rate; in vlv_plane_min_cdclk() local
243 pixel_rate = crtc_state->pixel_rate; in vlv_plane_min_cdclk()
247 return DIV_ROUND_UP(pixel_rate * num, den); in vlv_plane_min_cdclk()
532 unsigned int pixel_rate; in ivb_plane_min_cdclk() local
542 pixel_rate = crtc_state->pixel_rate; in ivb_plane_min_cdclk()
546 return DIV_ROUND_UP(pixel_rate * num, den); in ivb_plane_min_cdclk()
552 unsigned int src_w, dst_w, pixel_rate; in ivb_sprite_min_cdclk() local
562 pixel_rate = crtc_state->pixel_rate; in ivb_sprite_min_cdclk()
615 unsigned int pixel_rate = crtc_state->pixel_rate; in hsw_plane_min_cdclk() local
892 unsigned int hscale, pixel_rate; in g4x_sprite_min_cdclk() local
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H A Di9xx_wm.c469 ret = mul_u32_u32(pixel_rate, cpp * latency); in intel_wm_method1()
520 ret = (latency * pixel_rate) / (htotal * 10000); in intel_wm_method2()
558 entries = intel_wm_method1(pixel_rate, cpp, in intel_calculate_wm()
652 int pixel_rate = crtc->config->pixel_rate; in pnv_update_wm() local
903 pixel_rate = crtc_state->pixel_rate; in g4x_compute_wm()
1378 ret = intel_wm_method2(pixel_rate, htotal, in vlv_wm_method2()
1417 pixel_rate = crtc_state->pixel_rate; in vlv_compute_wm_level()
2022 int pixel_rate = crtc->config->pixel_rate; in i965_update_wm() local
2193 int pixel_rate = crtc->config->pixel_rate; in i9xx_update_wm() local
2283 ret = intel_wm_method2(pixel_rate, htotal, in ilk_wm_method2()
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H A Dhsw_ips.c209 crtc_state->pixel_rate > i915->display.cdclk.max_cdclk_freq * 95 / 100) in hsw_crtc_state_ips_capable()
248 if (crtc_state->pixel_rate > cdclk_state->logical.cdclk * 95 / 100) in hsw_ips_compute_config()
H A Di9xx_plane.c396 unsigned int pixel_rate; in i9xx_plane_min_cdclk() local
406 pixel_rate = crtc_state->pixel_rate; in i9xx_plane_min_cdclk()
414 return DIV_ROUND_UP(pixel_rate * num, den); in i9xx_plane_min_cdclk()
H A Dintel_cdclk.c2525 int pixel_rate = crtc_state->pixel_rate; in intel_pixel_rate_to_cdclk() local
2528 return DIV_ROUND_UP(pixel_rate, 2); in intel_pixel_rate_to_cdclk()
2531 return pixel_rate; in intel_pixel_rate_to_cdclk()
2533 return DIV_ROUND_UP(pixel_rate * 100, 95); in intel_pixel_rate_to_cdclk()
2535 return DIV_ROUND_UP(pixel_rate * 100, 90 * 2); in intel_pixel_rate_to_cdclk()
2537 return DIV_ROUND_UP(pixel_rate * 100, 90); in intel_pixel_rate_to_cdclk()
2635 DIV_ROUND_UP(crtc_state->pixel_rate, in intel_crtc_compute_min_cdclk()
2654 min_t(int, crtc_state->pixel_rate, in intel_crtc_compute_min_cdclk()
H A Dintel_modeset_setup.c843 4 * crtc_state->pixel_rate; in intel_modeset_readout_hw_state()
851 DIV_ROUND_UP(crtc_state->pixel_rate, 2); in intel_modeset_readout_hw_state()
854 crtc_state->pixel_rate; in intel_modeset_readout_hw_state()
H A Dskl_universal_plane.c265 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in icl_plane_min_cdclk() local
268 return DIV_ROUND_UP(pixel_rate, 2); in icl_plane_min_cdclk()
289 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in glk_plane_min_cdclk() local
295 return DIV_ROUND_UP(pixel_rate * num, 2 * den); in glk_plane_min_cdclk()
316 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in skl_plane_min_cdclk() local
321 return DIV_ROUND_UP(pixel_rate * num, den); in skl_plane_min_cdclk()
H A Dskl_watermark.c749 crtc_state->pixel_rate, &wp, 0); in skl_cursor_allocation()
1664 skl_wm_method1(const struct drm_i915_private *i915, u32 pixel_rate, in skl_wm_method1() argument
1673 wm_intermediate_val = latency * pixel_rate * cpp; in skl_wm_method1()
1683 skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency, in skl_wm_method2() argument
1692 wm_intermediate_val = latency * pixel_rate; in skl_wm_method2()
1703 u32 pixel_rate; in intel_get_linetime_us() local
1710 pixel_rate = crtc_state->pixel_rate; in intel_get_linetime_us()
1712 if (drm_WARN_ON(&i915->drm, pixel_rate == 0)) in intel_get_linetime_us()
1716 linetime_us = div_fixed16(crtc_htotal * 1000, pixel_rate); in intel_get_linetime_us()
H A Dintel_crtc_state_dump.c320 pipe_config->pixel_rate); in intel_crtc_state_dump()
H A Dintel_display.c2097 u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock; in ilk_pipe_pixel_rate() local
2106 return pixel_rate; in ilk_pipe_pixel_rate()
2113 pixel_rate); in ilk_pipe_pixel_rate()
2143 crtc_state->pixel_rate = in intel_crtc_compute_pixel_rate()
2146 crtc_state->pixel_rate = in intel_crtc_compute_pixel_rate()
4224 crtc_state->pixel_rate); in skl_linetime_wm()
5283 PIPE_CONF_CHECK_I(pixel_rate); in intel_pipe_config_compare()
H A Dintel_atomic_plane.c180 crtc_state->pixel_rate); in intel_plane_pixel_rate()
H A Dintel_display_types.h1108 unsigned int pixel_rate; member
H A Dintel_fbc.c1167 if (crtc_state->pixel_rate >= cdclk_state->logical.cdclk * 95 / 100) { in intel_fbc_check_plane()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/calcs/
H A Ddce_calcs.c270 data->pixel_rate[0] = data->pixel_rate[4]; in calculate_bandwidth()
271 data->pixel_rate[1] = data->pixel_rate[4]; in calculate_bandwidth()
273 data->pixel_rate[2] = data->pixel_rate[5]; in calculate_bandwidth()
274 data->pixel_rate[3] = data->pixel_rate[5]; in calculate_bandwidth()
401 data->pixel_rate[maximum_number_of_surfaces - 2] = data->pixel_rate[5]; in calculate_bandwidth()
402 data->pixel_rate[maximum_number_of_surfaces - 1] = data->pixel_rate[5]; in calculate_bandwidth()
1194 …i] = bw_div(bw_div(data->source_width_rounded_up_to_chunks[i], data->hsr[i]), data->pixel_rate[i]); in calculate_bandwidth()
2020 …t(bw_mul(bw_div(bw_min2(bw_int_to_fixed(600), data->max_phyclk), data->pixel_rate[k]), bw_int_to_f… in calculate_bandwidth()
2022 …(bw_mul(bw_div(bw_mul(bw_int_to_fixed(270), bw_int_to_fixed(4)), data->pixel_rate[k]), bw_int_to_f… in calculate_bandwidth()
2826 data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->timing.pix_clk_100hz, 10000); in populate_initial_data()
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H A Dcalcs_logger.h422 DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] pixel_rate[%d]:%d", i, bw_fixed_to_int(data->pixel_rate[i])); in print_bw_calcs_data()
/openbsd/sys/dev/pci/drm/amd/display/dc/inc/
H A Ddce_calcs.h390 struct bw_fixed pixel_rate[maximum_number_of_surfaces]; member