amd64.esc (b5016cbb) | amd64.esc (e5ba14ff) |
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1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE --- 471 unchanged lines hidden (view full) --- 480prop fault.memory.dimm_ue@chip/memory-controller/dimm/rank (1)-> 481 ereport.memory.dimm_ue_trip@chip/memory-controller/dimm/rank; 482 483prop upset.memory.discard3@chip/cpu 484 { !RESOURCE_EXISTS } (1)-> 485 ereport.cpu.amd.ic.inf_sys_eccm@chip/cpu, 486 ereport.cpu.amd.dc.inf_sys_eccm@chip/cpu, 487 ereport.cpu.amd.bu.s_eccm@chip/cpu, | 1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE --- 471 unchanged lines hidden (view full) --- 480prop fault.memory.dimm_ue@chip/memory-controller/dimm/rank (1)-> 481 ereport.memory.dimm_ue_trip@chip/memory-controller/dimm/rank; 482 483prop upset.memory.discard3@chip/cpu 484 { !RESOURCE_EXISTS } (1)-> 485 ereport.cpu.amd.ic.inf_sys_eccm@chip/cpu, 486 ereport.cpu.amd.dc.inf_sys_eccm@chip/cpu, 487 ereport.cpu.amd.bu.s_eccm@chip/cpu, |
488 ereport.cpu.amd.nb.mem_ce@chip/cpu; | 488 ereport.cpu.amd.nb.mem_ue@chip/cpu; |
489 490/* #CSTESTFAIL# 491 * If the BIOS fails a chip-select during POST, or perhaps after a 492 * sync flood from an uncorrectable error, then on revision F and G it 493 * should mark that chip-select as TestFail in the CS Base register. 494 * When the memory-controller driver discovers all the MC configuration 495 * it notes such failed chip-selects and creates topology nodes for the 496 * chip-select and associated dimms and ranks, and produces an ereport for each --- 517 unchanged lines hidden --- | 489 490/* #CSTESTFAIL# 491 * If the BIOS fails a chip-select during POST, or perhaps after a 492 * sync flood from an uncorrectable error, then on revision F and G it 493 * should mark that chip-select as TestFail in the CS Base register. 494 * When the memory-controller driver discovers all the MC configuration 495 * it notes such failed chip-selects and creates topology nodes for the 496 * chip-select and associated dimms and ranks, and produces an ereport for each --- 517 unchanged lines hidden --- |