pcisch.c (f47a9c50) | pcisch.c (810a4a70) |
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1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * --- 6 unchanged lines hidden (view full) --- 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22/* | 1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * --- 6 unchanged lines hidden (view full) --- 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22/* |
23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. | 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. |
24 * Use is subject to license terms. 25 */ 26 27#pragma ident "%Z%%M% %I% %E% SMI" 28 29/* 30 * Schizo specifics implementation: 31 * interrupt mapping register --- 921 unchanged lines hidden (view full) --- 953 "pbm_configure: set schizo latency timer to %x\n", 954 pci_latency_timer); 955 pbm_p->pbm_config_header->ch_latency_timer_reg = 956 pci_latency_timer; 957 } 958 959 (void) ndi_prop_update_int(DDI_DEV_T_ANY, dip, "latency-timer", 960 (int)pbm_p->pbm_config_header->ch_latency_timer_reg); | 24 * Use is subject to license terms. 25 */ 26 27#pragma ident "%Z%%M% %I% %E% SMI" 28 29/* 30 * Schizo specifics implementation: 31 * interrupt mapping register --- 921 unchanged lines hidden (view full) --- 953 "pbm_configure: set schizo latency timer to %x\n", 954 pci_latency_timer); 955 pbm_p->pbm_config_header->ch_latency_timer_reg = 956 pci_latency_timer; 957 } 958 959 (void) ndi_prop_update_int(DDI_DEV_T_ANY, dip, "latency-timer", 960 (int)pbm_p->pbm_config_header->ch_latency_timer_reg); |
961 962 /* 963 * Adjust xmits_upper_retry_counter if set in /etc/system 964 * 965 * NOTE: current implementation resets UPPR_RTRY counter for 966 * _all_ XMITS' PBMs and does not support tuning per PBM. 967 */ 968 if (CHIP_TYPE(pci_p) == PCI_CHIP_XMITS) { 969 uint_t xurc = xmits_upper_retry_counter & 970 XMITS_UPPER_RETRY_MASK; 971 972 if (xurc) { 973 *pbm_p->pbm_upper_retry_counter_reg = (uint64_t)xurc; 974 DEBUG1(DBG_ATTACH, dip, "pbm_configure: Setting XMITS" 975 " uppr_rtry counter = 0x%lx\n", 976 *pbm_p->pbm_upper_retry_counter_reg); 977 } 978 } |
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961} 962 963uint_t 964pbm_disable_pci_errors(pbm_t *pbm_p) 965{ 966 pci_t *pci_p = pbm_p->pbm_pci_p; 967 ib_t *ib_p = pci_p->pci_ib_p; 968 --- 374 unchanged lines hidden (view full) --- 1343 pci_p->pci_dip, "no-prom-cdma-sync"); 1344 } 1345 return; 1346non_schizo: 1347 if (CHIP_TYPE(pci_p) == PCI_CHIP_TOMATILLO) { 1348 pci_dvma_sync_before_unmap = 1; 1349 pa = pci_p->pci_cb_p->cb_icbase_pa; 1350 } | 979} 980 981uint_t 982pbm_disable_pci_errors(pbm_t *pbm_p) 983{ 984 pci_t *pci_p = pbm_p->pbm_pci_p; 985 ib_t *ib_p = pci_p->pci_ib_p; 986 --- 374 unchanged lines hidden (view full) --- 1361 pci_p->pci_dip, "no-prom-cdma-sync"); 1362 } 1363 return; 1364non_schizo: 1365 if (CHIP_TYPE(pci_p) == PCI_CHIP_TOMATILLO) { 1366 pci_dvma_sync_before_unmap = 1; 1367 pa = pci_p->pci_cb_p->cb_icbase_pa; 1368 } |
1369 if (CHIP_TYPE(pci_p) == PCI_CHIP_XMITS) 1370 pbm_p->pbm_upper_retry_counter_reg = 1371 (uint64_t *)(a + XMITS_UPPER_RETRY_COUNTER_REG_OFFSET); 1372 |
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1351 pbm_p->pbm_sync_reg_pa = pa + PBM_DMA_SYNC_PEND_REG_OFFSET; 1352} 1353 1354void 1355pci_pbm_teardown(pbm_t *pbm_p) 1356{ 1357 (void) callb_delete(pbm_p->pbm_panic_cb_id); 1358 (void) callb_delete(pbm_p->pbm_debug_cb_id); --- 2219 unchanged lines hidden --- | 1373 pbm_p->pbm_sync_reg_pa = pa + PBM_DMA_SYNC_PEND_REG_OFFSET; 1374} 1375 1376void 1377pci_pbm_teardown(pbm_t *pbm_p) 1378{ 1379 (void) callb_delete(pbm_p->pbm_panic_cb_id); 1380 (void) callb_delete(pbm_p->pbm_debug_cb_id); --- 2219 unchanged lines hidden --- |