pcisch.h (7c478bd9) pcisch.h (810a4a70)
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License"). You may not use this file except in compliance
7 * with the License.
8 *

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15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22/*
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License"). You may not use this file except in compliance
7 * with the License.
8 *

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15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22/*
23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef _SYS_PCISCH_H
28#define _SYS_PCISCH_H
29
30#pragma ident "%Z%%M% %I% %E% SMI"
31

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129#define XMITS10_PCI_X_DIAG_REG_OFFSET 0x2038
130#define XMITS_PCI_X_ERROR_STATUS_REG_OFFSET 0x2300
131#define XMITS_PCI_X_DIAG_REG_OFFSET 0x2308
132#define XMITS_PARITY_DETECT_REG_OFFSET 0x2040
133#define XMITS_PARITY_LOG_REG_OFFSET 0x2048
134#define XMITS_PARITY_INJECT_REG_OFFSET 0x2050
135#define XMITS_PARITY_INJECT_1_REG_OFFSET 0x2058
136#define XMITS_PARITY_INJECT_0_REG_OFFSET 0x2060
24 * Use is subject to license terms.
25 */
26
27#ifndef _SYS_PCISCH_H
28#define _SYS_PCISCH_H
29
30#pragma ident "%Z%%M% %I% %E% SMI"
31

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129#define XMITS10_PCI_X_DIAG_REG_OFFSET 0x2038
130#define XMITS_PCI_X_ERROR_STATUS_REG_OFFSET 0x2300
131#define XMITS_PCI_X_DIAG_REG_OFFSET 0x2308
132#define XMITS_PARITY_DETECT_REG_OFFSET 0x2040
133#define XMITS_PARITY_LOG_REG_OFFSET 0x2048
134#define XMITS_PARITY_INJECT_REG_OFFSET 0x2050
135#define XMITS_PARITY_INJECT_1_REG_OFFSET 0x2058
136#define XMITS_PARITY_INJECT_0_REG_OFFSET 0x2060
137#define XMITS_UPPER_RETRY_COUNTER_REG_OFFSET 0x2310
137
138/*
139 * Offsets of IO Cache Registers:
140 */
141#define TOMATILLO_IOC_CSR_OFF 0x2248
142#define TOMATILLO_IOC_TAG_OFF 0x2250
143#define TOMATIILO_IOC_DAT_OFF 0x2290
144

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368 (afsr >> SCHIZO_PCI_AFSR_SE_SHIFT & SCHIZO_PCI_AFSR_E_MASK)
369#define PBM_AFSR_TO_BYTEMASK(afsr) \
370 ((afsr & SCHIZO_PCI_AFSR_BYTEMASK) >> SCHIZO_PCI_AFSR_BYTEMASK_SHIFT)
371#define PBM_AFSR_TO_DWORDMASK(afsr) \
372 ((afsr & SCHIZO_PCI_AFSR_DWORDMASK) >> \
373 SCHIZO_PCI_AFSR_DWORDMASK_SHIFT)
374
375/*
138
139/*
140 * Offsets of IO Cache Registers:
141 */
142#define TOMATILLO_IOC_CSR_OFF 0x2248
143#define TOMATILLO_IOC_TAG_OFF 0x2250
144#define TOMATIILO_IOC_DAT_OFF 0x2290
145

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369 (afsr >> SCHIZO_PCI_AFSR_SE_SHIFT & SCHIZO_PCI_AFSR_E_MASK)
370#define PBM_AFSR_TO_BYTEMASK(afsr) \
371 ((afsr & SCHIZO_PCI_AFSR_BYTEMASK) >> SCHIZO_PCI_AFSR_BYTEMASK_SHIFT)
372#define PBM_AFSR_TO_DWORDMASK(afsr) \
373 ((afsr & SCHIZO_PCI_AFSR_DWORDMASK) >> \
374 SCHIZO_PCI_AFSR_DWORDMASK_SHIFT)
375
376/*
377 * XMITS Upper Retry Counter Register (bits 15:0)
378 */
379#define XMITS_UPPER_RETRY_MASK 0xFFFF
380
381/*
376 * XMITS PCI-X Diagnostic Register bit definitions
377 */
378#define XMITS_PCI_X_DIAG_DIS_FAIR (0x1ull << 19)
379#define XMITS_PCI_X_DIAG_CRCQ_VALID (0x1ull << 18)
380#define XMITS_PCI_X_DIAG_SRCQ_VALID_SHIFT 10
381#define XMITS_PCI_X_DIAG_SRCQ_ONE (0x1ull << 9)
382#define XMITS_PCI_X_DIAG_CRCQ_FLUSH (0x1ull << 8)
383#define XMITS_PCI_X_DIAG_SRCQ_FLUSH_SHIFT 0

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382 * XMITS PCI-X Diagnostic Register bit definitions
383 */
384#define XMITS_PCI_X_DIAG_DIS_FAIR (0x1ull << 19)
385#define XMITS_PCI_X_DIAG_CRCQ_VALID (0x1ull << 18)
386#define XMITS_PCI_X_DIAG_SRCQ_VALID_SHIFT 10
387#define XMITS_PCI_X_DIAG_SRCQ_ONE (0x1ull << 9)
388#define XMITS_PCI_X_DIAG_CRCQ_FLUSH (0x1ull << 8)
389#define XMITS_PCI_X_DIAG_SRCQ_FLUSH_SHIFT 0

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