inject.c (2ffdc2c3) | inject.c (8ae9e3f6) |
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1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Machine check injection support. 4 * Copyright 2008 Intel Corporation. 5 * 6 * Authors: 7 * Andi Kleen 8 * Ying Huang --- 221 unchanged lines hidden (view full) --- 230 231 if (context == MCJ_CTX_RANDOM) 232 return; 233 234 if (m->inject_flags & (MCJ_IRQ_BROADCAST | MCJ_NMI_BROADCAST)) { 235 unsigned long start; 236 int cpu; 237 | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Machine check injection support. 4 * Copyright 2008 Intel Corporation. 5 * 6 * Authors: 7 * Andi Kleen 8 * Ying Huang --- 221 unchanged lines hidden (view full) --- 230 231 if (context == MCJ_CTX_RANDOM) 232 return; 233 234 if (m->inject_flags & (MCJ_IRQ_BROADCAST | MCJ_NMI_BROADCAST)) { 235 unsigned long start; 236 int cpu; 237 |
238 get_online_cpus(); | 238 cpus_read_lock(); |
239 cpumask_copy(mce_inject_cpumask, cpu_online_mask); 240 cpumask_clear_cpu(get_cpu(), mce_inject_cpumask); 241 for_each_online_cpu(cpu) { 242 struct mce *mcpu = &per_cpu(injectm, cpu); 243 if (!mcpu->finished || 244 MCJ_CTX(mcpu->inject_flags) != MCJ_CTX_RANDOM) 245 cpumask_clear_cpu(cpu, mce_inject_cpumask); 246 } --- 17 unchanged lines hidden (view full) --- 264 pr_err("Timeout waiting for mce inject %lx\n", 265 *cpumask_bits(mce_inject_cpumask)); 266 break; 267 } 268 cpu_relax(); 269 } 270 raise_local(); 271 put_cpu(); | 239 cpumask_copy(mce_inject_cpumask, cpu_online_mask); 240 cpumask_clear_cpu(get_cpu(), mce_inject_cpumask); 241 for_each_online_cpu(cpu) { 242 struct mce *mcpu = &per_cpu(injectm, cpu); 243 if (!mcpu->finished || 244 MCJ_CTX(mcpu->inject_flags) != MCJ_CTX_RANDOM) 245 cpumask_clear_cpu(cpu, mce_inject_cpumask); 246 } --- 17 unchanged lines hidden (view full) --- 264 pr_err("Timeout waiting for mce inject %lx\n", 265 *cpumask_bits(mce_inject_cpumask)); 266 break; 267 } 268 cpu_relax(); 269 } 270 raise_local(); 271 put_cpu(); |
272 put_online_cpus(); | 272 cpus_read_unlock(); |
273 } else { 274 preempt_disable(); 275 raise_local(); 276 preempt_enable(); 277 } 278} 279 280static int mce_inject_raise(struct notifier_block *nb, unsigned long val, --- 243 unchanged lines hidden (view full) --- 524 */ 525 if (boot_cpu_has(X86_FEATURE_AMD_DCM) && 526 b == 4 && 527 boot_cpu_data.x86 < 0x17) { 528 toggle_nb_mca_mst_cpu(topology_die_id(cpu)); 529 cpu = get_nbc_for_node(topology_die_id(cpu)); 530 } 531 | 273 } else { 274 preempt_disable(); 275 raise_local(); 276 preempt_enable(); 277 } 278} 279 280static int mce_inject_raise(struct notifier_block *nb, unsigned long val, --- 243 unchanged lines hidden (view full) --- 524 */ 525 if (boot_cpu_has(X86_FEATURE_AMD_DCM) && 526 b == 4 && 527 boot_cpu_data.x86 < 0x17) { 528 toggle_nb_mca_mst_cpu(topology_die_id(cpu)); 529 cpu = get_nbc_for_node(topology_die_id(cpu)); 530 } 531 |
532 get_online_cpus(); | 532 cpus_read_lock(); |
533 if (!cpu_online(cpu)) 534 goto err; 535 536 toggle_hw_mce_inject(cpu, true); 537 538 i_mce.mcgstatus = mcg_status; 539 i_mce.inject_flags = inj_type; 540 smp_call_function_single(cpu, prepare_msrs, &i_mce, 0); --- 7 unchanged lines hidden (view full) --- 548 case THR_INT_INJ: 549 smp_call_function_single(cpu, trigger_thr_int, NULL, 0); 550 break; 551 default: 552 smp_call_function_single(cpu, trigger_mce, NULL, 0); 553 } 554 555err: | 533 if (!cpu_online(cpu)) 534 goto err; 535 536 toggle_hw_mce_inject(cpu, true); 537 538 i_mce.mcgstatus = mcg_status; 539 i_mce.inject_flags = inj_type; 540 smp_call_function_single(cpu, prepare_msrs, &i_mce, 0); --- 7 unchanged lines hidden (view full) --- 548 case THR_INT_INJ: 549 smp_call_function_single(cpu, trigger_thr_int, NULL, 0); 550 break; 551 default: 552 smp_call_function_single(cpu, trigger_mce, NULL, 0); 553 } 554 555err: |
556 put_online_cpus(); | 556 cpus_read_unlock(); |
557 558} 559 560/* 561 * This denotes into which bank we're injecting and triggers 562 * the injection, at the same time. 563 */ 564static int inj_bank_set(void *data, u64 val) --- 147 unchanged lines hidden --- | 557 558} 559 560/* 561 * This denotes into which bank we're injecting and triggers 562 * the injection, at the same time. 563 */ 564static int inj_bank_set(void *data, u64 val) --- 147 unchanged lines hidden --- |