tcg-target.h (d73415a3) | tcg-target.h (084cfca1) |
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1/* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2009, 2011 Stefan Weil 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights --- 177 unchanged lines hidden (view full) --- 186#define TCG_REG_CALL_STACK (TCG_TARGET_NB_REGS - 1) 187#define TCG_TARGET_CALL_STACK_OFFSET 0 188#define TCG_TARGET_STACK_ALIGN 16 189 190void tci_disas(uint8_t opc); 191 192#define HAVE_TCG_QEMU_TB_EXEC 193 | 1/* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2009, 2011 Stefan Weil 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights --- 177 unchanged lines hidden (view full) --- 186#define TCG_REG_CALL_STACK (TCG_TARGET_NB_REGS - 1) 187#define TCG_TARGET_CALL_STACK_OFFSET 0 188#define TCG_TARGET_STACK_ALIGN 16 189 190void tci_disas(uint8_t opc); 191 192#define HAVE_TCG_QEMU_TB_EXEC 193 |
194static inline void flush_icache_range(uintptr_t start, uintptr_t stop) 195{ 196} 197 | |
198/* We could notice __i386__ or __s390x__ and reduce the barriers depending 199 on the host. But if you want performance, you use the normal backend. 200 We prefer consistency across hosts on this. */ 201#define TCG_TARGET_DEFAULT_MO (0) 202 203#define TCG_TARGET_HAS_MEMORY_BSWAP 1 204 205static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, 206 uintptr_t jmp_addr, uintptr_t addr) 207{ 208 /* patch the branch destination */ 209 qatomic_set((int32_t *)jmp_addr, addr - (jmp_addr + 4)); 210 /* no need to flush icache explicitly */ 211} 212 213#endif /* TCG_TARGET_H */ | 194/* We could notice __i386__ or __s390x__ and reduce the barriers depending 195 on the host. But if you want performance, you use the normal backend. 196 We prefer consistency across hosts on this. */ 197#define TCG_TARGET_DEFAULT_MO (0) 198 199#define TCG_TARGET_HAS_MEMORY_BSWAP 1 200 201static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, 202 uintptr_t jmp_addr, uintptr_t addr) 203{ 204 /* patch the branch destination */ 205 qatomic_set((int32_t *)jmp_addr, addr - (jmp_addr + 4)); 206 /* no need to flush icache explicitly */ 207} 208 209#endif /* TCG_TARGET_H */ |