2207     Register ImplicitDefReg = createResultReg(VR128X);  in X86FastEmitSSESelect()  local
2209             TII.get(TargetOpcode::IMPLICIT_DEF), ImplicitDefReg);  in X86FastEmitSSESelect()
2216                                         CmpReg, true, ImplicitDefReg, true,  in X86FastEmitSSESelect()
2443   Register ImplicitDefReg = createResultReg(RC);  in X86SelectIntToFP()  local
2445           TII.get(TargetOpcode::IMPLICIT_DEF), ImplicitDefReg);  in X86SelectIntToFP()
2447       fastEmitInst_rr(Opcode, RC, ImplicitDefReg, true, OpReg, false);  in X86SelectIntToFP()
2473   unsigned ImplicitDefReg;  in X86SelectFPExtOrFPTrunc()  local
2475     ImplicitDefReg = createResultReg(RC);  in X86SelectFPExtOrFPTrunc()
2477             TII.get(TargetOpcode::IMPLICIT_DEF), ImplicitDefReg);  in X86SelectFPExtOrFPTrunc()
2487     MIB.addReg(ImplicitDefReg);  in X86SelectFPExtOrFPTrunc()
2836     unsigned ImplicitDefReg = 0;  in fastLowerIntrinsicCall()  local
2838       ImplicitDefReg = createResultReg(RC);  in fastLowerIntrinsicCall()
2840               TII.get(TargetOpcode::IMPLICIT_DEF), ImplicitDefReg);  in fastLowerIntrinsicCall()
2848     if (ImplicitDefReg)  in fastLowerIntrinsicCall()
2849       MIB.addReg(ImplicitDefReg);  in fastLowerIntrinsicCall()