Lines Matching +refs:idlwave +refs:begin +refs:unit +refs:reg

251 	(c-lineup-assignments, c-lineup-gcc-asm-reg ): Take position of
1015 * progmodes/idlw-help.el (idlwave-help-mode-map):
5898 (verilog-auto-output, verilog-auto-output-every, verilog-auto-reg)
5899 (verilog-auto-reg-input, verilog-auto-tieoff, verilog-auto-undef)
6086 * progmodes/idlwave.el (idlwave-idl-keywords):
6208 * progmodes/idlw-shell.el (idlwave-shell-complete-filename):
6474 * progmodes/idlw-shell.el (idlwave-shell-prompt-pattern):
6534 (edebug--form-data-begin, edebug--form-data-end): Rename from the
7760 unit systems in the default units table.
9413 * progmodes/flymake.el, progmodes/gud.el, progmodes/idlwave.el:
10722 * progmodes/idlw-shell.el (idlwave-shell-electric-stop-line-face):
11209 (math-check-unit-consistency): New functions.
11211 Use `math-check-unit-consistency' when `calc-ensure-consistent-units'
11538 variable `idlwave-shell-activate-alt-keybindings' and simplify.
11738 (rst-font-lock-find-unindented-line-begin)
11924 * progmodes/idlwave.el (idlwave-libinfo-file)
11925 (idlwave-default-completion-case-is-down)
11926 (idlwave-library-routines): Convert defvars to defcustoms.
11929 * progmodes/idlw-shell.el (idlwave-shell-print-expression-function)
11930 (idlwave-shell-fix-inserted-breaks)
11931 (idlwave-shell-activate-alt-keybindings)
11932 (idlwave-shell-use-breakpoint-glyph):
11961 (verilog-auto-inout-module, verilog-auto-reg)
11963 (verilog-signals-edit-wire-reg, verilog-signals-with):
11966 "reg" for backwards compatibility presuming Verilog 2001.
11979 (verilog-sk-def-reg): Fix obeying `verilog-auto-lineup', bug305.
11994 (verilog-extended-complete-re, verilog-complete-reg): Change so
11998 (verilog-extended-complete-re, verilog-complete-reg): Change so
13633 (ispell-begin-skip-region-regexp, ispell-ignore-fcc)
13645 (hfy-begin-span, hfy-end-span): New routines factored out form
13647 (hfy-begin-span-handler, hfy-end-span-handler): New variables
13702 Handle non-unit-width characters a bit better. (Bug#10978)
13729 Handle non-unit-width characters a bit better. (Bug#10978)
14576 (allout-widgets-run-unit-tests-on-load)
15146 default unit.
15963 (verilog-sk-uvm-class, verilog-uvm-begin-re, verilog-uvm-end-re)
16034 verilog-read-decls): Combine reg and wire structures into one var
16036 (verilog-auto-ascii-enum, verilog-auto-logic, verilog-auto-reg)
16037 (verilog-auto-reg-input, verilog-auto-tieoff, verilog-auto-wire)
16040 SystemVerilog "logic" keyword instead of "wire"/"reg".
16041 (verilog-auto-reg-input, verilog-decls-get-signals): Fix AUTOWIRE
16161 * mail/binhex.el (binhex-begin-line):
16464 * progmodes/idlw-shell.el (idlwave-shell-mode):
16615 * progmodes/idlw-shell.el (idlwave-shell-make-new-bp-overlay):
17120 * progmodes/idlwave.el (idlwave-mode):
17143 * progmodes/idlwave.el (idlwave-mode):
17167 * progmodes/idlw-shell.el (idlwave-shell-electric-debug-mode):
17641 * progmodes/idlw-help.el (idlwave-help-mode-map):
22549 * progmodes/idlw-shell.el (idlwave-shell-complete-filename):
23364 * progmodes/cpp.el (cpp-parse-close): Remove unused variable `begin'.
23485 variables `begin' and `end'.
24460 * progmodes/idlwave.el (idlwave-one-key-select, idlwave-list-abbrevs):
25005 (delphi-find-unit, delphi-find-current-xdef, delphi-fill-comment)