Lines Matching refs:WA

25   ARM64Reg WA = gpr.GetReg();  in sc()  local
27 LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); in sc()
28 ORR(WA, WA, 31, 0); // Same as WA | EXCEPTION_SYSCALL in sc()
29 STR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); in sc()
31 gpr.Unlock(WA); in sc()
52 ARM64Reg WA = gpr.GetReg(); in rfi() local
58 ANDI2R(WC, WC, (~mask) & clearMSR13, WA); // rD = Masked MSR in rfi()
60 LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_SRR1])); // rB contains SRR1 here in rfi()
62 ANDI2R(WA, WA, mask & clearMSR13, WB); // rB contains masked SRR1 here in rfi()
63 ORR(WA, WA, WC); // rB = Masked MSR OR masked SRR1 in rfi()
65 STR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(msr)); // STR rB in to rA in rfi()
67 LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_SRR0])); in rfi()
70 WriteExceptionExit(WA); in rfi()
71 gpr.Unlock(WA); in rfi()
81 ARM64Reg WA = gpr.GetReg(); in bx() local
82 MOVI2R(WA, js.compilerPC + 4); in bx()
83 STR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_LR])); in bx()
84 gpr.Unlock(WA); in bx()
105 ARM64Reg WA = gpr.GetReg(); in bx() local
106 ARM64Reg XA = EncodeRegTo64(WA); in bx()
110 gpr.Unlock(WA); in bx()
124 ARM64Reg WA = gpr.GetReg(); in bcx() local
128 LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_CTR])); in bcx()
129 SUBS(WA, WA, 1); in bcx()
130 STR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_CTR])); in bcx()
152 MOVI2R(WA, js.compilerPC + 4); in bcx()
153 STR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_LR])); in bcx()
155 gpr.Unlock(WA); in bcx()
220 ARM64Reg WA = gpr.GetReg(); in bcctrx() local
222 LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_CTR])); in bcctrx()
223 AND(WA, WA, 30, 29); // Wipe the bottom 2 bits. in bcctrx()
225 WriteExit(WA, inst.LK_3, js.compilerPC + 4); in bcctrx()
227 gpr.Unlock(WA); in bcctrx()
238 ARM64Reg WA = gpr.GetReg(); in bclrx() local
244 LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_CTR])); in bclrx()
245 SUBS(WA, WA, 1); in bclrx()
246 STR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_CTR])); in bclrx()
268 LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_LR])); in bclrx()
269 AND(WA, WA, 30, 29); // Wipe the bottom 2 bits. in bclrx()
284 ARM64Reg XA = EncodeRegTo64(WA); in bclrx()
293 WriteBLRExit(WA); in bclrx()
296 gpr.Unlock(WA); in bclrx()