Lines Matching refs:workReg

964     RAWorkReg* workReg = workRegById(i);  in buildLiveness()  local
965 ASMJIT_PROPAGATE(workReg->_refs.reserve(allocator(), nUsesPerWorkReg[i])); in buildLiveness()
966 ASMJIT_PROPAGATE(workReg->_writes.reserve(allocator(), nOutsPerWorkReg[i])); in buildLiveness()
992 RAWorkReg* workReg = _workRegs[uint32_t(it.next())]; in buildLiveness() local
993 curLiveCount[workReg->group()]++; in buildLiveness()
994 ASMJIT_PROPAGATE(workReg->liveSpans().openAt(allocator(), position, endPosition)); in buildLiveness()
1014 RAWorkReg* workReg = workRegById(workId); in buildLiveness() local
1015 workReg->_refs.appendUnsafe(node); in buildLiveness()
1017 workReg->_writes.appendUnsafe(node); in buildLiveness()
1025 LiveRegSpans& liveSpans = workReg->liveSpans(); in buildLiveness()
1029 uint32_t group = workReg->group(); in buildLiveness()
1041 if (tiedReg->hasUseId() && !workReg->hasHintRegId()) { in buildLiveness()
1044 workReg->setHintRegId(useId); in buildLiveness()
1049 workReg->addClobberSurvivalMask(raInst->_clobberedRegs[group]); in buildLiveness()
1073 RAWorkReg* workReg = _workRegs[i]; in buildLiveness() local
1075 LiveRegSpans& spans = workReg->liveSpans(); in buildLiveness()
1077 float freq = width ? float(double(workReg->_refs.size()) / double(width)) : float(0); in buildLiveness()
1079 RALiveStats& stats = workReg->liveStats(); in buildLiveness()
1082 stats._priority = freq + float(int(workReg->virtReg()->weight())) * 0.01f; in buildLiveness()
1108 RAWorkReg* workReg = virtReg->workReg(); in assignArgIndexToWorkRegs() local
1109 if (!workReg) continue; in assignArgIndexToWorkRegs()
1112 uint32_t workId = workReg->workId(); in assignArgIndexToWorkRegs()
1116 workReg->setArgIndex(i); in assignArgIndexToWorkRegs()
1119 if (arg.isReg() && _archRegsInfo->regInfo[arg.regType()].group() == workReg->group()) { in assignArgIndexToWorkRegs()
1120 workReg->setHintRegId(arg.regId()); in assignArgIndexToWorkRegs()
1205 RAWorkReg* workReg = workRegs[i]; in binPack() local
1206 if (workReg->hasHintRegId()) { in binPack()
1207 uint32_t physId = workReg->hintRegId(); in binPack()
1210 …err = tmpSpans.nonOverlappingUnionOf(allocator(), live, workReg->liveSpans(), LiveRegData(workReg-… in binPack()
1213 workReg->setHomeRegId(physId); in binPack()
1223 workRegs[dstIndex++] = workReg; in binPack()
1235 RAWorkReg* workReg = workRegs[i]; in binPack() local
1240 if (workReg->clobberSurvivalMask()) { in binPack()
1241 uint32_t preferredMask = physRegs & workReg->clobberSurvivalMask(); in binPack()
1247 …err = tmpSpans.nonOverlappingUnionOf(allocator(), live, workReg->liveSpans(), LiveRegData(workReg-… in binPack()
1250 workReg->setHomeRegId(physId); in binPack()
1263 workRegs[dstIndex++] = workReg; in binPack()
1290 for (RAWorkReg* workReg : workRegs) in binPack()
1291 workReg->markStackPreferred(); in binPack()
1298 RAWorkReg* workReg = workRegs[i]; in binPack()
1300 sb.append(workReg->name()); in binPack()
1489 RAWorkReg* workReg = workRegById(workId); in setBlockEntryAssignment() local
1491 uint32_t group = workReg->group(); in setBlockEntryAssignment()
1582 RAWorkReg* workReg = workRegById(workId); in blockEntryAssigned() local
1583 workReg->addAllocatedMask(Support::bitMask(physId)); in blockEntryAssigned()
1664 RAWorkReg* workReg = workRegs[workId]; in _markStackArgsToKeep() local
1665 if (workReg->hasFlag(RAWorkReg::kFlagStackArgToStack)) { in _markStackArgsToKeep()
1666 ASMJIT_ASSERT(workReg->hasArgIndex()); in _markStackArgsToKeep()
1667 const FuncValue& srcArg = _func->detail().arg(workReg->argIndex()); in _markStackArgsToKeep()
1672 RAStackSlot* slot = workReg->stackSlot(); in _markStackArgsToKeep()
1687 FuncValue& dstArg = _argsAssignment.arg(workReg->argIndex()); in _markStackArgsToKeep()
1701 RAWorkReg* workReg = workRegs[workId]; in _updateStackArgs() local
1702 if (workReg->hasFlag(RAWorkReg::kFlagStackArgToStack)) { in _updateStackArgs()
1703 ASMJIT_ASSERT(workReg->hasArgIndex()); in _updateStackArgs()
1704 RAStackSlot* slot = workReg->stackSlot(); in _updateStackArgs()
1710 const FuncValue& srcArg = _func->detail().arg(workReg->argIndex()); in _updateStackArgs()
1720 FuncValue& dstArg = _argsAssignment.arg(workReg->argIndex()); in _updateStackArgs()
1823 RAWorkReg* workReg = virtReg->workReg(); in _rewrite() local
1824 ASMJIT_ASSERT(workReg != nullptr); in _rewrite()
1826 RAStackSlot* slot = workReg->stackSlot(); in _rewrite()
1966 RAWorkReg* workReg = _workRegs[workId]; in _dumpLiveSpans() local
1971 sb.append(workReg->name()); in _dumpLiveSpans()
1974 RALiveStats& stats = workReg->liveStats(); in _dumpLiveSpans()
1976 workReg->virtId(), in _dumpLiveSpans()
1982 LiveRegSpans& liveSpans = workReg->liveSpans(); in _dumpLiveSpans()