Lines Matching refs:port
73 for (u8 port = 0; port < 2; port++) in device_start() local
75 save_item(m_port[port].reg_state, "state", port + 1); in device_start()
76 save_item(m_port[port].reg_pointer, "pointer", port + 1); in device_start()
77 save_item(m_port[port].int_code, "int_code", port + 1); in device_start()
78 save_item(m_port[port].int_asserted, "int_asserted", port + 1); in device_start()
80 save_item(m_port[port].control_0, "control_0", port + 1); in device_start()
81 save_item(m_port[port].control_1, "control_1", port + 1); in device_start()
82 save_item(m_port[port].interrupt_status, "interrupt_status", port + 1); in device_start()
83 save_item(m_port[port].interrupt_vector, "interrupt_vector", port + 1); in device_start()
84 save_item(m_port[port].byte_count, "byte_count", port + 1); in device_start()
85 save_item(m_port[port].byte_count_comparison, "byte_count_comparison", port + 1); in device_start()
86 save_item(m_port[port].message_in, "message_in", port + 1); in device_start()
87 save_item(m_port[port].pattern_match, "pattern_match", port + 1); in device_start()
88 save_item(m_port[port].pattern_mask, "pattern_mask", port + 1); in device_start()
89 save_item(m_port[port].data_buffer, "data_buffer", port + 1); in device_start()
105 for (u8 port = 0; port < 2; port++) in device_reset() local
107 m_port[port].reg_state = 0; in device_reset()
108 m_port[port].reg_pointer = 0; in device_reset()
109 m_port[port].int_code = 0; in device_reset()
110 m_port[port].control_0 = CR0_RESET; in device_reset()
111 set_int_state(port, false); in device_reset()
115 u8 z8038_device::reg_r(u8 const port) in reg_r() argument
124 if (port && !(m_control_2 & CR2_P2EN)) in reg_r()
128 if (port && (m_port[port].control_0 & CR0_P2M_IO)) in reg_r()
135 if (m_port[port].control_0 & CR0_RESET) in reg_r()
136 return m_port[port].control_0; in reg_r()
139 switch (m_port[port].reg_pointer) in reg_r()
141 case 0x0: data = control_0_r(port); break; in reg_r()
142 case 0x1: data = control_1_r(port); break; in reg_r()
143 case 0x2: data = interrupt_status_r<0>(port); break; in reg_r()
144 case 0x3: data = interrupt_status_r<1>(port); break; in reg_r()
145 case 0x4: data = interrupt_status_r<2>(port); break; in reg_r()
146 case 0x5: data = interrupt_status_r<3>(port); break; in reg_r()
147 case 0x6: data = interrupt_vector_r(port); break; in reg_r()
148 case 0x7: data = byte_count_r(port); break; in reg_r()
149 case 0x8: data = byte_count_comparison_r(port); break; in reg_r()
150 case 0x9: data = control_2_r(port); break; in reg_r()
151 case 0xa: data = control_3_r(port); break; in reg_r()
152 case 0xb: data = message_out_r(port); break; in reg_r()
153 case 0xc: data = message_in_r(port); break; in reg_r()
154 case 0xd: data = pattern_match_r(port); break; in reg_r()
155 case 0xe: data = pattern_mask_r(port); break; in reg_r()
156 case 0xf: data = fifo_r(port); break; in reg_r()
159 m_port[port].reg_state = 0; in reg_r()
161 LOGMASKED(LOG_REG, "reg_r port %d reg %d data 0x%02x\n", port + 1, m_port[port].reg_pointer, data); in reg_r()
166 void z8038_device::reg_w(u8 const port, u8 data) in reg_w() argument
169 if (port && !(m_control_2 & CR2_P2EN)) in reg_w()
173 if (port && (m_port[port].control_0 & CR0_P2M_IO)) in reg_w()
181 if (m_port[port].control_0 & CR0_RESET) in reg_w()
185 LOG("reg_w port %d reset state cleared\n", port + 1); in reg_w()
186 m_port[port].reg_pointer = 0; in reg_w()
187 m_port[port].reg_state = 0; in reg_w()
189 m_port[port].control_0 = data; in reg_w()
195 if (m_port[port].reg_state == 1) in reg_w()
197 switch (m_port[port].reg_pointer) in reg_w()
199 case 0x0: control_0_w(port, data); break; in reg_w()
200 case 0x1: control_1_w(port, data); break; in reg_w()
201 case 0x2: interrupt_status_w<0>(port, data); break; in reg_w()
202 case 0x3: interrupt_status_w<1>(port, data); break; in reg_w()
203 case 0x4: interrupt_status_w<2>(port, data); break; in reg_w()
204 case 0x5: interrupt_status_w<3>(port, data); break; in reg_w()
205 case 0x6: interrupt_vector_w(port, data); break; in reg_w()
207 case 0x8: byte_count_comparison_w(port, data); break; in reg_w()
208 case 0x9: control_2_w(port, data); break; in reg_w()
209 case 0xa: control_3_w(port, data); break; in reg_w()
210 case 0xb: message_out_w(port, data); break; in reg_w()
212 case 0xd: pattern_match_w(port, data); break; in reg_w()
213 case 0xe: pattern_mask_w(port, data); break; in reg_w()
214 case 0xf: fifo_w(port, data); break; in reg_w()
217 …LOGMASKED(LOG_REG, "reg_w port %d reg %d data 0x%02x\n", port + 1, m_port[port].reg_pointer, data); in reg_w()
220 if (m_port[port].reg_pointer != 0xf) in reg_w()
224 m_port[port].reg_pointer = data & 0xf; in reg_w()
226 m_port[port].reg_state = !m_port[port].reg_state; in reg_w()
229 u8 z8038_device::fifo_r(u8 const port) in fifo_r() argument
234 m_port[port].data_buffer = m_fifo.dequeue(); in fifo_r()
238 LOGMASKED(LOG_FIFO, "fifo_r port %d data 0x%02x\n", port + 1, m_port[port].data_buffer); in fifo_r()
241 m_port[port].interrupt_status[2] |= (ISR2_UF | ISR2_EIP); in fifo_r()
246 return m_port[port].data_buffer; in fifo_r()
249 void z8038_device::fifo_w(u8 const port, u8 data) in fifo_w() argument
254 m_port[port].data_buffer = data; in fifo_w()
255 m_fifo.enqueue(m_port[port].data_buffer); in fifo_w()
259 LOGMASKED(LOG_FIFO, "fifo_w port %d data 0x%02x\n", port + 1, m_port[port].data_buffer); in fifo_w()
262 m_port[port].interrupt_status[2] |= (ISR2_OF | ISR2_EIP); in fifo_w()
268 u8 z8038_device::control_1_r(u8 const port) in control_1_r() argument
280 u8 data = m_port[port].control_1; in control_1_r()
282 if (m_port[!port].interrupt_status[0] & ISR0_MIP) in control_1_r()
285 if (m_port[!port].interrupt_status[0] & ISR0_MIUS) in control_1_r()
291 u8 z8038_device::interrupt_vector_r(u8 const port) in interrupt_vector_r() argument
298 if (m_port[port].control_0 & CR0_MIE) in interrupt_vector_r()
299 return (m_port[port].interrupt_vector & 0xf1) | (m_port[port].int_code << 1); in interrupt_vector_r()
301 return m_port[port].interrupt_vector; in interrupt_vector_r()
304 u8 z8038_device::byte_count_r(u8 const port) in byte_count_r() argument
311 if (m_port[port].control_1 & CR1_FBCR) in byte_count_r()
312 m_port[port].control_1 &= ~CR1_FBCR; in byte_count_r()
314 return m_port[port].byte_count; in byte_count_r()
317 u8 z8038_device::control_3_r(u8 const port) in control_3_r() argument
319 u8 const mask = (port == 0) ? 0xff : 0xf0; in control_3_r()
322 if (bool(m_control_3 & CR3_P2DIR) != bool(port)) in control_3_r()
328 u8 z8038_device::message_in_r(u8 const port) in message_in_r() argument
334 m_port[port].interrupt_status[0] &= ~ISR0_MIP; in message_in_r()
336 return m_port[port].message_in; in message_in_r()
339 void z8038_device::control_0_w(u8 const port, u8 data) in control_0_w() argument
343 if (port == 0) in control_0_w()
344 m_port[port].control_0 = data; in control_0_w()
346 m_port[port].control_0 = (m_port[!port].control_0 & CR0_P2M) | (data & ~CR0_P2M); in control_0_w()
349 port_reset(port); in control_0_w()
352 void z8038_device::control_1_w(u8 const port, u8 data) in control_1_w() argument
354 m_port[port].control_1 = data & CR1_WMASK; in control_1_w()
357 template <u8 Number> void z8038_device::interrupt_status_w(u8 const port, u8 data) in interrupt_status_w() argument
362 case 0x20: m_port[port].interrupt_status[Number] &= ~(ISR_HIUS | ISR_HIP); break; in interrupt_status_w()
363 case 0x40: m_port[port].interrupt_status[Number] |= ISR_HIUS; break; in interrupt_status_w()
364 case 0x60: m_port[port].interrupt_status[Number] &= ~ISR_HIUS; break; in interrupt_status_w()
365 case 0x80: m_port[port].interrupt_status[Number] |= ISR_HIP; break; in interrupt_status_w()
366 case 0xa0: m_port[port].interrupt_status[Number] &= ~ISR_HIP; break; in interrupt_status_w()
367 case 0xc0: m_port[port].interrupt_status[Number] |= ISR_HIE; break; in interrupt_status_w()
368 case 0xe0: m_port[port].interrupt_status[Number] &= ~ISR_HIE; break; in interrupt_status_w()
376 case 0x02: m_port[port].interrupt_status[Number] &= ~(ISR_LIUS | ISR_LIP); break; in interrupt_status_w()
377 case 0x04: m_port[port].interrupt_status[Number] |= ISR_LIUS; break; in interrupt_status_w()
378 case 0x06: m_port[port].interrupt_status[Number] &= ~ISR_LIUS; break; in interrupt_status_w()
379 case 0x08: m_port[port].interrupt_status[Number] |= ISR_LIP; break; in interrupt_status_w()
380 case 0x0a: m_port[port].interrupt_status[Number] &= ~ISR_LIP; break; in interrupt_status_w()
381 case 0x0c: m_port[port].interrupt_status[Number] |= ISR_LIE; break; in interrupt_status_w()
382 case 0x0e: m_port[port].interrupt_status[Number] &= ~ISR_LIE; break; in interrupt_status_w()
388 template void z8038_device::interrupt_status_w<0>(u8 const port, u8 data);
389 template void z8038_device::interrupt_status_w<1>(u8 const port, u8 data);
390 template void z8038_device::interrupt_status_w<2>(u8 const port, u8 data);
391 template void z8038_device::interrupt_status_w<3>(u8 const port, u8 data);
393 void z8038_device::byte_count_comparison_w(u8 const port, u8 data) in byte_count_comparison_w() argument
398 m_port[port].byte_count_comparison = data & 0x7f; in byte_count_comparison_w()
401 if (m_fifo.queue_length() == m_port[port].byte_count_comparison) in byte_count_comparison_w()
402 m_port[port].interrupt_status[2] |= ISR2_BCCIP; in byte_count_comparison_w()
405 void z8038_device::control_2_w(u8 const port, u8 data) in control_2_w() argument
407 if (port == 0) in control_2_w()
413 void z8038_device::control_3_w(u8 const port, u8 data) in control_3_w() argument
415 if (m_port[port].control_0 & CR0_P2M_IO) in control_3_w()
441 if (port == 0) in control_3_w()
445 m_port[!port].interrupt_status[1] |= ISR1_DDCIP; in control_3_w()
462 m_port[!port].interrupt_status[1] |= ISR1_DDCIP; in control_3_w()
476 void z8038_device::message_out_w(u8 const port, u8 data) in message_out_w() argument
482 m_port[!port].message_in = data; in message_out_w()
483 m_port[!port].interrupt_status[0] |= ISR0_MIP; in message_out_w()
536 void z8038_device::port_reset(u8 const port) in port_reset() argument
538 LOG("port_reset port %d \n", port + 1); in port_reset()
540 m_port[port].control_1 = 0; in port_reset()
541 if (port == 0) in port_reset()
543 m_port[port].control_0 = CR0_RESET; in port_reset()
553 m_port[port].control_0 = CR0_RESET; in port_reset()
554 m_port[port].control_0 |= (m_port[!port].control_0 & CR0_P2M); in port_reset()
572 m_port[port].pattern_mask = 0; in port_reset()
573 m_port[port].interrupt_status[0] = 0; in port_reset()
578 m_port[port].interrupt_status[1] = 0; // opt to ignore "random" pattern matches in port_reset()
579 m_port[port].interrupt_status[2] = 0; in port_reset()
584 m_port[port].interrupt_status[3] &= ~ISR3_BE; in port_reset()
590 if (port == 0) in port_reset()
591 port_reset(!port); in port_reset()
607 for (u8 port = 0; port < 2; port++) in fifo_update() local
610 if (!(m_port[port].control_1 & CR1_FBCR)) in fifo_update()
611 m_port[port].byte_count = m_fifo.queue_length(); in fifo_update()
614 …if ((m_port[port].data_buffer & ~m_port[port].pattern_mask) == (m_port[port].pattern_match & ~m_po… in fifo_update()
615 m_port[port].interrupt_status[1] |= (ISR1_PMIP | ISR1_PMF); in fifo_update()
617 m_port[port].interrupt_status[1] &= ~ISR1_PMF; in fifo_update()
620 if (m_fifo.queue_length() == m_port[port].byte_count_comparison) in fifo_update()
621 m_port[port].interrupt_status[2] |= ISR2_BCCIP; in fifo_update()
626 m_port[port].interrupt_status[3] |= (ISR3_BF | ISR3_FIP); in fifo_update()
631 m_port[port].interrupt_status[3] |= (ISR3_BE | ISR3_EIP); in fifo_update()
637 for (u8 port = 0; port < 2; port++) in TIMER_CALLBACK_MEMBER() local
640 if (!(m_port[port].control_0 & CR0_MIE)) in TIMER_CALLBACK_MEMBER()
642 set_int_state(port, false); in TIMER_CALLBACK_MEMBER()
648 std::begin(m_port[port].interrupt_status), in TIMER_CALLBACK_MEMBER()
649 std::end(m_port[port].interrupt_status), in TIMER_CALLBACK_MEMBER()
654 m_port[port].int_code = 7; in TIMER_CALLBACK_MEMBER()
655 for (u8 &isr : m_port[port].interrupt_status) in TIMER_CALLBACK_MEMBER()
664 m_port[port].int_code--; in TIMER_CALLBACK_MEMBER()
666 if (m_port[port].int_code != 6) in TIMER_CALLBACK_MEMBER()
675 m_port[port].int_code--; in TIMER_CALLBACK_MEMBER()
679 if (m_port[port].int_code) in TIMER_CALLBACK_MEMBER()
680 …LOGMASKED(LOG_INT, "int_check port %d interrupt code %d detected\n", port + 1, m_port[port].int_co… in TIMER_CALLBACK_MEMBER()
683 set_int_state(port, bool(m_port[port].int_code)); in TIMER_CALLBACK_MEMBER()
687 void z8038_device::set_int_state(u8 const port, bool asserted) in set_int_state() argument
689 if (m_port[port].int_asserted != asserted) in set_int_state()
692 port + 1, asserted ? "asserted" : "deasserted"); in set_int_state()
694 m_port[port].int_asserted = asserted; in set_int_state()
697 m_out_int_cb[port](asserted ? 0 : 1); in set_int_state()