Lines Matching refs:dtlb
83 bool dtlb, uint32_t way) in get_page_size() argument
85 uint32_t tlbcfg = env->sregs[dtlb ? DTLBCFG : ITLBCFG]; in get_page_size()
106 bool dtlb, uint32_t way) in xtensa_tlb_get_addr_mask() argument
109 bool varway56 = dtlb ? in xtensa_tlb_get_addr_mask()
110 env->config->dtlb.varway56 : in xtensa_tlb_get_addr_mask()
115 return 0xfff00000 << get_page_size(env, dtlb, way) * 2; in xtensa_tlb_get_addr_mask()
119 return 0xf8000000 << get_page_size(env, dtlb, way); in xtensa_tlb_get_addr_mask()
126 return 0xf0000000 << (1 - get_page_size(env, dtlb, way)); in xtensa_tlb_get_addr_mask()
143 static uint32_t get_vpn_mask(const CPUXtensaState *env, bool dtlb, uint32_t way) in get_vpn_mask() argument
146 bool is32 = (dtlb ? in get_vpn_mask()
147 env->config->dtlb.nrefillentries : in get_vpn_mask()
151 return xtensa_tlb_get_addr_mask(env, dtlb, way) << 2; in get_vpn_mask()
153 uint32_t mask = xtensa_tlb_get_addr_mask(env, dtlb, way); in get_vpn_mask()
154 bool varway56 = dtlb ? in get_vpn_mask()
155 env->config->dtlb.varway56 : in get_vpn_mask()
173 bool dtlb, uint32_t *vpn, in split_tlb_entry_spec_way() argument
176 bool varway56 = dtlb ? in split_tlb_entry_spec_way()
177 env->config->dtlb.varway56 : in split_tlb_entry_spec_way()
180 if (!dtlb) { in split_tlb_entry_spec_way()
185 bool is32 = (dtlb ? in split_tlb_entry_spec_way()
186 env->config->dtlb.nrefillentries : in split_tlb_entry_spec_way()
193 uint32_t eibase = 20 + get_page_size(env, dtlb, wi) * 2; in split_tlb_entry_spec_way()
200 uint32_t eibase = 27 + get_page_size(env, dtlb, wi); in split_tlb_entry_spec_way()
209 uint32_t eibase = 29 - get_page_size(env, dtlb, wi); in split_tlb_entry_spec_way()
221 *vpn = v & xtensa_tlb_get_addr_mask(env, dtlb, wi); in split_tlb_entry_spec_way()
228 static void split_tlb_entry_spec(CPUXtensaState *env, uint32_t v, bool dtlb, in split_tlb_entry_spec() argument
232 *wi = v & (dtlb ? 0xf : 0x7); in split_tlb_entry_spec()
233 split_tlb_entry_spec_way(env, v, dtlb, vpn, *wi, ei); in split_tlb_entry_spec()
241 static xtensa_tlb_entry *xtensa_tlb_get_entry(CPUXtensaState *env, bool dtlb, in xtensa_tlb_get_entry() argument
244 return dtlb ? in xtensa_tlb_get_entry()
245 env->dtlb[wi] + ei : in xtensa_tlb_get_entry()
250 uint32_t v, bool dtlb, uint32_t *pwi) in get_tlb_entry() argument
256 split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei); in get_tlb_entry()
260 return xtensa_tlb_get_entry(env, dtlb, wi, ei); in get_tlb_entry()
264 xtensa_tlb_entry *entry, bool dtlb, in xtensa_tlb_set_entry_mmu() argument
269 entry->paddr = pte & xtensa_tlb_get_addr_mask(env, dtlb, wi); in xtensa_tlb_set_entry_mmu()
274 static void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb, in xtensa_tlb_set_entry() argument
279 xtensa_tlb_entry *entry = xtensa_tlb_get_entry(env, dtlb, wi, ei); in xtensa_tlb_set_entry()
286 xtensa_tlb_set_entry_mmu(env, entry, dtlb, wi, ei, vpn, pte); in xtensa_tlb_set_entry()
291 __func__, dtlb, wi, ei); in xtensa_tlb_set_entry()
405 reset_tlb_mmu_all_ways(env, &env->config->dtlb, env->dtlb); in reset_mmu()
407 reset_tlb_mmu_ways56(env, &env->config->dtlb, env->dtlb); in reset_mmu()
423 reset_tlb_region_way0(env, env->dtlb); in reset_mmu()
448 uint32_t addr, bool dtlb, in xtensa_tlb_lookup() argument
451 const xtensa_tlb *tlb = dtlb ? in xtensa_tlb_lookup()
452 &env->config->dtlb : &env->config->itlb; in xtensa_tlb_lookup()
453 const xtensa_tlb_entry (*entry)[MAX_TLB_WAY_SIZE] = dtlb ? in xtensa_tlb_lookup()
454 env->dtlb : env->itlb; in xtensa_tlb_lookup()
462 split_tlb_entry_spec_way(env, addr, dtlb, &vpn, wi, &ei); in xtensa_tlb_lookup()
467 return dtlb ? in xtensa_tlb_lookup()
478 (dtlb ? LOAD_STORE_TLB_MISS_CAUSE : INST_TLB_MISS_CAUSE); in xtensa_tlb_lookup()
481 uint32_t HELPER(rtlb0)(CPUXtensaState *env, uint32_t v, uint32_t dtlb) in HELPER()
485 const xtensa_tlb_entry *entry = get_tlb_entry(env, v, dtlb, &wi); in HELPER()
486 return (entry->vaddr & get_vpn_mask(env, dtlb, wi)) | entry->asid; in HELPER()
492 uint32_t HELPER(rtlb1)(CPUXtensaState *env, uint32_t v, uint32_t dtlb) in HELPER()
494 const xtensa_tlb_entry *entry = get_tlb_entry(env, v, dtlb, NULL); in HELPER()
498 void HELPER(itlb)(CPUXtensaState *env, uint32_t v, uint32_t dtlb) in HELPER()
502 xtensa_tlb_entry *entry = get_tlb_entry(env, v, dtlb, &wi); in HELPER()
510 uint32_t HELPER(ptlb)(CPUXtensaState *env, uint32_t v, uint32_t dtlb) in HELPER()
516 int res = xtensa_tlb_lookup(env, v, dtlb, &wi, &ei, &ring); in HELPER()
521 return (v & 0xfffff000) | wi | (dtlb ? 0x10 : 0x8); in HELPER()
536 void HELPER(wtlb)(CPUXtensaState *env, uint32_t p, uint32_t v, uint32_t dtlb) in HELPER()
541 split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei); in HELPER()
542 xtensa_tlb_set_entry(env, dtlb, wi, ei, vpn, p); in HELPER()
785 bool dtlb = is_write != 2; in get_physical_addr_mmu() local
793 int ret = xtensa_tlb_lookup(env, vaddr, dtlb, &wi, &ei, &ring); in get_physical_addr_mmu()
799 split_tlb_entry_spec_way(env, vaddr, dtlb, &vpn, wi, &ei); in get_physical_addr_mmu()
803 xtensa_tlb_set_entry(env, dtlb, wi, ei, vpn, pte); in get_physical_addr_mmu()
808 xtensa_tlb_set_entry_mmu(env, &tmp_entry, dtlb, wi, ei, vpn, pte); in get_physical_addr_mmu()
818 entry = xtensa_tlb_get_entry(env, dtlb, wi, ei); in get_physical_addr_mmu()
822 return dtlb ? in get_physical_addr_mmu()
828 ~(dtlb ? PAGE_EXEC : PAGE_READ | PAGE_WRITE); in get_physical_addr_mmu()
830 return dtlb ? in get_physical_addr_mmu()
837 *paddr = entry->paddr | (vaddr & ~xtensa_tlb_get_addr_mask(env, dtlb, wi)); in get_physical_addr_mmu()
838 *page_size = ~xtensa_tlb_get_addr_mask(env, dtlb, wi) + 1; in get_physical_addr_mmu()
884 bool dtlb = is_write != 2; in get_physical_addr_region() local
888 xtensa_tlb_get_entry(env, dtlb, wi, ei); in get_physical_addr_region()
892 return dtlb ? in get_physical_addr_region()
1058 static void dump_tlb(CPUXtensaState *env, bool dtlb) in dump_tlb() argument
1062 dtlb ? &env->config->dtlb : &env->config->itlb; in dump_tlb()
1068 uint32_t sz = ~xtensa_tlb_get_addr_mask(env, dtlb, wi) + 1; in dump_tlb()
1082 xtensa_tlb_get_entry(env, dtlb, wi, ei); in dump_tlb()