794 HP_WORD CIR    = 0;                             /* current instruction register */  variable
1069 …{ ORDATA (CIR,     CIR,                  16),          REG_M | REG_RO  },  /* current instruction …
1576 …  X = CIR;                                        /* save the current instruction for restarting */  in sim_instr()
1606 …&& CIR != SED_1)                                  /*     and not deferred by a SED 1 instruction */  in sim_instr()
1627                            (CIR << STACKOP_A_SHIFT          /*         the right-hand stack op */  in sim_instr()
1656                 CIR = NIR;                              /*   then update the current instruction */  in sim_instr()
1663 …sim_eval [0] = CIR;                         /*   then save the instruction that will be executed */  in sim_instr()
1667                           PBANK, P - 2 & R_MASK, CIR);      /*   as an octal value */  in sim_instr()
2610 …if ((CIR & BR_MASK) == BR_DBQS_I) {                     /* if this a DB/Q/S-relative indirect BR i…  in cpu_ea()
2622 if ((CIR & LSDX_MASK) == LDD_X                          /* if the mode */  in cpu_ea()
2623   || (CIR & LSDX_MASK) == STD_X)                        /*   is double-word indexed */  in cpu_ea()
2824 X = CIR;                                                /* save the CIR in the index register */  in cpu_setup_irq_handler()
3238 if ((CIR & EXIT_MASK) == EXIT                           /* if an EXIT instruction is executing */  in cpu_exit_procedure()
3277     CIR = NIR;                                          /*   then set the current instruction */  in cpu_exit_procedure()
4077         CIR = NIR;                                      /*   then set the current instruction */  in halt_mode_interrupt()
4104             CIR = 0;                                    /* clear CIR to indicate a failure */  in halt_mode_interrupt()
4130         cpu_write_memory (absolute, 01413, CIR);            /*   and the current instruction */  in halt_mode_interrupt()
4159         CIR = 0;                                        /* clear the memory bank counter */  in halt_mode_interrupt()
4217                             CIR = CIR + 1;                  /*   then increment the bank number */  in halt_mode_interrupt()
4219                                               001431, CIR);  in halt_mode_interrupt()
4400 switch (SUBOP (CIR)) {                                  /* dispatch on bits 0-3 of the instruction …  in machine_instruction()
4423         cpu_ea (CIR, &class, &offset, NULL);            /* get the effective address */  in machine_instruction()
4434         if (CIR & M_FLAG) {                             /* STOR (none; STUN, BNDV) */  in machine_instruction()
4435             cpu_ea (CIR, &class, &offset, NULL);        /* get the effective address */  in machine_instruction()
4444             opcode = CIR & TBR_MASK;                    /* get the test and branch operation */  in machine_instruction()
4485 …           displacement = CIR & DISPL_255_MASK;            /*   then get the branch displacement */  in machine_instruction()
4487 …              if (CIR & DISPL_255_SIGN)                       /* if the displacement is negative */  in machine_instruction()
4515         cpu_ea (CIR, &class, &offset, NULL);            /* get the effective address */  in machine_instruction()
4526         cpu_ea (CIR, &class, &offset, NULL);            /* get the effective address */  in machine_instruction()
4537         cpu_ea (CIR, &class, &offset, NULL);            /* get the effective address */  in machine_instruction()
4548         cpu_ea (CIR, &class, &offset, NULL);            /* get the effective address */  in machine_instruction()
4559 …cpu_ea (CIR | M_FLAG, &class, &offset, NULL);   /* get the effective address (forced to data-relat…  in machine_instruction()
4562         if (CIR & M_FLAG)                               /* DECM (CCA, C, O; BNDV, ARITH) */  in machine_instruction()
4573         cpu_ea (CIR, &class, &offset, NULL);            /* get the effective address */  in machine_instruction()
4581         if ((CIR & BR_MASK) != BCC) {                   /* if the instruction is BR */  in machine_instruction()
4582 …   cpu_ea (CIR, &class, &offset, NULL);        /*   then get the effective address of the branch */  in machine_instruction()
4594         else if (TO_CCF (STA) & CIR << BCC_CCF_SHIFT)   /* otherwise if the BCC test succeeds */  in machine_instruction()
4600         if (CIR & M_FLAG) {                             /* if the instruction is LDD */  in machine_instruction()
4601 …cpu_ea (CIR, &class, &offset, NULL);        /*   then get the effective address of the double-word…  in machine_instruction()
4615 …cpu_ea (CIR | M_FLAG, &class,  &offset, &selector); /*   so get the effective word address of the …  in machine_instruction()
4631         if (CIR & M_FLAG) {                             /* if the instruction is STD */  in machine_instruction()
4632 …cpu_ea (CIR, &class, &offset, NULL);        /*   then get the effective address of the double-word…  in machine_instruction()
4644 …cpu_ea (CIR | M_FLAG, &class, &offset, &selector);  /*   so get the effective word address of the …  in machine_instruction()
4662         cpu_ea (CIR, &class, &offset, NULL);            /* get the effective address */  in machine_instruction()