Lines Matching refs:IREG

24 #define IREG(rnum)			(tms32031.r[rnum].i32[0])  macro
35 #define DIRECT() (((IREG(TMR_DP) & 0xff) << 16) | ((UINT16)OP))
45 #define CLR_FLAGS(f) do { IREG(TMR_ST) &= ~(f); } while (0)
50 #define OR_C(flag) do { IREG(TMR_ST) |= flag & CFLAG; } while (0)
51 #define OR_NZ(val) do { IREG(TMR_ST) |= (((val) >> 28) & NFLAG) | (((val) == 0) << 2); } while (0)
52 #define OR_NZF(reg) do { IREG(TMR_ST) |= ((MANTISSA(reg) >> 28) & NFLAG) | (((MANTISSA(reg) + EXP…
53 #define OR_NUF(reg) do { int temp = ((MANTISSA(reg) + EXPONENT(reg) + 128) == 0) << 4; IREG(TMR_S…
54 #define OR_V_SUB(a,b,r) do { UINT32 temp = ((((a) ^ (b)) & ((a) ^ (r))) >> 30) & VFLAG; IREG(TMR_S…
55 #define OR_V_ADD(a,b,r) do { UINT32 temp = ((~((a) ^ (b)) & ((a) ^ (r))) >> 30) & VFLAG; IREG(TMR_…
56 #define OR_C_SUB(a,b,r) do { IREG(TMR_ST) |= ((UINT32)(b) > (UINT32)(a)); } while (0)
57 #define OR_C_ADD(a,b,r) do { IREG(TMR_ST) |= ((UINT32)(~(a)) < (UINT32)(b)); } while (0)
61 #define OVM (IREG(TMR_ST) & OVMFLAG)
129 UINT32 temp = IREG(TMR_BK); in update_special()
136 if (tms32031.xf0_w && IREG(TMR_IOF) & 0x002) in update_special()
137 (*tms32031.xf0_w)((IREG(TMR_IOF) >> 2) & 1); in update_special()
138 if (tms32031.xf1_w && IREG(TMR_IOF) & 0x020) in update_special()
139 (*tms32031.xf1_w)((IREG(TMR_IOF) >> 6) & 1); in update_special()
156 #define CONDITION_LO (IREG(TMR_ST) & CFLAG)
157 #define CONDITION_LS (IREG(TMR_ST) & (CFLAG | ZFLAG))
158 #define CONDITION_HI (!(IREG(TMR_ST) & (CFLAG | ZFLAG)))
159 #define CONDITION_HS (!(IREG(TMR_ST) & CFLAG))
160 #define CONDITION_EQ (IREG(TMR_ST) & ZFLAG)
161 #define CONDITION_NE (!(IREG(TMR_ST) & ZFLAG))
162 #define CONDITION_LT (IREG(TMR_ST) & NFLAG)
163 #define CONDITION_LE (IREG(TMR_ST) & (NFLAG | ZFLAG))
164 #define CONDITION_GT (!(IREG(TMR_ST) & (NFLAG | ZFLAG)))
165 #define CONDITION_GE (!(IREG(TMR_ST) & NFLAG))
166 #define CONDITION_NV (!(IREG(TMR_ST) & VFLAG))
167 #define CONDITION_V (IREG(TMR_ST) & VFLAG)
168 #define CONDITION_NUF (!(IREG(TMR_ST) & UFFLAG))
169 #define CONDITION_UF (IREG(TMR_ST) & UFFLAG)
170 #define CONDITION_NLV (!(IREG(TMR_ST) & LVFLAG))
171 #define CONDITION_LV (IREG(TMR_ST) & LVFLAG)
172 #define CONDITION_NLUF (!(IREG(TMR_ST) & LUFFLAG))
173 #define CONDITION_LUF (IREG(TMR_ST) & LUFFLAG)
174 #define CONDITION_ZUF (IREG(TMR_ST) & (UFFLAG | ZFLAG))
231 IREG(TMR_ST) |= UFFLAG | LUFFLAG | ZFLAG; in double_to_dsp_with_flags()
240 IREG(TMR_ST) |= NFLAG; in double_to_dsp_with_flags()
243 IREG(TMR_ST) |= VFLAG | LVFLAG; in double_to_dsp_with_flags()
249 IREG(TMR_ST) |= ZFLAG; in double_to_dsp_with_flags()
260 IREG(TMR_ST) |= NFLAG; in double_to_dsp_with_flags()
266 IREG(TMR_ST) |= NFLAG; in double_to_dsp_with_flags()
355 IREG(TMR_ST) |= VFLAG | LVFLAG; in float2int()
375 IREG(TMR_ST) |= VFLAG | LVFLAG; in float2int()
515 IREG(TMR_ST) |= UFFLAG | LUFFLAG; in addf()
523 IREG(TMR_ST) |= VFLAG | LVFLAG; in addf()
620 IREG(TMR_ST) |= UFFLAG | LUFFLAG; in subf()
630 IREG(TMR_ST) |= VFLAG | LVFLAG; in subf()
710 IREG(TMR_ST) |= UFFLAG | LUFFLAG; in mpyf()
718 IREG(TMR_ST) |= VFLAG | LVFLAG; in mpyf()
745 return IREG(reg) + (UINT8)OP; in mod00_d()
751 return IREG(reg) - (UINT8)OP; in mod01_d()
757 IREG(reg) += (UINT8)OP; in mod02_d()
758 return IREG(reg); in mod02_d()
764 IREG(reg) -= (UINT8)OP; in mod03_d()
765 return IREG(reg); in mod03_d()
771 UINT32 result = IREG(reg); in mod04_d()
772 IREG(reg) += (UINT8)OP; in mod04_d()
779 UINT32 result = IREG(reg); in mod05_d()
780 IREG(reg) -= (UINT8)OP; in mod05_d()
787 UINT32 result = IREG(reg); in mod06_d()
789 if (temp >= IREG(TMR_BK)) in mod06_d()
790 temp -= IREG(TMR_BK); in mod06_d()
791 IREG(reg) = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod06_d()
798 UINT32 result = IREG(reg); in mod07_d()
801 temp += IREG(TMR_BK); in mod07_d()
802 IREG(reg) = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod07_d()
812 return IREG(reg) + 1; in mod00_1()
818 return IREG(reg) - 1; in mod01_1()
824 return ++IREG(reg); in mod02_1()
830 return --IREG(reg); in mod03_1()
836 return IREG(reg)++; in mod04_1()
842 return IREG(reg)--; in mod05_1()
848 UINT32 result = IREG(reg); in mod06_1()
850 if (temp >= IREG(TMR_BK)) in mod06_1()
851 temp -= IREG(TMR_BK); in mod06_1()
852 IREG(reg) = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod06_1()
859 UINT32 result = IREG(reg); in mod07_1()
862 temp += IREG(TMR_BK); in mod07_1()
863 IREG(reg) = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod07_1()
873 return IREG(reg) + IREG(TMR_IR0); in mod08()
879 return IREG(reg) - IREG(TMR_IR0); in mod09()
885 IREG(reg) += IREG(TMR_IR0); in mod0a()
886 return IREG(reg); in mod0a()
892 IREG(reg) -= IREG(TMR_IR0); in mod0b()
893 return IREG(reg); in mod0b()
899 UINT32 result = IREG(reg); in mod0c()
900 IREG(reg) += IREG(TMR_IR0); in mod0c()
907 UINT32 result = IREG(reg); in mod0d()
908 IREG(reg) -= IREG(TMR_IR0); in mod0d()
915 UINT32 result = IREG(reg); in mod0e()
916 INT32 temp = (result & tms32031.bkmask) + IREG(TMR_IR0); in mod0e()
917 if (temp >= IREG(TMR_BK)) in mod0e()
918 temp -= IREG(TMR_BK); in mod0e()
919 IREG(reg) = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod0e()
926 UINT32 result = IREG(reg); in mod0f()
927 INT32 temp = (result & tms32031.bkmask) - IREG(TMR_IR0); in mod0f()
929 temp += IREG(TMR_BK); in mod0f()
930 IREG(reg) = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod0f()
940 return IREG(reg) + IREG(TMR_IR1); in mod10()
946 return IREG(reg) - IREG(TMR_IR1); in mod11()
952 IREG(reg) += IREG(TMR_IR1); in mod12()
953 return IREG(reg); in mod12()
959 IREG(reg) -= IREG(TMR_IR1); in mod13()
960 return IREG(reg); in mod13()
966 UINT32 result = IREG(reg); in mod14()
967 IREG(reg) += IREG(TMR_IR1); in mod14()
974 UINT32 result = IREG(reg); in mod15()
975 IREG(reg) -= IREG(TMR_IR1); in mod15()
982 UINT32 result = IREG(reg); in mod16()
983 INT32 temp = (result & tms32031.bkmask) + IREG(TMR_IR1); in mod16()
984 if (temp >= IREG(TMR_BK)) in mod16()
985 temp -= IREG(TMR_BK); in mod16()
986 IREG(reg) = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod16()
993 UINT32 result = IREG(reg); in mod17()
994 INT32 temp = (result & tms32031.bkmask) - IREG(TMR_IR1); in mod17()
996 temp += IREG(TMR_BK); in mod17()
997 IREG(reg) = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod17()
1007 return IREG(reg); in mod18()
1028 defptr = &IREG(reg); in mod02_1_def()
1029 defval = IREG(reg) + 1; in mod02_1_def()
1036 defptr = &IREG(reg); in mod03_1_def()
1037 defval = IREG(reg) - 1; in mod03_1_def()
1044 defptr = &IREG(reg); in mod04_1_def()
1045 defval = IREG(reg) + 1; in mod04_1_def()
1046 return IREG(reg); in mod04_1_def()
1052 defptr = &IREG(reg); in mod05_1_def()
1053 defval = IREG(reg) - 1; in mod05_1_def()
1054 return IREG(reg); in mod05_1_def()
1060 UINT32 result = IREG(reg); in mod06_1_def()
1062 if (temp >= IREG(TMR_BK)) in mod06_1_def()
1063 temp -= IREG(TMR_BK); in mod06_1_def()
1064 defptr = &IREG(reg); in mod06_1_def()
1065 defval = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod06_1_def()
1072 UINT32 result = IREG(reg); in mod07_1_def()
1075 temp += IREG(TMR_BK); in mod07_1_def()
1076 defptr = &IREG(reg); in mod07_1_def()
1077 defval = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod07_1_def()
1087 defptr = &IREG(reg); in mod0a_def()
1088 defval = IREG(reg) + IREG(TMR_IR0); in mod0a_def()
1095 defptr = &IREG(reg); in mod0b_def()
1096 defval = IREG(reg) - IREG(TMR_IR0); in mod0b_def()
1103 defptr = &IREG(reg); in mod0c_def()
1104 defval = IREG(reg) + IREG(TMR_IR0); in mod0c_def()
1105 return IREG(reg); in mod0c_def()
1111 defptr = &IREG(reg); in mod0d_def()
1112 defval = IREG(reg) - IREG(TMR_IR0); in mod0d_def()
1113 return IREG(reg); in mod0d_def()
1119 UINT32 result = IREG(reg); in mod0e_def()
1120 INT32 temp = (result & tms32031.bkmask) + IREG(TMR_IR0); in mod0e_def()
1121 if (temp >= IREG(TMR_BK)) in mod0e_def()
1122 temp -= IREG(TMR_BK); in mod0e_def()
1123 defptr = &IREG(reg); in mod0e_def()
1124 defval = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod0e_def()
1131 UINT32 result = IREG(reg); in mod0f_def()
1132 INT32 temp = (result & tms32031.bkmask) - IREG(TMR_IR0); in mod0f_def()
1134 temp += IREG(TMR_BK); in mod0f_def()
1135 defptr = &IREG(reg); in mod0f_def()
1136 defval = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod0f_def()
1146 defptr = &IREG(reg); in mod12_def()
1147 defval = IREG(reg) + IREG(TMR_IR1); in mod12_def()
1154 defptr = &IREG(reg); in mod13_def()
1155 defval = IREG(reg) - IREG(TMR_IR1); in mod13_def()
1162 defptr = &IREG(reg); in mod14_def()
1163 defval = IREG(reg) + IREG(TMR_IR1); in mod14_def()
1164 return IREG(reg); in mod14_def()
1170 defptr = &IREG(reg); in mod15_def()
1171 defval = IREG(reg) - IREG(TMR_IR1); in mod15_def()
1172 return IREG(reg); in mod15_def()
1178 UINT32 result = IREG(reg); in mod16_def()
1179 INT32 temp = (result & tms32031.bkmask) + IREG(TMR_IR1); in mod16_def()
1180 if (temp >= IREG(TMR_BK)) in mod16_def()
1181 temp -= IREG(TMR_BK); in mod16_def()
1182 defptr = &IREG(reg); in mod16_def()
1183 defval = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod16_def()
1190 UINT32 result = IREG(reg); in mod17_def()
1191 INT32 temp = (result & tms32031.bkmask) - IREG(TMR_IR1); in mod17_def()
1193 temp += IREG(TMR_BK); in mod17_def()
1194 defptr = &IREG(reg); in mod17_def()
1195 defval = (IREG(reg) & ~tms32031.bkmask) | (temp & tms32031.bkmask); in mod17_def()
1285 IREG(dreg) = _res; \
1287 IREG(dreg) = 0x7fffffff; \
1293 IREG(TMR_ST) |= VFLAG | LVFLAG; \
1301 UINT32 src = IREG(OP & 31); in absi_reg()
1331 UINT32 _res = src1 + src2 + (IREG(TMR_ST) & CFLAG); \
1333 IREG(dreg) = _res; \
1335 IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
1338 UINT32 tempc = src2 + (IREG(TMR_ST) & CFLAG); \
1348 UINT32 src = IREG(OP & 31); in addc_reg()
1350 UINT32 dst = IREG(dreg); in addc_reg()
1358 UINT32 dst = IREG(dreg); in addc_dir()
1366 UINT32 dst = IREG(dreg); in addc_ind()
1374 UINT32 dst = IREG(dreg); in addc_imm()
1415 IREG(dreg) = _res; \
1417 IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
1429 UINT32 src = IREG(OP & 31); in addi_reg()
1431 UINT32 dst = IREG(dreg); in addi_reg()
1439 UINT32 dst = IREG(dreg); in addi_dir()
1447 UINT32 dst = IREG(dreg); in addi_ind()
1455 UINT32 dst = IREG(dreg); in addi_imm()
1464 IREG(dreg) = _res; \
1476 UINT32 src = IREG(OP & 31); in and_reg()
1478 UINT32 dst = IREG(dreg); in and_reg()
1486 UINT32 dst = IREG(dreg); in and_dir()
1494 UINT32 dst = IREG(dreg); in and_ind()
1502 UINT32 dst = IREG(dreg); in and_imm()
1511 IREG(dreg) = _res; \
1523 UINT32 src = IREG(OP & 31); in andn_reg()
1525 UINT32 dst = IREG(dreg); in andn_reg()
1533 UINT32 dst = IREG(dreg); in andn_dir()
1541 UINT32 dst = IREG(dreg); in andn_ind()
1549 UINT32 dst = IREG(dreg); in andn_imm()
1573 IREG(dreg) = _res; \
1598 int count = IREG(OP & 31); in ash_reg()
1599 UINT32 src = IREG(dreg); in ash_reg()
1607 UINT32 src = IREG(dreg); in ash_dir()
1615 UINT32 src = IREG(dreg); in ash_ind()
1623 UINT32 src = IREG(dreg); in ash_imm()
1669 UINT32 src = IREG(OP & 31); in cmpi_reg()
1670 UINT32 dst = IREG((OP >> 16) & 31); in cmpi_reg()
1677 UINT32 dst = IREG((OP >> 16) & 31); in cmpi_dir()
1684 UINT32 dst = IREG((OP >> 16) & 31); in cmpi_ind()
1691 UINT32 dst = IREG((OP >> 16) & 31); in cmpi_imm()
1735 IREG(dreg) = src; \
1741 UINT32 src = IREG(OP & 31); in float_reg()
1855 IREG(dreg) = src; \
1867 UINT32 src = IREG(OP & 31); in ldi_reg()
1947 IREG(dreg) = _res; \
1970 int count = IREG(OP & 31); in lsh_reg()
1971 UINT32 src = IREG(dreg); in lsh_reg()
1979 UINT32 src = IREG(dreg); in lsh_dir()
1987 UINT32 src = IREG(dreg); in lsh_ind()
1995 UINT32 src = IREG(dreg); in lsh_imm()
2036 IREG(dreg) = _res; \
2038 IREG(dreg) = (_res < 0) ? 0x80000000 : 0x7fffffff; \
2044 IREG(TMR_ST) |= VFLAG | LVFLAG; \
2052 UINT32 src = IREG(OP & 31); in mpyi_reg()
2054 UINT32 dst = IREG(dreg); in mpyi_reg()
2062 UINT32 dst = IREG(dreg); in mpyi_dir()
2070 UINT32 dst = IREG(dreg); in mpyi_ind()
2078 UINT32 dst = IREG(dreg); in mpyi_imm()
2086 UINT32 temps = 0 - (IREG(TMR_ST) & CFLAG); \
2089 IREG(dreg) = _res; \
2091 IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff; \
2103 UINT32 src = IREG(OP & 31); in negb_reg()
2166 IREG(dreg) = _res; \
2168 IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff; \
2180 UINT32 src = IREG(OP & 31); in negi_reg()
2229 IREG(dreg) = _res; \
2241 UINT32 src = IREG(OP & 31); in not_reg()
2272 UINT32 val = RMEM(IREG(TMR_SP)--); in pop()
2273 IREG(dreg) = val; in pop()
2286 UINT32 val = RMEM(IREG(TMR_SP)--); in popf()
2294 WMEM(++IREG(TMR_SP), IREG((OP >> 16) & 31)); in push()
2300 WMEM(++IREG(TMR_SP), FP2LONG(dreg)); in pushf()
2308 IREG(dreg) = _res; \
2320 UINT32 src = IREG(OP & 31); in or_reg()
2322 UINT32 dst = IREG(dreg); in or_reg()
2330 UINT32 dst = IREG(dreg); in or_dir()
2338 UINT32 dst = IREG(dreg); in or_ind()
2346 UINT32 dst = IREG(dreg); in or_imm()
2374 IREG(TMR_ST) |= VFLAG | LVFLAG; \
2414 UINT32 res = IREG(dreg); in rol()
2417 IREG(dreg) = res; in rol()
2431 UINT32 res = IREG(dreg); in rolc()
2433 res = (res << 1) | (IREG(TMR_ST) & CFLAG); in rolc()
2434 IREG(dreg) = res; in rolc()
2448 UINT32 res = IREG(dreg); in ror()
2451 IREG(dreg) = res; in ror()
2465 UINT32 res = IREG(dreg); in rorc()
2467 res = (res >> 1) | ((IREG(TMR_ST) & CFLAG) << 31); in rorc()
2468 IREG(dreg) = res; in rorc()
2483 IREG(TMR_RC) = IREG(OP & 31); in rtps_reg()
2484 IREG(TMR_RS) = tms32031.pc; in rtps_reg()
2485 IREG(TMR_RE) = tms32031.pc; in rtps_reg()
2486 IREG(TMR_ST) |= RMFLAG; in rtps_reg()
2493 IREG(TMR_RC) = RMEM(DIRECT()); in rtps_dir()
2494 IREG(TMR_RS) = tms32031.pc; in rtps_dir()
2495 IREG(TMR_RE) = tms32031.pc; in rtps_dir()
2496 IREG(TMR_ST) |= RMFLAG; in rtps_dir()
2503 IREG(TMR_RC) = RMEM(INDIRECT_D(OP >> 8)); in rtps_ind()
2504 IREG(TMR_RS) = tms32031.pc; in rtps_ind()
2505 IREG(TMR_RE) = tms32031.pc; in rtps_ind()
2506 IREG(TMR_ST) |= RMFLAG; in rtps_ind()
2513 IREG(TMR_RC) = (UINT16)OP; in rtps_imm()
2514 IREG(TMR_RS) = tms32031.pc; in rtps_imm()
2515 IREG(TMR_RE) = tms32031.pc; in rtps_imm()
2516 IREG(TMR_ST) |= RMFLAG; in rtps_imm()
2542 WMEM(DIRECT(), IREG((OP >> 16) & 31)); in sti_dir()
2547 WMEM(INDIRECT_D(OP >> 8), IREG((OP >> 16) & 31)); in sti_ind()
2563 UINT32 temps = src1 - (IREG(TMR_ST) & CFLAG); \
2566 IREG(dreg) = _res; \
2568 IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
2580 UINT32 src = IREG(OP & 31); in subb_reg()
2582 UINT32 dst = IREG(dreg); in subb_reg()
2590 UINT32 dst = IREG(dreg); in subb_dir()
2598 UINT32 dst = IREG(dreg); in subb_ind()
2606 UINT32 dst = IREG(dreg); in subb_imm()
2614 UINT32 dst = IREG(dreg); \
2616 IREG(dreg) = ((dst - src) << 1) | 1; \
2618 IREG(dreg) = dst << 1; \
2625 UINT32 src = IREG(OP & 31); in subc_reg()
2688 IREG(dreg) = _res; \
2690 IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
2702 UINT32 src = IREG(OP & 31); in subi_reg()
2704 UINT32 dst = IREG(dreg); in subi_reg()
2712 UINT32 dst = IREG(dreg); in subi_dir()
2720 UINT32 dst = IREG(dreg); in subi_ind()
2728 UINT32 dst = IREG(dreg); in subi_imm()
2736 UINT32 src = IREG(OP & 31); in subrb_reg()
2738 UINT32 dst = IREG(dreg); in subrb_reg()
2746 UINT32 dst = IREG(dreg); in subrb_dir()
2754 UINT32 dst = IREG(dreg); in subrb_ind()
2762 UINT32 dst = IREG(dreg); in subrb_imm()
2801 UINT32 src = IREG(OP & 31); in subri_reg()
2803 UINT32 dst = IREG(dreg); in subri_reg()
2811 UINT32 dst = IREG(dreg); in subri_dir()
2819 UINT32 dst = IREG(dreg); in subri_ind()
2827 UINT32 dst = IREG(dreg); in subri_imm()
2842 UINT32 src = IREG(OP & 31); in tstb_reg()
2843 UINT32 dst = IREG((OP >> 16) & 31); in tstb_reg()
2850 UINT32 dst = IREG((OP >> 16) & 31); in tstb_dir()
2857 UINT32 dst = IREG((OP >> 16) & 31); in tstb_ind()
2864 UINT32 dst = IREG((OP >> 16) & 31); in tstb_imm()
2873 IREG(dreg) = _res; \
2885 UINT32 src = IREG(OP & 31); in xor_reg()
2887 UINT32 dst = IREG(dreg); in xor_reg()
2895 UINT32 dst = IREG(dreg); in xor_dir()
2903 UINT32 dst = IREG(dreg); in xor_ind()
2911 UINT32 dst = IREG(dreg); in xor_imm()
2930 UINT32 src1 = IREG((OP >> 8) & 31); in addc3_regreg()
2931 UINT32 src2 = IREG(OP & 31); in addc3_regreg()
2938 UINT32 src2 = IREG(OP & 31); in addc3_indreg()
2946 UINT32 src1 = IREG((OP >> 8) & 31); in addc3_regind()
3004 UINT32 src1 = IREG((OP >> 8) & 31); in addi3_regreg()
3005 UINT32 src2 = IREG(OP & 31); in addi3_regreg()
3012 UINT32 src2 = IREG(OP & 31); in addi3_indreg()
3020 UINT32 src1 = IREG((OP >> 8) & 31); in addi3_regind()
3039 UINT32 src1 = IREG((OP >> 8) & 31); in and3_regreg()
3040 UINT32 src2 = IREG(OP & 31); in and3_regreg()
3047 UINT32 src2 = IREG(OP & 31); in and3_indreg()
3055 UINT32 src1 = IREG((OP >> 8) & 31); in and3_regind()
3074 UINT32 src1 = IREG((OP >> 8) & 31); in andn3_regreg()
3075 UINT32 src2 = IREG(OP & 31); in andn3_regreg()
3082 UINT32 src2 = IREG(OP & 31); in andn3_indreg()
3090 UINT32 src1 = IREG((OP >> 8) & 31); in andn3_regind()
3109 UINT32 src1 = IREG((OP >> 8) & 31); in ash3_regreg()
3110 UINT32 src2 = IREG(OP & 31); in ash3_regreg()
3117 UINT32 src2 = IREG(OP & 31); in ash3_indreg()
3125 UINT32 src1 = IREG((OP >> 8) & 31); in ash3_regind()
3179 UINT32 src1 = IREG((OP >> 8) & 31); in cmpi3_regreg()
3180 UINT32 src2 = IREG(OP & 31); in cmpi3_regreg()
3186 UINT32 src2 = IREG(OP & 31); in cmpi3_indreg()
3193 UINT32 src1 = IREG((OP >> 8) & 31); in cmpi3_regind()
3210 UINT32 src1 = IREG((OP >> 8) & 31); in lsh3_regreg()
3211 UINT32 src2 = IREG(OP & 31); in lsh3_regreg()
3218 UINT32 src2 = IREG(OP & 31); in lsh3_indreg()
3226 UINT32 src1 = IREG((OP >> 8) & 31); in lsh3_regind()
3284 UINT32 src1 = IREG((OP >> 8) & 31); in mpyi3_regreg()
3285 UINT32 src2 = IREG(OP & 31); in mpyi3_regreg()
3292 UINT32 src2 = IREG(OP & 31); in mpyi3_indreg()
3300 UINT32 src1 = IREG((OP >> 8) & 31); in mpyi3_regind()
3319 UINT32 src1 = IREG((OP >> 8) & 31); in or3_regreg()
3320 UINT32 src2 = IREG(OP & 31); in or3_regreg()
3327 UINT32 src2 = IREG(OP & 31); in or3_indreg()
3335 UINT32 src1 = IREG((OP >> 8) & 31); in or3_regind()
3354 UINT32 src1 = IREG((OP >> 8) & 31); in subb3_regreg()
3355 UINT32 src2 = IREG(OP & 31); in subb3_regreg()
3362 UINT32 src2 = IREG(OP & 31); in subb3_indreg()
3370 UINT32 src1 = IREG((OP >> 8) & 31); in subb3_regind()
3428 UINT32 src1 = IREG((OP >> 8) & 31); in subi3_regreg()
3429 UINT32 src2 = IREG(OP & 31); in subi3_regreg()
3436 UINT32 src2 = IREG(OP & 31); in subi3_indreg()
3444 UINT32 src1 = IREG((OP >> 8) & 31); in subi3_regind()
3463 UINT32 src1 = IREG((OP >> 8) & 31); in tstb3_regreg()
3464 UINT32 src2 = IREG(OP & 31); in tstb3_regreg()
3470 UINT32 src2 = IREG(OP & 31); in tstb3_indreg()
3477 UINT32 src1 = IREG((OP >> 8) & 31); in tstb3_regind()
3494 UINT32 src1 = IREG((OP >> 8) & 31); in xor3_regreg()
3495 UINT32 src2 = IREG(OP & 31); in xor3_regreg()
3502 UINT32 src2 = IREG(OP & 31); in xor3_indreg()
3510 UINT32 src1 = IREG((OP >> 8) & 31); in xor3_regind()
4304 IREG(dreg) = IREG(OP & 31); in ldiu_reg()
4312 IREG(dreg) = RMEM(DIRECT()); in ldiu_dir()
4320 IREG(dreg) = RMEM(INDIRECT_D(OP >> 8)); in ldiu_ind()
4328 IREG(dreg) = (INT16)OP; in ldiu_imm()
4340 IREG(dreg) = IREG(OP & 31); in ldilo_reg()
4352 IREG(dreg) = val; in ldilo_dir()
4364 IREG(dreg) = val; in ldilo_ind()
4375 IREG(dreg) = (INT16)OP; in ldilo_imm()
4388 IREG(dreg) = IREG(OP & 31); in ldils_reg()
4400 IREG(dreg) = val; in ldils_dir()
4412 IREG(dreg) = val; in ldils_ind()
4423 IREG(dreg) = (INT16)OP; in ldils_imm()
4436 IREG(dreg) = IREG(OP & 31); in ldihi_reg()
4448 IREG(dreg) = val; in ldihi_dir()
4460 IREG(dreg) = val; in ldihi_ind()
4471 IREG(dreg) = (INT16)OP; in ldihi_imm()
4484 IREG(dreg) = IREG(OP & 31); in ldihs_reg()
4496 IREG(dreg) = val; in ldihs_dir()
4508 IREG(dreg) = val; in ldihs_ind()
4519 IREG(dreg) = (INT16)OP; in ldihs_imm()
4532 IREG(dreg) = IREG(OP & 31); in ldieq_reg()
4544 IREG(dreg) = val; in ldieq_dir()
4556 IREG(dreg) = val; in ldieq_ind()
4567 IREG(dreg) = (INT16)OP; in ldieq_imm()
4580 IREG(dreg) = IREG(OP & 31); in ldine_reg()
4592 IREG(dreg) = val; in ldine_dir()
4604 IREG(dreg) = val; in ldine_ind()
4615 IREG(dreg) = (INT16)OP; in ldine_imm()
4628 IREG(dreg) = IREG(OP & 31); in ldilt_reg()
4640 IREG(dreg) = val; in ldilt_dir()
4652 IREG(dreg) = val; in ldilt_ind()
4663 IREG(dreg) = (INT16)OP; in ldilt_imm()
4676 IREG(dreg) = IREG(OP & 31); in ldile_reg()
4688 IREG(dreg) = val; in ldile_dir()
4700 IREG(dreg) = val; in ldile_ind()
4711 IREG(dreg) = (INT16)OP; in ldile_imm()
4724 IREG(dreg) = IREG(OP & 31); in ldigt_reg()
4736 IREG(dreg) = val; in ldigt_dir()
4748 IREG(dreg) = val; in ldigt_ind()
4759 IREG(dreg) = (INT16)OP; in ldigt_imm()
4772 IREG(dreg) = IREG(OP & 31); in ldige_reg()
4784 IREG(dreg) = val; in ldige_dir()
4796 IREG(dreg) = val; in ldige_ind()
4807 IREG(dreg) = (INT16)OP; in ldige_imm()
4820 IREG(dreg) = IREG(OP & 31); in ldinv_reg()
4832 IREG(dreg) = val; in ldinv_dir()
4844 IREG(dreg) = val; in ldinv_ind()
4855 IREG(dreg) = (INT16)OP; in ldinv_imm()
4868 IREG(dreg) = IREG(OP & 31); in ldiuf_reg()
4880 IREG(dreg) = val; in ldiuf_dir()
4892 IREG(dreg) = val; in ldiuf_ind()
4903 IREG(dreg) = (INT16)OP; in ldiuf_imm()
4916 IREG(dreg) = IREG(OP & 31); in ldinuf_reg()
4928 IREG(dreg) = val; in ldinuf_dir()
4940 IREG(dreg) = val; in ldinuf_ind()
4951 IREG(dreg) = (INT16)OP; in ldinuf_imm()
4964 IREG(dreg) = IREG(OP & 31); in ldiv_reg()
4976 IREG(dreg) = val; in ldiv_dir()
4988 IREG(dreg) = val; in ldiv_ind()
4999 IREG(dreg) = (INT16)OP; in ldiv_imm()
5012 IREG(dreg) = IREG(OP & 31); in ldinlv_reg()
5024 IREG(dreg) = val; in ldinlv_dir()
5036 IREG(dreg) = val; in ldinlv_ind()
5047 IREG(dreg) = (INT16)OP; in ldinlv_imm()
5060 IREG(dreg) = IREG(OP & 31); in ldilv_reg()
5072 IREG(dreg) = val; in ldilv_dir()
5084 IREG(dreg) = val; in ldilv_ind()
5095 IREG(dreg) = (INT16)OP; in ldilv_imm()
5108 IREG(dreg) = IREG(OP & 31); in ldinluf_reg()
5120 IREG(dreg) = val; in ldinluf_dir()
5132 IREG(dreg) = val; in ldinluf_ind()
5143 IREG(dreg) = (INT16)OP; in ldinluf_imm()
5156 IREG(dreg) = IREG(OP & 31); in ldiluf_reg()
5168 IREG(dreg) = val; in ldiluf_dir()
5180 IREG(dreg) = val; in ldiluf_ind()
5191 IREG(dreg) = (INT16)OP; in ldiluf_imm()
5204 IREG(dreg) = IREG(OP & 31); in ldizuf_reg()
5216 IREG(dreg) = val; in ldizuf_dir()
5228 IREG(dreg) = val; in ldizuf_ind()
5239 IREG(dreg) = (INT16)OP; in ldizuf_imm()
5290 WMEM(++IREG(TMR_SP), tms32031.pc); in call_imm()
5300 IREG(TMR_RS) = tms32031.pc; in rptb_imm()
5301 IREG(TMR_RE) = OP & 0xffffff; in rptb_imm()
5302 IREG(TMR_ST) |= RMFLAG; in rptb_imm()
5316 tms32031.pc = IREG(OP & 31); in brc_reg()
5325 execute_delayed(IREG(OP & 31)); in brcd_reg()
5349 int res = (IREG(reg) - 1) & 0xffffff; in dbc_reg()
5350 IREG(reg) = res | (IREG(reg) & 0xff000000); in dbc_reg()
5353 tms32031.pc = IREG(OP & 31); in dbc_reg()
5362 int res = (IREG(reg) - 1) & 0xffffff; in dbcd_reg()
5363 IREG(reg) = res | (IREG(reg) & 0xff000000); in dbcd_reg()
5365 execute_delayed(IREG(OP & 31)); in dbcd_reg()
5371 int res = (IREG(reg) - 1) & 0xffffff; in dbc_imm()
5372 IREG(reg) = res | (IREG(reg) & 0xff000000); in dbc_imm()
5384 int res = (IREG(reg) - 1) & 0xffffff; in dbcd_imm()
5385 IREG(reg) = res | (IREG(reg) & 0xff000000); in dbcd_imm()
5396 WMEM(++IREG(TMR_SP), tms32031.pc); in callc_reg()
5397 tms32031.pc = IREG(OP & 31); in callc_reg()
5407 WMEM(++IREG(TMR_SP), tms32031.pc); in callc_imm()
5418 WMEM(++IREG(TMR_SP), tms32031.pc); in trap()
5419 IREG(TMR_ST) &= ~GIEFLAG; in trap()
5437 tms32031.pc = RMEM(IREG(TMR_SP)--); in retic_reg()
5439 IREG(TMR_ST) |= GIEFLAG; in retic_reg()
5448 tms32031.pc = RMEM(IREG(TMR_SP)--); in retsc_reg()
5575 UINT32 src1 = IREG((OP >> 19) & 7); in mpyaddi_0()
5576 UINT32 src2 = IREG((OP >> 16) & 7); in mpyaddi_0()
5590 IREG((OP >> 23) & 1) = mres; in mpyaddi_0()
5591 IREG(((OP >> 22) & 1) | 2) = ares; in mpyaddi_0()
5598 UINT32 src1 = IREG((OP >> 19) & 7); in mpyaddi_1()
5599 UINT32 src2 = IREG((OP >> 16) & 7); in mpyaddi_1()
5613 IREG((OP >> 23) & 1) = mres; in mpyaddi_1()
5614 IREG(((OP >> 22) & 1) | 2) = ares; in mpyaddi_1()
5621 UINT32 src1 = IREG((OP >> 19) & 7); in mpyaddi_2()
5622 UINT32 src2 = IREG((OP >> 16) & 7); in mpyaddi_2()
5636 IREG((OP >> 23) & 1) = mres; in mpyaddi_2()
5637 IREG(((OP >> 22) & 1) | 2) = ares; in mpyaddi_2()
5644 UINT32 src1 = IREG((OP >> 19) & 7); in mpyaddi_3()
5645 UINT32 src2 = IREG((OP >> 16) & 7); in mpyaddi_3()
5659 IREG((OP >> 23) & 1) = mres; in mpyaddi_3()
5660 IREG(((OP >> 22) & 1) | 2) = ares; in mpyaddi_3()
5669 UINT32 src1 = IREG((OP >> 19) & 7); in mpysubi_0()
5670 UINT32 src2 = IREG((OP >> 16) & 7); in mpysubi_0()
5684 IREG((OP >> 23) & 1) = mres; in mpysubi_0()
5685 IREG(((OP >> 22) & 1) | 2) = ares; in mpysubi_0()
5692 UINT32 src1 = IREG((OP >> 19) & 7); in mpysubi_1()
5693 UINT32 src2 = IREG((OP >> 16) & 7); in mpysubi_1()
5707 IREG((OP >> 23) & 1) = mres; in mpysubi_1()
5708 IREG(((OP >> 22) & 1) | 2) = ares; in mpysubi_1()
5715 UINT32 src1 = IREG((OP >> 19) & 7); in mpysubi_2()
5716 UINT32 src2 = IREG((OP >> 16) & 7); in mpysubi_2()
5730 IREG((OP >> 23) & 1) = mres; in mpysubi_2()
5731 IREG(((OP >> 22) & 1) | 2) = ares; in mpysubi_2()
5738 UINT32 src1 = IREG((OP >> 19) & 7); in mpysubi_3()
5739 UINT32 src2 = IREG((OP >> 16) & 7); in mpysubi_3()
5753 IREG((OP >> 23) & 1) = mres; in mpysubi_3()
5754 IREG(((OP >> 22) & 1) | 2) = ares; in mpysubi_3()
5769 WMEM(INDIRECT_1_DEF(OP >> 8), IREG((OP >> 16) & 7)); in stisti()
5770 WMEM(INDIRECT_1(OP), IREG((OP >> 22) & 7)); in stisti()
5792 IREG((OP >> 19) & 7) = RMEM(INDIRECT_1_DEF(OP >> 8)); in ldildi()
5793 IREG((OP >> 22) & 7) = RMEM(INDIRECT_1(OP)); in ldildi()
5820 UINT32 src3 = IREG((OP >> 16) & 7); in absisti()
5844 UINT32 src3 = IREG((OP >> 16) & 7); in addi3sti()
5848 UINT32 src1 = IREG((OP >> 19) & 7); in addi3sti()
5857 UINT32 src3 = IREG((OP >> 16) & 7); in and3sti()
5861 UINT32 src1 = IREG((OP >> 19) & 7); in and3sti()
5870 UINT32 src3 = IREG((OP >> 16) & 7); in ash3sti()
5874 UINT32 count = IREG((OP >> 19) & 7); in ash3sti()
5883 UINT32 src3 = IREG((OP >> 16) & 7); in fixsti()
5900 IREG(dreg) = src2; in floatstf()
5921 UINT32 src3 = IREG((OP >> 16) & 7); in ldisti()
5923 IREG((OP >> 22) & 7) = src2; in ldisti()
5930 UINT32 src3 = IREG((OP >> 16) & 7); in lsh3sti()
5934 UINT32 count = IREG((OP >> 19) & 7); in lsh3sti()
5955 UINT32 src3 = IREG((OP >> 16) & 7); in mpyi3sti()
5959 UINT32 src1 = IREG((OP >> 19) & 7); in mpyi3sti()
5980 UINT32 src3 = IREG((OP >> 16) & 7); in negisti()
5992 UINT32 src3 = IREG((OP >> 16) & 7); in notsti()
6004 UINT32 src3 = IREG((OP >> 16) & 7); in or3sti()
6008 UINT32 src1 = IREG((OP >> 19) & 7); in or3sti()
6029 UINT32 src3 = IREG((OP >> 16) & 7); in subi3sti()
6033 UINT32 src1 = IREG((OP >> 19) & 7); in subi3sti()
6042 UINT32 src3 = IREG((OP >> 16) & 7); in xor3sti()
6046 UINT32 src1 = IREG((OP >> 19) & 7); in xor3sti()