Lines Matching refs:rb_stencil_cntl

2262    UPDATE_REG(rb_stencil_cntl, RB_STENCIL_CNTL);  in tu_CmdBindPipeline()
2528 cmd->state.rb_stencil_cntl &= ~( in tu_CmdSetStencilTestEnableEXT()
2534 cmd->state.rb_stencil_cntl |= in tu_CmdSetStencilTestEnableEXT()
2554 cmd->state.rb_stencil_cntl &= ~( in tu_CmdSetStencilOpEXT()
2560 cmd->state.rb_stencil_cntl |= in tu_CmdSetStencilOpEXT()
2568 cmd->state.rb_stencil_cntl &= ~( in tu_CmdSetStencilOpEXT()
2574 cmd->state.rb_stencil_cntl |= in tu_CmdSetStencilOpEXT()
3706 bool stencil_test_enable = cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_STENCIL_ENABLE; in tu6_calculate_lrz_state()
3719 …(cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_FUNC__MASK) >> A6XX_RB_STENCIL_CONTROL_FUNC_… in tu6_calculate_lrz_state()
3722 …(cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_FUNC_BF__MASK) >> A6XX_RB_STENCIL_CONTROL_FU… in tu6_calculate_lrz_state()
3783 cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_STENCIL_ENABLE; in tu6_writes_stencil()
3796 …(cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_FAIL__MASK) >> A6XX_RB_STENCIL_CONTROL_FAIL_… in tu6_writes_stencil()
3798 …(cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_ZPASS__MASK) >> A6XX_RB_STENCIL_CONTROL_ZPAS… in tu6_writes_stencil()
3800 …(cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_ZFAIL__MASK) >> A6XX_RB_STENCIL_CONTROL_ZFAI… in tu6_writes_stencil()
3802 …(cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_FAIL_BF__MASK) >> A6XX_RB_STENCIL_CONTROL_FA… in tu6_writes_stencil()
3804 …(cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK) >> A6XX_RB_STENCIL_CONTROL_Z… in tu6_writes_stencil()
3806 …(cmd->state.rb_stencil_cntl & A6XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK) >> A6XX_RB_STENCIL_CONTROL_Z… in tu6_writes_stencil()
3926 tu_cs_emit_regs(&cs, A6XX_RB_STENCIL_CONTROL(.dword = cmd->state.rb_stencil_cntl)); in tu6_draw_common()