50 emu_get_control_reg(struct emu *emu, unsigned n)  in emu_get_control_reg()  argument
52    assert(n < ARRAY_SIZE(emu->control_regs.val));  in emu_get_control_reg()
54       return emu_get_draw_state_reg(emu, n);  in emu_get_control_reg()
55    return emu->control_regs.val[n];  in emu_get_control_reg()
59 emu_set_control_reg(struct emu *emu, unsigned n, uint32_t val)  in emu_set_control_reg()  argument
66    assert(n < ARRAY_SIZE(emu->control_regs.val));  in emu_set_control_reg()
67    BITSET_SET(emu->control_regs.written, n);  in emu_set_control_reg()
68    emu->control_regs.val[n] = val;  in emu_set_control_reg()
72       unsigned write_addr = emu_get_reg32(emu, &PACKET_TABLE_WRITE_ADDR);  in emu_set_control_reg()
74       assert(write_addr < ARRAY_SIZE(emu->jmptbl));  in emu_set_control_reg()
75       emu->jmptbl[write_addr] = val;  in emu_set_control_reg()
77       emu_set_reg32(emu, &PACKET_TABLE_WRITE_ADDR, write_addr + 1);  in emu_set_control_reg()
79       uint32_t write_addr = emu_get_reg32(emu, &REG_WRITE_ADDR);  in emu_set_control_reg()
87       emu_set_gpu_reg(emu, write_addr++, val);  in emu_set_control_reg()
88       emu_set_reg32(emu, &REG_WRITE_ADDR, write_addr | (flags << 16));  in emu_set_control_reg()
90       emu_set_draw_state_reg(emu, n, val);  in emu_set_control_reg()
95 emu_get_pipe_reg(struct emu *emu, unsigned n)  in emu_get_pipe_reg()  argument
97    assert(n < ARRAY_SIZE(emu->pipe_regs.val));  in emu_get_pipe_reg()
98    return emu->pipe_regs.val[n];  in emu_get_pipe_reg()
102 emu_set_pipe_reg(struct emu *emu, unsigned n, uint32_t val)  in emu_set_pipe_reg()  argument
107    assert(n < ARRAY_SIZE(emu->pipe_regs.val));  in emu_set_pipe_reg()
108    BITSET_SET(emu->pipe_regs.written, n);  in emu_set_pipe_reg()
109    emu->pipe_regs.val[n] = val;  in emu_set_pipe_reg()
113       uintptr_t addr = emu_get_reg64(emu, &NRT_ADDR);  in emu_set_pipe_reg()
115       emu_mem_write_dword(emu, addr, val);  in emu_set_pipe_reg()
117       emu_set_reg64(emu, &NRT_ADDR, addr + 4);  in emu_set_pipe_reg()
122 emu_get_gpu_reg(struct emu *emu, unsigned n)  in emu_get_gpu_reg()  argument
124    if (n >= ARRAY_SIZE(emu->gpu_regs.val))  in emu_get_gpu_reg()
126    assert(n < ARRAY_SIZE(emu->gpu_regs.val));  in emu_get_gpu_reg()
127    return emu->gpu_regs.val[n];  in emu_get_gpu_reg()
131 emu_set_gpu_reg(struct emu *emu, unsigned n, uint32_t val)  in emu_set_gpu_reg()  argument
133    if (n >= ARRAY_SIZE(emu->gpu_regs.val))  in emu_set_gpu_reg()
135    assert(n < ARRAY_SIZE(emu->gpu_regs.val));  in emu_set_gpu_reg()
136    BITSET_SET(emu->gpu_regs.written, n);  in emu_set_gpu_reg()
137    emu->gpu_regs.val[n] = val;  in emu_set_gpu_reg()
147 get_reg_addr(struct emu *emu)  in get_reg_addr()  argument
149    switch (emu->data_mode) {  in get_reg_addr()
161 emu_get_fifo_reg(struct emu *emu, unsigned n)  in emu_get_fifo_reg()  argument
173       unsigned  read_dwords = emu_get_reg32(emu, &MEM_READ_DWORDS);  in emu_get_fifo_reg()
174       uintptr_t read_addr   = emu_get_reg64(emu, &MEM_READ_ADDR);  in emu_get_fifo_reg()
177          emu_set_reg32(emu, &MEM_READ_DWORDS, read_dwords - 1);  in emu_get_fifo_reg()
178          emu_set_reg64(emu, &MEM_READ_ADDR,   read_addr + 4);  in emu_get_fifo_reg()
181       return emu_mem_read_dword(emu, read_addr);  in emu_get_fifo_reg()
187       unsigned read_dwords = emu_get_reg32(emu, &REG_READ_DWORDS);  in emu_get_fifo_reg()
188       unsigned read_addr   = emu_get_reg32(emu, &REG_READ_ADDR);  in emu_get_fifo_reg()
195          emu_set_reg32(emu, &REG_READ_DWORDS, read_dwords - 1);  in emu_get_fifo_reg()
196          emu_set_reg32(emu, &REG_READ_ADDR,   read_addr + 1);  in emu_get_fifo_reg()
199       return emu_get_gpu_reg(emu, read_addr);  in emu_get_fifo_reg()
203          uint32_t rem = emu->gpr_regs.val[REG_REM];  in emu_get_fifo_reg()
207          if (emu_queue_pop(&emu->roq, &val)) {  in emu_get_fifo_reg()
208             emu_set_gpr_reg(emu, REG_REM, --rem);  in emu_get_fifo_reg()
214          emu->run_mode = false;  in emu_get_fifo_reg()
215          emu_main_prompt(emu);  in emu_get_fifo_reg()
224 emu_set_fifo_reg(struct emu *emu, unsigned n, uint32_t val)  in emu_set_fifo_reg()  argument
227       emu->data_mode = (n == REG_ADDR) ? DATA_ADDR : DATA_USRADDR;  in emu_set_fifo_reg()
233       emu->gpr_regs.val[n] = val;  in emu_set_fifo_reg()
234       BITSET_SET(emu->gpr_regs.written, n);  in emu_set_fifo_reg()
241             emu_set_pipe_reg(emu, val >> 24, 0);  in emu_set_fifo_reg()
242          emu->data_mode = DATA_PIPE;  in emu_set_fifo_reg()
245       unsigned reg = get_reg_addr(emu);  in emu_set_fifo_reg()
246       unsigned regoff = emu->gpr_regs.val[reg];  in emu_set_fifo_reg()
260             emu->gpr_regs.val[reg] = regoff + 0x01000000;  in emu_set_fifo_reg()
261             BITSET_SET(emu->gpr_regs.written, reg);  in emu_set_fifo_reg()
264          emu_set_pipe_reg(emu, regoff >> 24, val);  in emu_set_fifo_reg()
267          emu_set_gpr_reg(emu, reg, regoff+1);  in emu_set_fifo_reg()
268          emu_set_gpu_reg(emu, regoff, val);  in emu_set_fifo_reg()
274 emu_get_gpr_reg(struct emu *emu, unsigned n)  in emu_get_gpr_reg()  argument
276    assert(n < ARRAY_SIZE(emu->gpr_regs.val));  in emu_get_gpr_reg()
285       return emu_get_fifo_reg(emu, n);  in emu_get_gpr_reg()
287       return emu->gpr_regs.val[n];  in emu_get_gpr_reg()
292 emu_set_gpr_reg(struct emu *emu, unsigned n, uint32_t val)  in emu_set_gpr_reg()  argument
294    assert(n < ARRAY_SIZE(emu->gpr_regs.val));  in emu_set_gpr_reg()
300       emu_set_fifo_reg(emu, n, val);  in emu_set_gpr_reg()
303       emu->gpr_regs.val[n] = val;  in emu_set_gpr_reg()
304       BITSET_SET(emu->gpr_regs.written, n);  in emu_set_gpr_reg()
315    uint32_t (*get)(struct emu *emu, unsigned n);
316    void (*set)(struct emu *emu, unsigned n, uint32_t val);
346 emu_get_reg32(struct emu *emu, struct emu_reg *reg)  in emu_get_reg32()  argument
348    return reg->accessor->get(emu, emu_reg_offset(reg));  in emu_get_reg32()
352 emu_get_reg64(struct emu *emu, struct emu_reg *reg)  in emu_get_reg64()  argument
354    uint64_t val = reg->accessor->get(emu, emu_reg_offset(reg) + 1);  in emu_get_reg64()
356    val |= reg->accessor->get(emu, emu_reg_offset(reg));  in emu_get_reg64()
361 emu_set_reg32(struct emu *emu, struct emu_reg *reg, uint32_t val)  in emu_set_reg32()  argument
363    reg->accessor->set(emu, emu_reg_offset(reg), val);  in emu_set_reg32()
367 emu_set_reg64(struct emu *emu, struct emu_reg *reg, uint64_t val)  in emu_set_reg64()  argument
369    reg->accessor->set(emu, emu_reg_offset(reg),     val);  in emu_set_reg64()
370    reg->accessor->set(emu, emu_reg_offset(reg) + 1, val >> 32);  in emu_set_reg64()