Lines Matching defs:rn
304 arminstr_t rn : 4; /* first operand reg */ member
317 #define ARM_DEF_DPI_IMM_COND(imm8, rot, rd, rn, s, op, cond) \ argument
329 #define ARM_DEF_DPI_IMM(imm8, rot, rd, rn, s, op) \ argument
333 #define ARM_DPIOP_REG_IMM8ROT_COND(p, op, rd, rn, imm8, rot, cond) \ argument
335 #define ARM_DPIOP_S_REG_IMM8ROT_COND(p, op, rd, rn, imm8, rot, cond) \ argument
339 #define ARM_IASM_DPIOP_REG_IMM8ROT_COND(p, op, rd, rn, imm8, rot, cond) \ argument
341 #define ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(p, op, rd, rn, imm8, rot, cond) \ argument
346 #define ARM_DEF_DPI_REG_IMMSHIFT_COND(rm, shift_type, imm_shift, rd, rn, s, op, cond) \ argument
358 #define ARM_DPIOP_REG_IMMSHIFT_COND(p, op, rd, rn, rm, shift_t, imm_shift, cond) \ argument
361 #define ARM_DPIOP_S_REG_IMMSHIFT_COND(p, op, rd, rn, rm, shift_t, imm_shift, cond) \ argument
364 #define ARM_DPIOP_REG_REG_COND(p, op, rd, rn, rm, cond) \ argument
367 #define ARM_DPIOP_S_REG_REG_COND(p, op, rd, rn, rm, cond) \ argument
371 #define ARM_IASM_DPIOP_REG_IMMSHIFT_COND(p, op, rd, rn, rm, shift_t, imm_shift, cond) \ argument
374 #define ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(p, op, rd, rn, rm, shift_t, imm_shift, cond) \ argument
377 #define ARM_IASM_DPIOP_REG_REG_COND(p, op, rd, rn, rm, cond) \ argument
380 #define ARM_IASM_DPIOP_S_REG_REG_COND(p, op, rd, rn, rm, cond) \ argument
385 #define ARM_DEF_DPI_REG_REGSHIFT_COND(rm, shift_type, rs, rd, rn, s, op, cond) \ argument
398 #define ARM_DPIOP_REG_REGSHIFT_COND(p, op, rd, rn, rm, shift_t, rs, cond) \ argument
401 #define ARM_DPIOP_S_REG_REGSHIFT_COND(p, op, rd, rn, rm, shift_t, rs, cond) \ argument
405 #define ARM_IASM_DPIOP_REG_REGSHIFT_COND(p, op, rd, rn, rm, shift_t, rs, cond) \ argument
408 #define ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(p, op, rd, rn, rm, shift_t, rs, cond) \ argument
416 arminstr_t rn : 4; /* base reg */ member
430 #define ARM_DEF_MRT(regs, rn, l, w, s, u, p, cond) \ argument
481 arminstr_t rn : 4; member
490 #define ARM_DEF_MUL_COND(op, rd, rm, rs, rn, s, cond) \ argument
534 #define ARM_MLA_COND(p, rd, rm, rs, rn, cond) \ argument
536 #define ARM_MLA(p, rd, rm, rs, rn) \ argument
538 #define ARM_MLAS_COND(p, rd, rm, rs, rn, cond) \ argument
540 #define ARM_MLAS(p, rd, rm, rs, rn) \ argument
544 #define ARM_IASM_MLA_COND(rd, rm, rs, rn, cond) \ argument
546 #define ARM_IASM_MLA(rd, rm, rs, rn) \ argument
548 #define ARM_IASM_MLAS_COND(rd, rm, rs, rn, cond) \ argument
550 #define ARM_IASM_MLAS(rd, rm, rs, rn) \ argument
561 arminstr_t rn : 4; member
578 #define ARM_DEF_WXFER_IMM(imm12, rd, rn, ls, wb, b, p, cond) \ argument
593 #define ARM_EMIT_WXFER_IMM(ptr, imm12, rd, rn, ls, wb, b, p, cond) \ argument
607 #define ARM_LDR_IMM_POST_COND(p, rd, rn, imm, cond) \ argument
610 #define ARM_LDR_IMM_POST(p, rd, rn, imm) ARM_LDR_IMM_POST_COND(p, rd, rn, imm, ARMCOND_AL) argument
612 #define ARM_LDRB_IMM_POST_COND(p, rd, rn, imm, cond) \ argument
615 #define ARM_LDRB_IMM_POST(p, rd, rn, imm) ARM_LDRB_IMM_POST_COND(p, rd, rn, imm, ARMCOND_AL) argument
618 #define ARM_LDR_IMM_COND(p, rd, rn, imm, cond) \ argument
621 #define ARM_LDR_IMM(p, rd, rn, imm) ARM_LDR_IMM_COND(p, rd, rn, imm, ARMCOND_AL) argument
623 #define ARM_LDRB_IMM_COND(p, rd, rn, imm, cond) \ argument
626 #define ARM_LDRB_IMM(p, rd, rn, imm) ARM_LDRB_IMM_COND(p, rd, rn, imm, ARMCOND_AL) argument
630 #define ARM_STR_IMM_POST_COND(p, rd, rn, imm, cond) \ argument
633 #define ARM_STR_IMM_POST(p, rd, rn, imm) ARM_STR_IMM_POST_COND(p, rd, rn, imm, ARMCOND_AL) argument
635 #define ARM_STRB_IMM_POST_COND(p, rd, rn, imm, cond) \ argument
638 #define ARM_STRB_IMM_POST(p, rd, rn, imm) ARM_STRB_IMM_POST_COND(p, rd, rn, imm, ARMCOND_AL) argument
641 #define ARM_STR_IMM_COND(p, rd, rn, imm, cond) \ argument
645 #define ARM_STR_IMM(p, rd, rn, imm) ARM_STR_IMM_COND(p, rd, rn, imm, ARMCOND_AL) argument
647 #define ARM_STRB_IMM_COND(p, rd, rn, imm, cond) \ argument
650 #define ARM_STRB_IMM(p, rd, rn, imm) ARM_STRB_IMM_COND(p, rd, rn, imm, ARMCOND_AL) argument
653 #define ARM_STR_IMM_WB_COND(p, rd, rn, imm, cond) \ argument
655 #define ARM_STR_IMM_WB(p, rd, rn, imm) ARM_STR_IMM_WB_COND(p, rd, rn, imm, ARMCOND_AL) argument
658 #define ARM_DEF_WXFER_REG_REG_UPDOWN_COND(rm, shift_type, shift, rd, rn, ls, wb, b, u, p, cond) \ argument
673 #define ARM_DEF_WXFER_REG_REG_COND(rm, shift_type, shift, rd, rn, ls, wb, b, p, cond) \ argument
675 #define ARM_DEF_WXFER_REG_MINUS_REG_COND(rm, shift_type, shift, rd, rn, ls, wb, b, p, cond) \ argument
679 #define ARM_LDR_REG_REG_SHIFT_COND(p, rd, rn, rm, shift_type, shift, cond) \ argument
681 #define ARM_LDR_REG_REG_SHIFT(p, rd, rn, rm, shift_type, shift) \ argument
683 #define ARM_LDR_REG_REG(p, rd, rn, rm) \ argument
686 #define ARM_LDRB_REG_REG_SHIFT_COND(p, rd, rn, rm, shift_type, shift, cond) \ argument
688 #define ARM_LDRB_REG_REG_SHIFT(p, rd, rn, rm, shift_type, shift) \ argument
690 #define ARM_LDRB_REG_REG(p, rd, rn, rm) \ argument
693 #define ARM_STR_REG_REG_SHIFT_COND(p, rd, rn, rm, shift_type, shift, cond) \ argument
695 #define ARM_STR_REG_REG_SHIFT(p, rd, rn, rm, shift_type, shift) \ argument
697 #define ARM_STR_REG_REG(p, rd, rn, rm) \ argument
701 #define ARM_STRB_REG_REG_SHIFT_COND(p, rd, rn, rm, shift_type, shift, cond) \ argument
703 #define ARM_STRB_REG_REG_SHIFT(p, rd, rn, rm, shift_type, shift) \ argument
705 #define ARM_STRB_REG_REG(p, rd, rn, rm) \ argument
719 arminstr_t rn : 4; member
735 #define ARM_DEF_HXFER_IMM_COND(imm, h, s, rd, rn, ls, wb, p, cond) \ argument
750 #define ARM_LDRH_IMM_COND(p, rd, rn, imm, cond) \ argument
752 #define ARM_LDRH_IMM(p, rd, rn, imm) \ argument
754 #define ARM_LDRSH_IMM_COND(p, rd, rn, imm, cond) \ argument
756 #define ARM_LDRSH_IMM(p, rd, rn, imm) \ argument
758 #define ARM_LDRSB_IMM_COND(p, rd, rn, imm, cond) \ argument
760 #define ARM_LDRSB_IMM(p, rd, rn, imm) \ argument
764 #define ARM_STRH_IMM_COND(p, rd, rn, imm, cond) \ argument
766 #define ARM_STRH_IMM(p, rd, rn, imm) \ argument
770 #define ARM_DEF_HXFER_REG_REG_UPDOWN_COND(rm, h, s, rd, rn, ls, wb, u, p, cond) \ argument
784 #define ARM_DEF_HXFER_REG_REG_COND(rm, h, s, rd, rn, ls, wb, p, cond) \ argument
786 #define ARM_DEF_HXFER_REG_MINUS_REG_COND(rm, h, s, rd, rn, ls, wb, p, cond) \ argument
789 #define ARM_LDRH_REG_REG_COND(p, rd, rm, rn, cond) \ argument
791 #define ARM_LDRH_REG_REG(p, rd, rm, rn) \ argument
793 #define ARM_LDRSH_REG_REG_COND(p, rd, rm, rn, cond) \ argument
795 #define ARM_LDRSH_REG_REG(p, rd, rm, rn) \ argument
797 #define ARM_LDRSB_REG_REG_COND(p, rd, rm, rn, cond) \ argument
799 #define ARM_LDRSB_REG_REG(p, rd, rm, rn) ARM_LDRSB_REG_REG_COND(p, rd, rm, rn, ARMCOND_AL) argument
801 #define ARM_STRH_REG_REG_COND(p, rd, rm, rn, cond) \ argument
803 #define ARM_STRH_REG_REG(p, rd, rm, rn) \ argument
813 arminstr_t rn : 4; member
864 arminstr_t rn : 4; member
1034 #define ARM_MLS(p, rd, rn, rm, ra) ARM_EMIT((p), (ARMCOND_AL << 28) | (0x6 << 20) | ((rd) << 16) | … argument
1104 #define ARM_SDIV_COND(p, rd, rn, rm, cond) ARM_EMIT (p, (((cond) << 28) | (0xe << 23) | (0x1 << 20)… argument
1105 #define ARM_SDIV(p, rd, rn, rm) ARM_SDIV_COND ((p), (rd), (rn), (rm), ARMCOND_AL) argument
1107 #define ARM_UDIV_COND(p, rd, rn, rm, cond) ARM_EMIT (p, (((cond) << 28) | (0xe << 23) | (0x3 << 20)… argument
1108 #define ARM_UDIV(p, rd, rn, rm) ARM_UDIV_COND ((p), (rd), (rn), (rm), ARMCOND_AL) argument
1118 #define ARM_LDREX_REG(p, rt, rn) ARM_EMIT ((p), ((ARMCOND_AL << 28) | (0xc << 21) | (0x1 << 20) | (… argument
1120 #define ARM_STREX_REG(p, rd, rt, rn) ARM_EMIT ((p), ((ARMCOND_AL << 28) | (0xc << 21) | (0x0 << 20)… argument