Lines Matching refs:TempRegister

336     __ Add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1));       \
339 __ load_linked(i.OutputRegister(0), MemOperand(i.TempRegister(0), 0)); \
340 __ bin_instr(i.TempRegister(1), i.OutputRegister(0), \
342 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
343 __ BranchShort(&binop, eq, i.TempRegister(1), Operand(zero_reg)); \
352 __ add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
354 __ andi(i.TempRegister(3), i.TempRegister(0), 0x3); \
357 __ andi(i.TempRegister(3), i.TempRegister(0), 0x7); \
359 __ Sub_d(i.TempRegister(0), i.TempRegister(0), \
360 Operand(i.TempRegister(3))); \
361 __ slli_w(i.TempRegister(3), i.TempRegister(3), 3); \
364 __ load_linked(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
365 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
367 __ bin_instr(i.TempRegister(2), i.OutputRegister(0), \
369 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
371 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
372 __ BranchShort(&binop, eq, i.TempRegister(1), Operand(zero_reg)); \
381 __ add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
383 __ andi(i.TempRegister(1), i.TempRegister(0), 0x3); \
386 __ andi(i.TempRegister(1), i.TempRegister(0), 0x7); \
388 __ Sub_d(i.TempRegister(0), i.TempRegister(0), \
389 Operand(i.TempRegister(1))); \
390 __ slli_w(i.TempRegister(1), i.TempRegister(1), 3); \
393 __ load_linked(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
394 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
396 __ InsertBits(i.TempRegister(2), i.InputRegister(2), i.TempRegister(1), \
398 __ store_conditional(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
399 __ BranchShort(&exchange, eq, i.TempRegister(2), Operand(zero_reg)); \
409 __ add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
412 __ load_linked(i.OutputRegister(0), MemOperand(i.TempRegister(0), 0)); \
415 __ mov(i.TempRegister(2), i.InputRegister(3)); \
416 __ store_conditional(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
417 __ BranchShort(&compareExchange, eq, i.TempRegister(2), \
429 __ add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
431 __ andi(i.TempRegister(1), i.TempRegister(0), 0x3); \
434 __ andi(i.TempRegister(1), i.TempRegister(0), 0x7); \
436 __ Sub_d(i.TempRegister(0), i.TempRegister(0), \
437 Operand(i.TempRegister(1))); \
438 __ slli_w(i.TempRegister(1), i.TempRegister(1), 3); \
441 __ load_linked(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
442 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
448 __ InsertBits(i.TempRegister(2), i.InputRegister(3), i.TempRegister(1), \
450 __ store_conditional(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
451 __ BranchShort(&compareExchange, eq, i.TempRegister(2), \
785 lhs_register = i.TempRegister(1); in AssembleArchInstruction()
788 __ Sltu(i.TempRegister(0), i.InputRegister(0), lhs_register); in AssembleArchInstruction()
1650 __ add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1652 i.TempRegister(0)); in AssembleArchInstruction()
1660 __ add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1662 i.TempRegister(0)); in AssembleArchInstruction()
1714 __ Add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1716 i.TempRegister(0)); in AssembleArchInstruction()
1736 __ Add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1738 i.TempRegister(0)); in AssembleArchInstruction()
1748 __ Add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1750 i.TempRegister(0)); in AssembleArchInstruction()
1760 __ Add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1762 i.TempRegister(0)); in AssembleArchInstruction()
1806 __ Add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1807 __ amadd_db_d(i.OutputRegister(0), i.InputRegister(2), i.TempRegister(0)); in AssembleArchInstruction()
1813 __ Add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1814 __ amand_db_d(i.OutputRegister(0), i.InputRegister(2), i.TempRegister(0)); in AssembleArchInstruction()
1817 __ Add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1818 __ amor_db_d(i.OutputRegister(0), i.InputRegister(2), i.TempRegister(0)); in AssembleArchInstruction()
1821 __ Add_d(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1822 __ amxor_db_d(i.OutputRegister(0), i.InputRegister(2), i.TempRegister(0)); in AssembleArchInstruction()
1903 __ xori(i.TempRegister(0), i.TempRegister(0), 1); in AssembleBranchToLabels()
1905 __ Branch(tlabel, ne, i.TempRegister(0), Operand(zero_reg)); in AssembleBranchToLabels()
2140 __ xori(i.OutputRegister(), i.TempRegister(0), 1); in AssembleArchBoolean()