drivers/clk/clk-stm32mp1.c

1242 #define _DIV(_div_offset, _div_shift, _div_width, _div_flags, _div_table)\  macro
1695 		  _DIV(RCC_PLL1CFGR2, 0, 7, 0, NULL)),
1700 		  _DIV(RCC_PLL2CFGR2, 0, 7, 0, NULL)),
1705 		  _DIV(RCC_PLL2CFGR2, 8, 7, 0, NULL)),
1710 		  _DIV(RCC_PLL2CFGR2, 16, 7, 0, NULL)),
1715 		  _DIV(RCC_PLL3CFGR2, 0, 7, 0, NULL)),
1720 		  _DIV(RCC_PLL3CFGR2, 8, 7, 0, NULL)),
1725 		  _DIV(RCC_PLL3CFGR2, 16, 7, 0, NULL)),
1730 		  _DIV(RCC_PLL4CFGR2, 0, 7, 0, NULL)),
1735 		  _DIV(RCC_PLL4CFGR2, 8, 7, 0, NULL)),
1740 		  _DIV(RCC_PLL4CFGR2, 16, 7, 0, NULL)),
1753 		   _DIV(RCC_AXIDIVR, 0, 3, 0, axi_div_table)),
1759 		   _DIV(RCC_MCUDIVR, 0, 4, 0, mcu_div_table)),
1965 		  _DIV(RCC_ETHCKSELR, 4, 4, 0, NULL)),
1981 		  _DIV(RCC_MCO1CFGR, 4, 4, 0, NULL)),
1987 		  _DIV(RCC_MCO2CFGR, 4, 4, 0, NULL)),
1996 		  _DIV(RCC_DBGCFGR, 0, 3, 0, ck_trace_div_table)),