pm/inc/smu_v11_0.h

158 int smu_v11_0_init_microcode(struct smu_context *smu);
160 void smu_v11_0_fini_microcode(struct smu_context *smu);
162 int smu_v11_0_load_microcode(struct smu_context *smu);
164 int smu_v11_0_init_smc_tables(struct smu_context *smu);
166 int smu_v11_0_fini_smc_tables(struct smu_context *smu);
168 int smu_v11_0_init_power(struct smu_context *smu);
170 int smu_v11_0_fini_power(struct smu_context *smu);
172 int smu_v11_0_check_fw_status(struct smu_context *smu);
174 int smu_v11_0_setup_pptable(struct smu_context *smu);
176 int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu);
178 int smu_v11_0_check_fw_version(struct smu_context *smu);
180 int smu_v11_0_set_driver_table_location(struct smu_context *smu);
182 int smu_v11_0_set_tool_table_location(struct smu_context *smu);
184 int smu_v11_0_notify_memory_pool_location(struct smu_context *smu);
186 int smu_v11_0_system_features_control(struct smu_context *smu,
189 int smu_v11_0_init_display_count(struct smu_context *smu, uint32_t count);
191 int smu_v11_0_set_allowed_mask(struct smu_context *smu);
193 int smu_v11_0_notify_display_change(struct smu_context *smu);
195 int smu_v11_0_get_current_power_limit(struct smu_context *smu,
198 int smu_v11_0_set_power_limit(struct smu_context *smu, uint32_t n);
200 int smu_v11_0_init_max_sustainable_clocks(struct smu_context *smu);
202 int smu_v11_0_enable_thermal_alert(struct smu_context *smu);
204 int smu_v11_0_disable_thermal_alert(struct smu_context *smu);
206 int smu_v11_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value);
208 int smu_v11_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk);
211 smu_v11_0_display_clock_voltage_request(struct smu_context *smu,
216 smu_v11_0_get_fan_control_mode(struct smu_context *smu);
219 smu_v11_0_set_fan_control_mode(struct smu_context *smu,
222 int smu_v11_0_set_fan_speed_percent(struct smu_context *smu,
225 int smu_v11_0_set_xgmi_pstate(struct smu_context *smu,
228 int smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable);
230 int smu_v11_0_register_irq_handler(struct smu_context *smu);
232 int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu);
234 int smu_v11_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
237 bool smu_v11_0_baco_is_support(struct smu_context *smu);
239 enum smu_baco_state smu_v11_0_baco_get_state(struct smu_context *smu);
241 int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state);
243 int smu_v11_0_baco_enter(struct smu_context *smu);
244 int smu_v11_0_baco_exit(struct smu_context *smu);
246 int smu_v11_0_mode1_reset(struct smu_context *smu);
248 int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type,
251 int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,
254 int smu_v11_0_set_hard_freq_limited_range(struct smu_context *smu,
259 int smu_v11_0_set_performance_level(struct smu_context *smu,
262 int smu_v11_0_set_power_source(struct smu_context *smu,
265 int smu_v11_0_get_dpm_freq_by_index(struct smu_context *smu,
270 int smu_v11_0_get_dpm_level_count(struct smu_context *smu,
274 int smu_v11_0_set_single_dpm_table(struct smu_context *smu,
278 int smu_v11_0_get_dpm_level_range(struct smu_context *smu,
283 int smu_v11_0_get_current_pcie_link_width_level(struct smu_context *smu);
285 uint16_t smu_v11_0_get_current_pcie_link_width(struct smu_context *smu);
287 int smu_v11_0_get_current_pcie_link_speed_level(struct smu_context *smu);
289 uint16_t smu_v11_0_get_current_pcie_link_speed(struct smu_context *smu);
291 int smu_v11_0_gfx_ulv_control(struct smu_context *smu,
294 int smu_v11_0_deep_sleep_control(struct smu_context *smu,
297 void smu_v11_0_interrupt_work(struct smu_context *smu);
299 int smu_v11_0_set_light_sbr(struct smu_context *smu, bool enable);