Lines Matching defs:dpu_hw_scaler3_cfg
102 struct dpu_hw_scaler3_cfg { struct
103 u32 enable;
104 u32 dir_en;
105 int32_t init_phase_x[DPU_MAX_PLANES];
106 int32_t phase_step_x[DPU_MAX_PLANES];
107 int32_t init_phase_y[DPU_MAX_PLANES];
108 int32_t phase_step_y[DPU_MAX_PLANES];
110 u32 preload_x[DPU_MAX_PLANES];
111 u32 preload_y[DPU_MAX_PLANES];
112 u32 src_width[DPU_MAX_PLANES];
113 u32 src_height[DPU_MAX_PLANES];
115 u32 dst_width;
116 u32 dst_height;
118 u32 y_rgb_filter_cfg;
119 u32 uv_filter_cfg;
120 u32 alpha_filter_cfg;
121 u32 blend_cfg;
123 u32 lut_flag;
124 u32 dir_lut_idx;
126 u32 y_rgb_cir_lut_idx;
127 u32 uv_cir_lut_idx;
128 u32 y_rgb_sep_lut_idx;
129 u32 uv_sep_lut_idx;
130 u32 *dir_lut;
131 size_t dir_len;
132 u32 *cir_lut;
133 size_t cir_len;
134 u32 *sep_lut;
135 size_t sep_len;
140 struct dpu_hw_scaler3_de_cfg de;
142 u32 dir_weight;