464 	u32 pb_addr, mask;  in gaudi_init_mme_protection_bits()  local
490 	mask = 1U << ((mmMME0_CTRL_RESET & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
491 	mask |= 1U << ((mmMME0_CTRL_QM_STALL & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
492 	mask |= 1U << ((mmMME0_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
493 	mask |= 1U << ((mmMME0_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
494 	mask |= 1U << ((mmMME0_CTRL_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
495 	mask |= 1U << ((mmMME0_CTRL_INTR_MASK & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
496 	mask |= 1U << ((mmMME0_CTRL_LOG_SHADOW & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
497 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_DESC0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
498 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
499 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
500 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_MIN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
501 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
502 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
503 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
504 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
505 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
506 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
507 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
508 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
509 	mask |= 1U << ((mmMME0_CTRL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
510 	mask |= 1U << ((mmMME0_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
511 	mask |= 1U << ((mmMME0_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
512 	mask |= 1U << ((mmMME0_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
513 	mask |= 1U << ((mmMME0_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
514 	mask |= 1U << ((mmMME0_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
515 	mask |= 1U << ((mmMME0_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
516 	mask |= 1U << ((mmMME0_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
517 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
518 	mask |= 1U << ((mmMME0_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
519 	mask |= 1U << ((mmMME0_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
521 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
526 	mask = 1U << ((mmMME0_CTRL_SHADOW_0_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
528 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
532 	mask = 1U << ((mmMME0_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
533 	mask |= 1U << ((mmMME0_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
534 	mask |= 1U << ((mmMME0_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
535 	mask |= 1U << ((mmMME0_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
536 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
537 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
538 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
539 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
540 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
541 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
542 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
543 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
544 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
545 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
546 	mask |= 1U << ((mmMME0_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
547 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
548 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
549 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
550 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
551 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
552 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
553 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
554 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
555 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
556 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
557 	mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
558 	mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
559 	mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
560 	mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
562 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
566 	mask = 1U << ((mmMME0_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
567 	mask |= 1U << ((mmMME0_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
568 	mask |= 1U << ((mmMME0_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
569 	mask |= 1U << ((mmMME0_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
570 	mask |= 1U << ((mmMME0_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
571 	mask |= 1U << ((mmMME0_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
572 	mask |= 1U << ((mmMME0_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
573 	mask |= 1U << ((mmMME0_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
574 	mask |= 1U << ((mmMME0_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
575 	mask |= 1U << ((mmMME0_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
576 	mask |= 1U << ((mmMME0_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
577 	mask |= 1U << ((mmMME0_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
578 	mask |= 1U << ((mmMME0_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
579 	mask |= 1U << ((mmMME0_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
580 	mask |= 1U << ((mmMME0_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
581 	mask |= 1U << ((mmMME0_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
582 	mask |= 1U << ((mmMME0_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
583 	mask |= 1U << ((mmMME0_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
584 	mask |= 1U << ((mmMME0_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
585 	mask |= 1U << ((mmMME0_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
586 	mask |= 1U << ((mmMME0_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
587 	mask |= 1U << ((mmMME0_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
588 	mask |= 1U << ((mmMME0_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
589 	mask |= 1U << ((mmMME0_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
590 	mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
591 	mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
592 	mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
593 	mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
594 	mask |= 1U << ((mmMME0_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
595 	mask |= 1U << ((mmMME0_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
596 	mask |= 1U << ((mmMME0_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
597 	mask |= 1U << ((mmMME0_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
599 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
603 	mask = 1U << ((mmMME0_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
604 	mask |= 1U << ((mmMME0_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
605 	mask |= 1U << ((mmMME0_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
606 	mask |= 1U << ((mmMME0_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
607 	mask |= 1U << ((mmMME0_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
608 	mask |= 1U << ((mmMME0_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
609 	mask |= 1U << ((mmMME0_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
610 	mask |= 1U << ((mmMME0_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
611 	mask |= 1U << ((mmMME0_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
612 	mask |= 1U << ((mmMME0_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
613 	mask |= 1U << ((mmMME0_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
614 	mask |= 1U << ((mmMME0_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
615 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
616 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
617 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
619 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
623 	mask = 1U << ((mmMME0_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
624 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
625 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
626 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
627 	mask |= 1U << ((mmMME0_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
628 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
629 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
630 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
631 	mask |= 1U << ((mmMME0_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
632 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
633 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
634 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
635 	mask |= 1U << ((mmMME0_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
636 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
637 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
638 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
639 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
640 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
641 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
642 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
643 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
644 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
645 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
646 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
647 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
648 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
649 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
650 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
652 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
656 	mask = 1U << ((mmMME0_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
657 	mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
658 	mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
659 	mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
660 	mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
661 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
662 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
663 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
664 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
665 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
666 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
667 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
668 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
669 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
670 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
671 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
672 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
673 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
674 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
675 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
676 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
677 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
678 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
679 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
680 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
681 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
682 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
683 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
684 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
685 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
686 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
687 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
689 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
694 	mask = 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
695 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
696 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
697 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
698 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
699 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
700 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
701 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
702 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
703 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
704 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
705 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
706 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
707 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
708 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
709 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
710 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
711 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
712 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
713 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
714 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
715 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
716 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
717 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
718 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
719 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
720 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
721 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
722 	mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
723 	mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
724 	mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
726 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
732 	mask = 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
733 	mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
735 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
739 	mask = 1U << ((mmMME0_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
740 	mask |= 1U << ((mmMME0_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
741 	mask |= 1U << ((mmMME0_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
742 	mask |= 1U << ((mmMME0_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
743 	mask |= 1U << ((mmMME0_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
744 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
745 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
746 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
747 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
748 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
749 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
750 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
751 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
752 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
753 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
754 	mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
755 	mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
756 	mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
758 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
762 	mask = 1U << ((mmMME0_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
763 	mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
764 	mask |= 1U << ((mmMME0_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
765 	mask |= 1U << ((mmMME0_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
767 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
771 	mask = 1U << ((mmMME0_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
772 	mask |= 1U << ((mmMME0_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
773 	mask |= 1U << ((mmMME0_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
774 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
775 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
776 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
777 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
778 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
779 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
780 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
781 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
782 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
783 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
785 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
789 	mask = 1U << ((mmMME0_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
790 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
791 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
792 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
793 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
794 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
795 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
796 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
797 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
798 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
799 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
800 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
801 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
802 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
803 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
804 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
805 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
806 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
807 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
808 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
809 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
810 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
811 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
812 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
813 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
815 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
820 	mask = 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
821 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
822 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
823 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
824 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
825 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
826 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
827 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
828 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
834 	mask = 1U << ((mmMME0_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
835 	mask |= 1U << ((mmMME0_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
836 	mask |= 1U << ((mmMME0_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
837 	mask |= 1U << ((mmMME0_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
838 	mask |= 1U << ((mmMME0_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
840 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
844 	mask = 1U << ((mmMME0_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
845 	mask |= 1U << ((mmMME0_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
846 	mask |= 1U << ((mmMME0_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
847 	mask |= 1U << ((mmMME0_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
848 	mask |= 1U << ((mmMME0_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
849 	mask |= 1U << ((mmMME0_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
850 	mask |= 1U << ((mmMME0_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
851 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
852 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
853 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
854 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
855 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
856 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
857 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
858 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
859 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
860 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
861 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
862 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
863 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
864 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
865 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
866 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
867 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
868 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
869 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
870 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
872 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
877 	mask = 1U << ((mmMME0_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
878 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
879 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
880 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
881 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
882 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
883 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
884 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
885 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
886 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
887 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
888 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
889 	mask |= 1U << ((mmMME0_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
890 	mask |= 1U << ((mmMME0_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
891 	mask |= 1U << ((mmMME0_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
893 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
897 	mask = 1U << ((mmMME0_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
898 	mask |= 1U << ((mmMME0_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
899 	mask |= 1U << ((mmMME0_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
900 	mask |= 1U << ((mmMME0_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
901 	mask |= 1U << ((mmMME0_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
902 	mask |= 1U << ((mmMME0_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
903 	mask |= 1U << ((mmMME0_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
904 	mask |= 1U << ((mmMME0_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
905 	mask |= 1U << ((mmMME0_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
906 	mask |= 1U << ((mmMME0_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
907 	mask |= 1U << ((mmMME0_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
908 	mask |= 1U << ((mmMME0_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
909 	mask |= 1U << ((mmMME0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
910 	mask |= 1U << ((mmMME0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
911 	mask |= 1U << ((mmMME0_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
913 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
918 	mask = 1U << ((mmMME0_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
920 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
924 	mask = 1U << ((mmMME1_CTRL_RESET & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
925 	mask |= 1U << ((mmMME1_CTRL_QM_STALL & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
926 	mask |= 1U << ((mmMME1_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
927 	mask |= 1U << ((mmMME1_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
928 	mask |= 1U << ((mmMME1_CTRL_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
929 	mask |= 1U << ((mmMME1_CTRL_INTR_MASK & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
930 	mask |= 1U << ((mmMME1_CTRL_LOG_SHADOW & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
931 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_DESC0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
932 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
933 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
934 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_MIN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
935 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
936 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
937 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
938 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
939 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
940 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
941 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
942 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
943 	mask |= 1U << ((mmMME1_CTRL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
944 	mask |= 1U << ((mmMME1_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
945 	mask |= 1U << ((mmMME1_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
946 	mask |= 1U << ((mmMME1_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
947 	mask |= 1U << ((mmMME1_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
948 	mask |= 1U << ((mmMME1_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
949 	mask |= 1U << ((mmMME1_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
950 	mask |= 1U << ((mmMME1_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
951 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
952 	mask |= 1U << ((mmMME1_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
953 	mask |= 1U << ((mmMME1_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
955 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
960 	mask = 1U << ((mmMME1_CTRL_SHADOW_0_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
962 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
968 	mask = 1U << ((mmMME2_CTRL_RESET & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
969 	mask |= 1U << ((mmMME2_CTRL_QM_STALL & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
970 	mask |= 1U << ((mmMME2_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
971 	mask |= 1U << ((mmMME2_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
972 	mask |= 1U << ((mmMME2_CTRL_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
973 	mask |= 1U << ((mmMME2_CTRL_INTR_MASK & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
974 	mask |= 1U << ((mmMME2_CTRL_LOG_SHADOW & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
975 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_DESC0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
976 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
977 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
978 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_MIN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
979 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
980 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
981 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
982 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
983 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
984 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
985 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
986 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
987 	mask |= 1U << ((mmMME2_CTRL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
988 	mask |= 1U << ((mmMME2_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
989 	mask |= 1U << ((mmMME2_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
990 	mask |= 1U << ((mmMME2_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
991 	mask |= 1U << ((mmMME2_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
992 	mask |= 1U << ((mmMME2_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
993 	mask |= 1U << ((mmMME2_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
994 	mask |= 1U << ((mmMME2_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
995 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
996 	mask |= 1U << ((mmMME2_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
997 	mask |= 1U << ((mmMME2_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
999 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1004 	mask = 1U << ((mmMME2_CTRL_SHADOW_0_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1006 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1010 	mask = 1U << ((mmMME2_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1011 	mask |= 1U << ((mmMME2_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1012 	mask |= 1U << ((mmMME2_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1013 	mask |= 1U << ((mmMME2_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1014 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1015 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1016 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1017 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1018 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1019 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1020 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1021 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1022 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1023 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1024 	mask |= 1U << ((mmMME2_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1025 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1026 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1027 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1028 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1029 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1030 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1031 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1032 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1033 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1034 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1035 	mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1036 	mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1037 	mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1038 	mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1040 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1044 	mask = 1U << ((mmMME2_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1045 	mask |= 1U << ((mmMME2_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1046 	mask |= 1U << ((mmMME2_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1047 	mask |= 1U << ((mmMME2_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1048 	mask |= 1U << ((mmMME2_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1049 	mask |= 1U << ((mmMME2_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1050 	mask |= 1U << ((mmMME2_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1051 	mask |= 1U << ((mmMME2_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1052 	mask |= 1U << ((mmMME2_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1053 	mask |= 1U << ((mmMME2_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1054 	mask |= 1U << ((mmMME2_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1055 	mask |= 1U << ((mmMME2_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1056 	mask |= 1U << ((mmMME2_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1057 	mask |= 1U << ((mmMME2_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1058 	mask |= 1U << ((mmMME2_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1059 	mask |= 1U << ((mmMME2_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1060 	mask |= 1U << ((mmMME2_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1061 	mask |= 1U << ((mmMME2_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1062 	mask |= 1U << ((mmMME2_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1063 	mask |= 1U << ((mmMME2_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1064 	mask |= 1U << ((mmMME2_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1065 	mask |= 1U << ((mmMME2_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1066 	mask |= 1U << ((mmMME2_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1067 	mask |= 1U << ((mmMME2_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1068 	mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1069 	mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1070 	mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1071 	mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1072 	mask |= 1U << ((mmMME2_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1073 	mask |= 1U << ((mmMME2_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1074 	mask |= 1U << ((mmMME2_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1075 	mask |= 1U << ((mmMME2_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1077 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1081 	mask = 1U << ((mmMME2_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1082 	mask |= 1U << ((mmMME2_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1083 	mask |= 1U << ((mmMME2_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1084 	mask |= 1U << ((mmMME2_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1085 	mask |= 1U << ((mmMME2_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1086 	mask |= 1U << ((mmMME2_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1087 	mask |= 1U << ((mmMME2_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1088 	mask |= 1U << ((mmMME2_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1089 	mask |= 1U << ((mmMME2_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1090 	mask |= 1U << ((mmMME2_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1091 	mask |= 1U << ((mmMME2_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1092 	mask |= 1U << ((mmMME2_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1093 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1094 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1095 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1097 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1101 	mask = 1U << ((mmMME2_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1102 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1103 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1104 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1105 	mask |= 1U << ((mmMME2_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1106 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1107 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1108 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1109 	mask |= 1U << ((mmMME2_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1110 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1111 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1112 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1113 	mask |= 1U << ((mmMME2_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1114 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1115 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1116 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1117 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1118 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1119 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1120 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1121 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1122 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1123 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1124 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1125 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1126 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1127 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1128 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1130 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1134 	mask = 1U << ((mmMME2_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1135 	mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1136 	mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1137 	mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1138 	mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1139 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1140 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1141 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1142 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1143 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1144 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1145 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1146 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1147 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1148 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1149 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1150 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1151 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1152 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1153 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1154 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1155 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1156 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1157 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1158 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1159 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1160 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1161 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1162 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1163 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1164 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1165 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1167 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1172 	mask = 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1173 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1174 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1175 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1176 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1177 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1178 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1179 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1180 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1181 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1182 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1183 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1184 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1185 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1186 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1187 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1188 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1189 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1190 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1191 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1192 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1193 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1194 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1195 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1196 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1197 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1198 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1199 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1200 	mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1201 	mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1202 	mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1204 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1210 	mask = 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1211 	mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1213 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1217 	mask = 1U << ((mmMME2_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1218 	mask |= 1U << ((mmMME2_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1219 	mask |= 1U << ((mmMME2_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1220 	mask |= 1U << ((mmMME2_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1221 	mask |= 1U << ((mmMME2_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1222 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1223 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1224 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1225 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1226 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1227 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1228 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1229 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1230 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1231 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1232 	mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1233 	mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1234 	mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1236 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1240 	mask = 1U << ((mmMME2_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1241 	mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1242 	mask |= 1U << ((mmMME2_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1243 	mask |= 1U << ((mmMME2_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1245 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1249 	mask = 1U << ((mmMME2_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1250 	mask |= 1U << ((mmMME2_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1251 	mask |= 1U << ((mmMME2_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1252 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1253 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1254 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1255 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1256 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1257 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1258 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1259 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1260 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1261 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1263 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1267 	mask = 1U << ((mmMME2_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1268 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1269 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1270 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1271 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1272 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1273 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1274 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1275 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1276 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1277 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1278 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1279 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1280 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1281 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1282 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1283 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1284 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1285 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1286 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1287 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1288 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1289 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1290 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1291 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1293 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1298 	mask = 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1299 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1300 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1301 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1302 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1303 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1304 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1305 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1307 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1313 	mask = 1U << ((mmMME2_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1314 	mask |= 1U << ((mmMME2_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1315 	mask |= 1U << ((mmMME2_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1316 	mask |= 1U << ((mmMME2_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1317 	mask |= 1U << ((mmMME2_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1319 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1323 	mask = 1U << ((mmMME2_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1324 	mask |= 1U << ((mmMME2_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1325 	mask |= 1U << ((mmMME2_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1326 	mask |= 1U << ((mmMME2_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1327 	mask |= 1U << ((mmMME2_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1328 	mask |= 1U << ((mmMME2_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1329 	mask |= 1U << ((mmMME2_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1330 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1331 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1332 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1333 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1334 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1335 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1336 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1337 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1338 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1339 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1340 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1341 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1342 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1343 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1344 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1345 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1346 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1347 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1348 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1349 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1351 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1356 	mask = 1U << ((mmMME2_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1357 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1358 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1359 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1360 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1361 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1362 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1363 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1364 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1365 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1366 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1367 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1368 	mask |= 1U << ((mmMME2_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1369 	mask |= 1U << ((mmMME2_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1370 	mask |= 1U << ((mmMME2_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1372 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1376 	mask = 1U << ((mmMME2_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1377 	mask |= 1U << ((mmMME2_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1378 	mask |= 1U << ((mmMME2_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1379 	mask |= 1U << ((mmMME2_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1380 	mask |= 1U << ((mmMME2_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1381 	mask |= 1U << ((mmMME2_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1382 	mask |= 1U << ((mmMME2_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1383 	mask |= 1U << ((mmMME2_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1384 	mask |= 1U << ((mmMME2_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1385 	mask |= 1U << ((mmMME2_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1386 	mask |= 1U << ((mmMME2_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1387 	mask |= 1U << ((mmMME2_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1388 	mask |= 1U << ((mmMME2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1389 	mask |= 1U << ((mmMME2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1390 	mask |= 1U << ((mmMME2_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1392 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1397 	mask = 1U << ((mmMME2_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1399 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1403 	mask = 1U << ((mmMME3_CTRL_RESET & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1404 	mask |= 1U << ((mmMME3_CTRL_QM_STALL & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1405 	mask |= 1U << ((mmMME3_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1406 	mask |= 1U << ((mmMME3_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1407 	mask |= 1U << ((mmMME3_CTRL_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1408 	mask |= 1U << ((mmMME3_CTRL_INTR_MASK & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1409 	mask |= 1U << ((mmMME3_CTRL_LOG_SHADOW & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1410 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_DESC0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1411 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1412 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1413 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_MIN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1414 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1415 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1416 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1417 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1418 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1419 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1420 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1421 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1422 	mask |= 1U << ((mmMME3_CTRL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1423 	mask |= 1U << ((mmMME3_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1424 	mask |= 1U << ((mmMME3_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1425 	mask |= 1U << ((mmMME3_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1426 	mask |= 1U << ((mmMME3_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1427 	mask |= 1U << ((mmMME3_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1428 	mask |= 1U << ((mmMME3_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1429 	mask |= 1U << ((mmMME3_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1430 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1431 	mask |= 1U << ((mmMME3_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1432 	mask |= 1U << ((mmMME3_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1434 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1439 	mask = 1U << ((mmMME3_CTRL_SHADOW_0_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1441 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1448 	u32 pb_addr, mask;  in gaudi_init_dma_protection_bits()  local
1489 	mask = 1U << ((mmDMA0_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1490 	mask |= 1U << ((mmDMA0_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1491 	mask |= 1U << ((mmDMA0_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1492 	mask |= 1U << ((mmDMA0_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1493 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1494 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1495 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1496 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1497 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1498 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1499 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1500 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1501 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1502 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1503 	mask |= 1U << ((mmDMA0_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1504 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1505 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1506 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1507 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1508 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1509 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1510 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1511 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1512 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1513 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1514 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1515 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1516 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1517 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1519 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1523 	mask = 1U << ((mmDMA0_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1524 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1525 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1526 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1527 	mask |= 1U << ((mmDMA0_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1528 	mask |= 1U << ((mmDMA0_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1529 	mask |= 1U << ((mmDMA0_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1530 	mask |= 1U << ((mmDMA0_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1531 	mask |= 1U << ((mmDMA0_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1532 	mask |= 1U << ((mmDMA0_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1533 	mask |= 1U << ((mmDMA0_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1534 	mask |= 1U << ((mmDMA0_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1535 	mask |= 1U << ((mmDMA0_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1536 	mask |= 1U << ((mmDMA0_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1537 	mask |= 1U << ((mmDMA0_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1538 	mask |= 1U << ((mmDMA0_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1539 	mask |= 1U << ((mmDMA0_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1540 	mask |= 1U << ((mmDMA0_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1541 	mask |= 1U << ((mmDMA0_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1542 	mask |= 1U << ((mmDMA0_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1543 	mask |= 1U << ((mmDMA0_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1544 	mask |= 1U << ((mmDMA0_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1545 	mask |= 1U << ((mmDMA0_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1546 	mask |= 1U << ((mmDMA0_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1547 	mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1548 	mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1549 	mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1550 	mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1551 	mask |= 1U << ((mmDMA0_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1552 	mask |= 1U << ((mmDMA0_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1553 	mask |= 1U << ((mmDMA0_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1554 	mask |= 1U << ((mmDMA0_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1556 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1560 	mask = 1U << ((mmDMA0_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1561 	mask |= 1U << ((mmDMA0_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1562 	mask |= 1U << ((mmDMA0_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1563 	mask |= 1U << ((mmDMA0_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1564 	mask |= 1U << ((mmDMA0_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1565 	mask |= 1U << ((mmDMA0_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1566 	mask |= 1U << ((mmDMA0_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1567 	mask |= 1U << ((mmDMA0_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1568 	mask |= 1U << ((mmDMA0_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1569 	mask |= 1U << ((mmDMA0_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1570 	mask |= 1U << ((mmDMA0_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1571 	mask |= 1U << ((mmDMA0_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1572 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1573 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1574 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1576 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1580 	mask = 1U << ((mmDMA0_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1581 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1582 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1583 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1584 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1585 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1586 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1587 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1588 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1589 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1590 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1591 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1592 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1593 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1594 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1595 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1596 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1597 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1598 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1599 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1600 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1601 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1602 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1603 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1604 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1605 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1606 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1607 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1609 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1613 	mask = 1U << ((mmDMA0_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1614 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1615 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1616 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1617 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1618 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1619 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1620 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1621 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1622 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1623 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1624 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1625 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1626 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1627 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1628 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1629 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1630 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1631 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1632 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1633 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1634 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1635 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1636 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1637 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1638 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1639 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1640 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1641 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1642 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1643 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1644 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1646 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1651 	mask = 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1652 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1653 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1654 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1655 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1656 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1657 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1658 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1659 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1660 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1661 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1662 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1663 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1664 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1665 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1666 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1667 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1668 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1669 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1670 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1671 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1672 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1673 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1674 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1675 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1676 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1677 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1678 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1679 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1680 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1681 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1683 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1690 	mask = 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1691 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1693 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1697 	mask = 1U << ((mmDMA0_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1698 	mask |= 1U << ((mmDMA0_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1699 	mask |= 1U << ((mmDMA0_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1700 	mask |= 1U << ((mmDMA0_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1701 	mask |= 1U << ((mmDMA0_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1702 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1703 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1704 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1705 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1706 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1707 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1708 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1709 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1710 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1711 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1712 	mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1713 	mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1714 	mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1716 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1720 	mask = 1U << ((mmDMA0_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1721 	mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1722 	mask |= 1U << ((mmDMA0_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1723 	mask |= 1U << ((mmDMA0_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1725 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1729 	mask = 1U << ((mmDMA0_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1730 	mask |= 1U << ((mmDMA0_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1731 	mask |= 1U << ((mmDMA0_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1732 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1733 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1734 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1735 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1736 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1737 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1738 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1739 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1740 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1741 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1743 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1747 	mask = 1U << ((mmDMA0_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1748 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1749 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1750 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1751 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1752 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1753 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1754 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1755 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1756 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1757 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1758 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1759 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1760 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1761 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1762 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1763 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1764 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1765 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1766 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1767 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1768 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1769 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1770 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1771 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1773 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1778 	mask = 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1779 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1780 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1781 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1782 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1783 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1784 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1785 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1786 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1793 	mask = 1U << ((mmDMA0_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1794 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1795 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1796 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1797 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1799 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1803 	mask = 1U << ((mmDMA0_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1804 	mask |= 1U << ((mmDMA0_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1805 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1806 	mask |= 1U << ((mmDMA0_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1807 	mask |= 1U << ((mmDMA0_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1808 	mask |= 1U << ((mmDMA0_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1809 	mask |= 1U << ((mmDMA0_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1810 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1811 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1812 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1813 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1814 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1815 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1816 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1817 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1818 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1819 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1820 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1821 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1822 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1823 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1824 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1825 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1826 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1827 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1828 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1829 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1831 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1836 	mask = 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1837 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1838 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1839 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1840 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1841 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1842 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1843 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1844 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1845 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1846 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1847 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1848 	mask |= 1U << ((mmDMA0_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1849 	mask |= 1U << ((mmDMA0_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1850 	mask |= 1U << ((mmDMA0_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1852 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1856 	mask = 1U << ((mmDMA0_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1857 	mask |= 1U << ((mmDMA0_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1858 	mask |= 1U << ((mmDMA0_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1859 	mask |= 1U << ((mmDMA0_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1860 	mask |= 1U << ((mmDMA0_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1861 	mask |= 1U << ((mmDMA0_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1862 	mask |= 1U << ((mmDMA0_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1863 	mask |= 1U << ((mmDMA0_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1864 	mask |= 1U << ((mmDMA0_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1865 	mask |= 1U << ((mmDMA0_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1866 	mask |= 1U << ((mmDMA0_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1867 	mask |= 1U << ((mmDMA0_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1868 	mask |= 1U << ((mmDMA0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1869 	mask |= 1U << ((mmDMA0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1870 	mask |= 1U << ((mmDMA0_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1872 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1877 	mask = 1U << ((mmDMA0_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1879 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1883 	mask = 1U << ((mmDMA1_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1884 	mask |= 1U << ((mmDMA1_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1885 	mask |= 1U << ((mmDMA1_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1886 	mask |= 1U << ((mmDMA1_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1887 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1888 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1889 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1890 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1891 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1892 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1893 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1894 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1895 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1896 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1897 	mask |= 1U << ((mmDMA1_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1898 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1899 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1900 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1901 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1902 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1903 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1904 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1905 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1906 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1907 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1908 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1909 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1910 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1911 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1913 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1917 	mask = 1U << ((mmDMA1_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1918 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1919 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1920 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1921 	mask |= 1U << ((mmDMA1_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1922 	mask |= 1U << ((mmDMA1_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1923 	mask |= 1U << ((mmDMA1_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1924 	mask |= 1U << ((mmDMA1_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1925 	mask |= 1U << ((mmDMA1_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1926 	mask |= 1U << ((mmDMA1_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1927 	mask |= 1U << ((mmDMA1_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1928 	mask |= 1U << ((mmDMA1_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1929 	mask |= 1U << ((mmDMA1_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1930 	mask |= 1U << ((mmDMA1_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1931 	mask |= 1U << ((mmDMA1_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1932 	mask |= 1U << ((mmDMA1_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1933 	mask |= 1U << ((mmDMA1_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1934 	mask |= 1U << ((mmDMA1_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1935 	mask |= 1U << ((mmDMA1_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1936 	mask |= 1U << ((mmDMA1_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1937 	mask |= 1U << ((mmDMA1_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1938 	mask |= 1U << ((mmDMA1_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1939 	mask |= 1U << ((mmDMA1_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1940 	mask |= 1U << ((mmDMA1_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1941 	mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1942 	mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1943 	mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1944 	mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1945 	mask |= 1U << ((mmDMA1_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1946 	mask |= 1U << ((mmDMA1_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1947 	mask |= 1U << ((mmDMA1_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1948 	mask |= 1U << ((mmDMA1_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1950 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1954 	mask = 1U << ((mmDMA1_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1955 	mask |= 1U << ((mmDMA1_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1956 	mask |= 1U << ((mmDMA1_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1957 	mask |= 1U << ((mmDMA1_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1958 	mask |= 1U << ((mmDMA1_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1959 	mask |= 1U << ((mmDMA1_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1960 	mask |= 1U << ((mmDMA1_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1961 	mask |= 1U << ((mmDMA1_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1962 	mask |= 1U << ((mmDMA1_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1963 	mask |= 1U << ((mmDMA1_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1964 	mask |= 1U << ((mmDMA1_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1965 	mask |= 1U << ((mmDMA1_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1966 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1967 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1968 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1970 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1974 	mask = 1U << ((mmDMA1_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1975 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1976 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1977 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1978 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1979 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1980 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1981 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1982 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1983 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1984 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1985 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1986 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1987 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1988 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1989 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1990 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1991 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1992 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1993 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1994 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1995 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1996 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1997 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1998 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1999 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2000 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2001 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2003 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2007 	mask = 1U << ((mmDMA1_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2008 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2009 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2010 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2011 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2012 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2013 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2014 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2015 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2016 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2017 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2018 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2019 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2020 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2021 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2022 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2023 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2024 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2025 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2026 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2027 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2028 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2029 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2030 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2031 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2032 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2033 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2034 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2035 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2036 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2037 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2038 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2040 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2045 	mask = 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2046 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2047 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2048 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2049 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2050 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2051 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2052 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2053 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2054 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2055 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2056 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2057 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2058 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2059 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2060 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2061 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2062 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2063 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2064 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2065 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2066 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2067 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2068 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2069 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2070 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2071 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2072 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2073 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2074 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2075 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2077 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2084 	mask = 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2085 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2087 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2091 	mask = 1U << ((mmDMA1_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2092 	mask |= 1U << ((mmDMA1_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2093 	mask |= 1U << ((mmDMA1_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2094 	mask |= 1U << ((mmDMA1_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2095 	mask |= 1U << ((mmDMA1_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2096 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2097 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2098 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2099 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2100 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2101 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2102 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2103 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2104 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2105 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2106 	mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2107 	mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2108 	mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2110 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2114 	mask = 1U << ((mmDMA1_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2115 	mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2116 	mask |= 1U << ((mmDMA1_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2117 	mask |= 1U << ((mmDMA1_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2119 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2123 	mask = 1U << ((mmDMA1_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2124 	mask |= 1U << ((mmDMA1_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2125 	mask |= 1U << ((mmDMA1_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2126 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2127 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2128 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2129 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2130 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2131 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2132 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2133 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2134 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2135 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2137 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2141 	mask = 1U << ((mmDMA1_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2142 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2143 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2144 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2145 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2146 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2147 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2148 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2149 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2150 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2151 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2152 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2153 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2154 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2155 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2156 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2157 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2158 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2159 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2160 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2161 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2162 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2163 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2164 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2165 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2167 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2172 	mask = 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2173 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2174 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2175 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2176 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2177 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2178 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2179 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2181 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2188 	mask = 1U << ((mmDMA1_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2189 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2190 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2191 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2192 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2194 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2198 	mask = 1U << ((mmDMA1_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2199 	mask |= 1U << ((mmDMA1_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2200 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2201 	mask |= 1U << ((mmDMA1_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2202 	mask |= 1U << ((mmDMA1_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2203 	mask |= 1U << ((mmDMA1_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2204 	mask |= 1U << ((mmDMA1_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2205 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2206 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2207 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2208 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2209 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2210 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2211 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2212 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2213 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2214 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2215 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2216 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2217 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2218 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2219 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2220 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2221 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2222 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2223 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2224 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2226 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2231 	mask = 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2232 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2233 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2234 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2235 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2236 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2237 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2238 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2239 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2240 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2241 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2242 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2243 	mask |= 1U << ((mmDMA1_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2244 	mask |= 1U << ((mmDMA1_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2245 	mask |= 1U << ((mmDMA1_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2247 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2251 	mask = 1U << ((mmDMA1_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2252 	mask |= 1U << ((mmDMA1_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2253 	mask |= 1U << ((mmDMA1_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2254 	mask |= 1U << ((mmDMA1_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2255 	mask |= 1U << ((mmDMA1_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2256 	mask |= 1U << ((mmDMA1_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2257 	mask |= 1U << ((mmDMA1_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2258 	mask |= 1U << ((mmDMA1_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2259 	mask |= 1U << ((mmDMA1_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2260 	mask |= 1U << ((mmDMA1_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2261 	mask |= 1U << ((mmDMA1_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2262 	mask |= 1U << ((mmDMA1_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2263 	mask |= 1U << ((mmDMA1_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2264 	mask |= 1U << ((mmDMA1_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2265 	mask |= 1U << ((mmDMA1_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2267 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2272 	mask = 1U << ((mmDMA1_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2274 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2278 	mask = 1U << ((mmDMA2_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2279 	mask |= 1U << ((mmDMA2_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2280 	mask |= 1U << ((mmDMA2_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2281 	mask |= 1U << ((mmDMA2_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2282 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2283 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2284 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2285 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2286 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2287 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2288 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2289 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2290 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2291 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2292 	mask |= 1U << ((mmDMA2_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2293 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2294 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2295 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2296 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2297 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2298 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2299 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2300 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2301 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2302 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2303 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2304 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2305 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2306 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2308 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2312 	mask = 1U << ((mmDMA2_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2313 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2314 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2315 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2316 	mask |= 1U << ((mmDMA2_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2317 	mask |= 1U << ((mmDMA2_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2318 	mask |= 1U << ((mmDMA2_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2319 	mask |= 1U << ((mmDMA2_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2320 	mask |= 1U << ((mmDMA2_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2321 	mask |= 1U << ((mmDMA2_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2322 	mask |= 1U << ((mmDMA2_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2323 	mask |= 1U << ((mmDMA2_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2324 	mask |= 1U << ((mmDMA2_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2325 	mask |= 1U << ((mmDMA2_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2326 	mask |= 1U << ((mmDMA2_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2327 	mask |= 1U << ((mmDMA2_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2328 	mask |= 1U << ((mmDMA2_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2329 	mask |= 1U << ((mmDMA2_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2330 	mask |= 1U << ((mmDMA2_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2331 	mask |= 1U << ((mmDMA2_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2332 	mask |= 1U << ((mmDMA2_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2333 	mask |= 1U << ((mmDMA2_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2334 	mask |= 1U << ((mmDMA2_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2335 	mask |= 1U << ((mmDMA2_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2336 	mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2337 	mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2338 	mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2339 	mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2340 	mask |= 1U << ((mmDMA2_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2341 	mask |= 1U << ((mmDMA2_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2342 	mask |= 1U << ((mmDMA2_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2343 	mask |= 1U << ((mmDMA2_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2345 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2349 	mask = 1U << ((mmDMA2_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2350 	mask |= 1U << ((mmDMA2_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2351 	mask |= 1U << ((mmDMA2_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2352 	mask |= 1U << ((mmDMA2_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2353 	mask |= 1U << ((mmDMA2_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2354 	mask |= 1U << ((mmDMA2_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2355 	mask |= 1U << ((mmDMA2_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2356 	mask |= 1U << ((mmDMA2_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2357 	mask |= 1U << ((mmDMA2_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2358 	mask |= 1U << ((mmDMA2_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2359 	mask |= 1U << ((mmDMA2_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2360 	mask |= 1U << ((mmDMA2_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2361 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2362 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2363 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2365 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2369 	mask = 1U << ((mmDMA2_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2370 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2371 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2372 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2373 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2374 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2375 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2376 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2377 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2378 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2379 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2380 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2381 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2382 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2383 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2384 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2385 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2386 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2387 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2388 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2389 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2390 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2391 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2392 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2393 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2394 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2395 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2396 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2398 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2402 	mask = 1U << ((mmDMA2_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2403 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2404 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2405 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2406 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2407 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2408 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2409 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2410 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2411 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2412 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2413 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2414 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2415 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2416 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2417 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2418 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2419 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2420 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2421 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2422 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2423 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2424 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2425 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2426 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2427 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2428 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2429 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2430 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2431 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2432 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2433 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2435 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2440 	mask = 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2441 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2442 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2443 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2444 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2445 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2446 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2447 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2448 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2449 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2450 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2451 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2452 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2453 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2454 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2455 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2456 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2457 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2458 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2459 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2460 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2461 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2462 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2463 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2464 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2465 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2466 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2467 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2468 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2469 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2470 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2472 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2479 	mask = 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2480 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2482 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2486 	mask = 1U << ((mmDMA2_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2487 	mask |= 1U << ((mmDMA2_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2488 	mask |= 1U << ((mmDMA2_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2489 	mask |= 1U << ((mmDMA2_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2490 	mask |= 1U << ((mmDMA2_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2491 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2492 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2493 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2494 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2495 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2496 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2497 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2498 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2499 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2500 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2501 	mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2502 	mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2503 	mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2505 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2509 	mask = 1U << ((mmDMA2_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2510 	mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2511 	mask |= 1U << ((mmDMA2_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2512 	mask |= 1U << ((mmDMA2_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2514 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2518 	mask = 1U << ((mmDMA2_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2519 	mask |= 1U << ((mmDMA2_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2520 	mask |= 1U << ((mmDMA2_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2521 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2522 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2523 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2524 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2525 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2526 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2527 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2528 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2529 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2530 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2532 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2536 	mask = 1U << ((mmDMA2_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2537 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2538 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2539 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2540 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2541 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2542 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2543 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2544 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2545 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2546 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2547 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2548 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2549 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2550 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2551 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2552 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2553 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2554 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2555 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2556 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2557 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2558 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2559 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2560 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2562 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2567 	mask = 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2568 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2569 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2570 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2571 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2572 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2573 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2574 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2576 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2583 	mask = 1U << ((mmDMA2_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2584 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2585 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2586 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2587 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2589 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2593 	mask = 1U << ((mmDMA2_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2594 	mask |= 1U << ((mmDMA2_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2595 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2596 	mask |= 1U << ((mmDMA2_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2597 	mask |= 1U << ((mmDMA2_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2598 	mask |= 1U << ((mmDMA2_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2599 	mask |= 1U << ((mmDMA2_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2600 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2601 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2602 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2603 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2604 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2605 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2606 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2607 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2608 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2609 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2610 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2611 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2612 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2613 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2614 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2615 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2616 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2617 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2618 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2619 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2621 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2626 	mask = 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2627 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2628 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2629 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2630 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2631 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2632 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2633 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2634 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2635 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2636 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2637 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2638 	mask |= 1U << ((mmDMA2_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2639 	mask |= 1U << ((mmDMA2_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2640 	mask |= 1U << ((mmDMA2_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2642 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2646 	mask = 1U << ((mmDMA2_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2647 	mask |= 1U << ((mmDMA2_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2648 	mask |= 1U << ((mmDMA2_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2649 	mask |= 1U << ((mmDMA2_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2650 	mask |= 1U << ((mmDMA2_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2651 	mask |= 1U << ((mmDMA2_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2652 	mask |= 1U << ((mmDMA2_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2653 	mask |= 1U << ((mmDMA2_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2654 	mask |= 1U << ((mmDMA2_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2655 	mask |= 1U << ((mmDMA2_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2656 	mask |= 1U << ((mmDMA2_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2657 	mask |= 1U << ((mmDMA2_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2658 	mask |= 1U << ((mmDMA2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2659 	mask |= 1U << ((mmDMA2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2660 	mask |= 1U << ((mmDMA2_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2662 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2667 	mask = 1U << ((mmDMA2_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2669 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2673 	mask = 1U << ((mmDMA3_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2674 	mask |= 1U << ((mmDMA3_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2675 	mask |= 1U << ((mmDMA3_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2676 	mask |= 1U << ((mmDMA3_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2677 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2678 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2679 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2680 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2681 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2682 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2683 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2684 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2685 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2686 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2687 	mask |= 1U << ((mmDMA3_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2688 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2689 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2690 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2691 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2692 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2693 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2694 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2695 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2696 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2697 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2698 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2699 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2700 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2701 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2703 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2707 	mask = 1U << ((mmDMA3_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2708 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2709 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2710 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2711 	mask |= 1U << ((mmDMA3_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2712 	mask |= 1U << ((mmDMA3_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2713 	mask |= 1U << ((mmDMA3_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2714 	mask |= 1U << ((mmDMA3_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2715 	mask |= 1U << ((mmDMA3_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2716 	mask |= 1U << ((mmDMA3_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2717 	mask |= 1U << ((mmDMA3_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2718 	mask |= 1U << ((mmDMA3_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2719 	mask |= 1U << ((mmDMA3_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2720 	mask |= 1U << ((mmDMA3_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2721 	mask |= 1U << ((mmDMA3_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2722 	mask |= 1U << ((mmDMA3_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2723 	mask |= 1U << ((mmDMA3_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2724 	mask |= 1U << ((mmDMA3_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2725 	mask |= 1U << ((mmDMA3_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2726 	mask |= 1U << ((mmDMA3_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2727 	mask |= 1U << ((mmDMA3_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2728 	mask |= 1U << ((mmDMA3_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2729 	mask |= 1U << ((mmDMA3_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2730 	mask |= 1U << ((mmDMA3_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2731 	mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2732 	mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2733 	mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2734 	mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2735 	mask |= 1U << ((mmDMA3_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2736 	mask |= 1U << ((mmDMA3_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2737 	mask |= 1U << ((mmDMA3_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2738 	mask |= 1U << ((mmDMA3_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2740 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2744 	mask = 1U << ((mmDMA3_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2745 	mask |= 1U << ((mmDMA3_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2746 	mask |= 1U << ((mmDMA3_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2747 	mask |= 1U << ((mmDMA3_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2748 	mask |= 1U << ((mmDMA3_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2749 	mask |= 1U << ((mmDMA3_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2750 	mask |= 1U << ((mmDMA3_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2751 	mask |= 1U << ((mmDMA3_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2752 	mask |= 1U << ((mmDMA3_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2753 	mask |= 1U << ((mmDMA3_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2754 	mask |= 1U << ((mmDMA3_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2755 	mask |= 1U << ((mmDMA3_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2756 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2757 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2758 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2760 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2764 	mask = 1U << ((mmDMA3_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2765 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2766 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2767 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2768 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2769 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2770 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2771 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2772 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2773 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2774 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2775 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2776 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2777 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2778 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2779 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2780 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2781 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2782 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2783 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2784 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2785 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2786 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2787 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2788 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2789 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2790 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2791 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2793 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2797 	mask = 1U << ((mmDMA3_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2798 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2799 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2800 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2801 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2802 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2803 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2804 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2805 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2806 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2807 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2808 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2809 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2810 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2811 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2812 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2813 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2814 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2815 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2816 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2817 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2818 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2819 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2820 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2821 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2822 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2823 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2824 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2825 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2826 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2827 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2828 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2830 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2835 	mask = 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2836 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2837 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2838 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2839 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2840 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2841 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2842 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2843 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2844 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2845 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2846 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2847 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2848 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2849 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2850 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2851 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2852 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2853 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2854 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2855 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2856 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2857 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2858 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2859 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2860 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2861 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2862 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2863 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2864 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2865 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2867 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2874 	mask = 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2875 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2877 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2881 	mask = 1U << ((mmDMA3_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2882 	mask |= 1U << ((mmDMA3_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2883 	mask |= 1U << ((mmDMA3_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2884 	mask |= 1U << ((mmDMA3_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2885 	mask |= 1U << ((mmDMA3_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2886 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2887 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2888 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2889 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2890 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2891 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2892 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2893 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2894 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2895 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2896 	mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2897 	mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2898 	mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2900 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2904 	mask = 1U << ((mmDMA3_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2905 	mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2906 	mask |= 1U << ((mmDMA3_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2907 	mask |= 1U << ((mmDMA3_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2909 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2913 	mask = 1U << ((mmDMA3_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2914 	mask |= 1U << ((mmDMA3_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2915 	mask |= 1U << ((mmDMA3_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2916 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2917 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2918 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2919 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2920 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2921 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2922 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2923 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2924 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2925 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2927 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2931 	mask = 1U << ((mmDMA3_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2932 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2933 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2934 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2935 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2936 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2937 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2938 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2939 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2940 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2941 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2942 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2943 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2944 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2945 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2946 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2947 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2948 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2949 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2950 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2951 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2952 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2953 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2954 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2955 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2957 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2962 	mask = 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2963 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2964 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2965 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2966 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2967 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2968 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2969 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2971 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2978 	mask = 1U << ((mmDMA3_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2979 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2980 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2981 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2982 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2984 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2988 	mask = 1U << ((mmDMA3_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2989 	mask |= 1U << ((mmDMA3_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2990 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2991 	mask |= 1U << ((mmDMA3_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2992 	mask |= 1U << ((mmDMA3_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2993 	mask |= 1U << ((mmDMA3_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2994 	mask |= 1U << ((mmDMA3_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2995 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2996 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2997 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2998 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2999 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3000 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3001 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3002 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3003 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3004 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3005 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3006 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3007 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3008 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3009 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3010 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3011 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3012 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3013 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3014 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3016 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3021 	mask = 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3022 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3023 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3024 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3025 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3026 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3027 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3028 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3029 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3030 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3031 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3032 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3033 	mask |= 1U << ((mmDMA3_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3034 	mask |= 1U << ((mmDMA3_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3035 	mask |= 1U << ((mmDMA3_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3037 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3041 	mask = 1U << ((mmDMA3_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3042 	mask |= 1U << ((mmDMA3_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3043 	mask |= 1U << ((mmDMA3_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3044 	mask |= 1U << ((mmDMA3_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3045 	mask |= 1U << ((mmDMA3_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3046 	mask |= 1U << ((mmDMA3_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3047 	mask |= 1U << ((mmDMA3_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3048 	mask |= 1U << ((mmDMA3_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3049 	mask |= 1U << ((mmDMA3_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3050 	mask |= 1U << ((mmDMA3_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3051 	mask |= 1U << ((mmDMA3_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3052 	mask |= 1U << ((mmDMA3_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3053 	mask |= 1U << ((mmDMA3_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3054 	mask |= 1U << ((mmDMA3_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3055 	mask |= 1U << ((mmDMA3_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3057 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3062 	mask = 1U << ((mmDMA3_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3064 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3068 	mask = 1U << ((mmDMA4_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3069 	mask |= 1U << ((mmDMA4_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3070 	mask |= 1U << ((mmDMA4_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3071 	mask |= 1U << ((mmDMA4_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3072 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3073 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3074 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3075 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3076 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3077 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3078 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3079 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3080 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3081 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3082 	mask |= 1U << ((mmDMA4_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3083 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3084 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3085 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3086 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3087 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3088 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3089 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3090 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3091 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3092 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3093 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3094 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3095 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3096 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3098 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3102 	mask = 1U << ((mmDMA4_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3103 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3104 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3105 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3106 	mask |= 1U << ((mmDMA4_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3107 	mask |= 1U << ((mmDMA4_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3108 	mask |= 1U << ((mmDMA4_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3109 	mask |= 1U << ((mmDMA4_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3110 	mask |= 1U << ((mmDMA4_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3111 	mask |= 1U << ((mmDMA4_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3112 	mask |= 1U << ((mmDMA4_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3113 	mask |= 1U << ((mmDMA4_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3114 	mask |= 1U << ((mmDMA4_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3115 	mask |= 1U << ((mmDMA4_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3116 	mask |= 1U << ((mmDMA4_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3117 	mask |= 1U << ((mmDMA4_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3118 	mask |= 1U << ((mmDMA4_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3119 	mask |= 1U << ((mmDMA4_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3120 	mask |= 1U << ((mmDMA4_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3121 	mask |= 1U << ((mmDMA4_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3122 	mask |= 1U << ((mmDMA4_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3123 	mask |= 1U << ((mmDMA4_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3124 	mask |= 1U << ((mmDMA4_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3125 	mask |= 1U << ((mmDMA4_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3126 	mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3127 	mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3128 	mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3129 	mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3130 	mask |= 1U << ((mmDMA4_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3131 	mask |= 1U << ((mmDMA4_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3132 	mask |= 1U << ((mmDMA4_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3133 	mask |= 1U << ((mmDMA4_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3135 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3139 	mask = 1U << ((mmDMA4_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3140 	mask |= 1U << ((mmDMA4_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3141 	mask |= 1U << ((mmDMA4_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3142 	mask |= 1U << ((mmDMA4_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3143 	mask |= 1U << ((mmDMA4_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3144 	mask |= 1U << ((mmDMA4_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3145 	mask |= 1U << ((mmDMA4_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3146 	mask |= 1U << ((mmDMA4_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3147 	mask |= 1U << ((mmDMA4_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3148 	mask |= 1U << ((mmDMA4_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3149 	mask |= 1U << ((mmDMA4_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3150 	mask |= 1U << ((mmDMA4_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3151 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3152 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3153 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3155 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3159 	mask = 1U << ((mmDMA4_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3160 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3161 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3162 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3163 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3164 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3165 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3166 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3167 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3168 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3169 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3170 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3171 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3172 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3173 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3174 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3175 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3176 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3177 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3178 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3179 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3180 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3181 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3182 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3183 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3184 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3185 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3186 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3188 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3192 	mask = 1U << ((mmDMA4_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3193 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3194 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3195 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3196 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3197 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3198 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3199 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3200 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3201 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3202 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3203 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3204 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3205 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3206 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3207 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3208 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3209 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3210 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3211 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3212 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3213 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3214 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3215 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3216 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3217 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3218 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3219 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3220 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3221 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3222 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3223 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3225 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3230 	mask = 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3231 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3232 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3233 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3234 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3235 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3236 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3237 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3238 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3239 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3240 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3241 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3242 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3243 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3244 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3245 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3246 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3247 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3248 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3249 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3250 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3251 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3252 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3253 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3254 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3255 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3256 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3257 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3258 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3259 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3260 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3262 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3269 	mask = 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3270 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3272 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3276 	mask = 1U << ((mmDMA4_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3277 	mask |= 1U << ((mmDMA4_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3278 	mask |= 1U << ((mmDMA4_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3279 	mask |= 1U << ((mmDMA4_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3280 	mask |= 1U << ((mmDMA4_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3281 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3282 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3283 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3284 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3285 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3286 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3287 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3288 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3289 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3290 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3291 	mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3292 	mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3293 	mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3295 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3299 	mask = 1U << ((mmDMA4_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3300 	mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3301 	mask |= 1U << ((mmDMA4_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3302 	mask |= 1U << ((mmDMA4_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3304 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3308 	mask = 1U << ((mmDMA4_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3309 	mask |= 1U << ((mmDMA4_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3310 	mask |= 1U << ((mmDMA4_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3311 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3312 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3313 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3314 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3315 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3316 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3317 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3318 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3319 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3320 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3322 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3326 	mask = 1U << ((mmDMA4_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3327 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3328 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3329 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3330 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3331 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3332 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3333 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3334 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3335 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3336 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3337 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3338 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3339 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3340 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3341 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3342 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3343 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3344 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3345 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3346 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3347 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3348 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3349 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3350 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3352 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3357 	mask = 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3358 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3359 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3360 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3361 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3362 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3363 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3364 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3366 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3373 	mask = 1U << ((mmDMA4_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3374 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3375 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3376 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3377 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3379 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3383 	mask = 1U << ((mmDMA4_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3384 	mask |= 1U << ((mmDMA4_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3385 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3386 	mask |= 1U << ((mmDMA4_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3387 	mask |= 1U << ((mmDMA4_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3388 	mask |= 1U << ((mmDMA4_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3389 	mask |= 1U << ((mmDMA4_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3390 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3391 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3392 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3393 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3394 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3395 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3396 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3397 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3398 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3399 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3400 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3401 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3402 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3403 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3404 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3405 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3406 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3407 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3408 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3409 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3411 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3416 	mask = 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3417 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3418 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3419 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3420 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3421 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3422 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3423 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3424 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3425 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3426 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3427 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3428 	mask |= 1U << ((mmDMA4_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3429 	mask |= 1U << ((mmDMA4_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3430 	mask |= 1U << ((mmDMA4_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3432 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3436 	mask = 1U << ((mmDMA4_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3437 	mask |= 1U << ((mmDMA4_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3438 	mask |= 1U << ((mmDMA4_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3439 	mask |= 1U << ((mmDMA4_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3440 	mask |= 1U << ((mmDMA4_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3441 	mask |= 1U << ((mmDMA4_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3442 	mask |= 1U << ((mmDMA4_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3443 	mask |= 1U << ((mmDMA4_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3444 	mask |= 1U << ((mmDMA4_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3445 	mask |= 1U << ((mmDMA4_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3446 	mask |= 1U << ((mmDMA4_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3447 	mask |= 1U << ((mmDMA4_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3448 	mask |= 1U << ((mmDMA4_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3449 	mask |= 1U << ((mmDMA4_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3450 	mask |= 1U << ((mmDMA4_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3452 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3457 	mask = 1U << ((mmDMA4_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3459 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3463 	mask = 1U << ((mmDMA5_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3464 	mask |= 1U << ((mmDMA5_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3465 	mask |= 1U << ((mmDMA5_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3466 	mask |= 1U << ((mmDMA5_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3467 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3468 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3469 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3470 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3471 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3472 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3473 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3474 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3475 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3476 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3477 	mask |= 1U << ((mmDMA5_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3478 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3479 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3480 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3481 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3482 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3483 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3484 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3485 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3486 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3487 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3488 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3489 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3490 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3491 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3493 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3497 	mask = 1U << ((mmDMA5_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3498 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3499 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3500 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3501 	mask |= 1U << ((mmDMA5_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3502 	mask |= 1U << ((mmDMA5_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3503 	mask |= 1U << ((mmDMA5_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3504 	mask |= 1U << ((mmDMA5_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3505 	mask |= 1U << ((mmDMA5_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3506 	mask |= 1U << ((mmDMA5_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3507 	mask |= 1U << ((mmDMA5_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3508 	mask |= 1U << ((mmDMA5_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3509 	mask |= 1U << ((mmDMA5_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3510 	mask |= 1U << ((mmDMA5_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3511 	mask |= 1U << ((mmDMA5_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3512 	mask |= 1U << ((mmDMA5_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3513 	mask |= 1U << ((mmDMA5_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3514 	mask |= 1U << ((mmDMA5_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3515 	mask |= 1U << ((mmDMA5_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3516 	mask |= 1U << ((mmDMA5_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3517 	mask |= 1U << ((mmDMA5_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3518 	mask |= 1U << ((mmDMA5_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3519 	mask |= 1U << ((mmDMA5_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3520 	mask |= 1U << ((mmDMA5_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3521 	mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3522 	mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3523 	mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3524 	mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3525 	mask |= 1U << ((mmDMA5_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3526 	mask |= 1U << ((mmDMA5_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3527 	mask |= 1U << ((mmDMA5_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3528 	mask |= 1U << ((mmDMA5_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3530 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3534 	mask = 1U << ((mmDMA5_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3535 	mask |= 1U << ((mmDMA5_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3536 	mask |= 1U << ((mmDMA5_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3537 	mask |= 1U << ((mmDMA5_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3538 	mask |= 1U << ((mmDMA5_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3539 	mask |= 1U << ((mmDMA5_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3540 	mask |= 1U << ((mmDMA5_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3541 	mask |= 1U << ((mmDMA5_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3542 	mask |= 1U << ((mmDMA5_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3543 	mask |= 1U << ((mmDMA5_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3544 	mask |= 1U << ((mmDMA5_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3545 	mask |= 1U << ((mmDMA5_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3546 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3547 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3548 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3550 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3554 	mask = 1U << ((mmDMA5_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3555 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3556 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3557 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3558 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3559 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3560 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3561 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3562 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3563 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3564 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3565 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3566 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3567 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3568 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3569 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3570 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3571 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3572 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3573 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3574 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3575 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3576 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3577 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3578 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3579 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3580 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3581 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3583 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3587 	mask = 1U << ((mmDMA5_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3588 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3589 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3590 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3591 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3592 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3593 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3594 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3595 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3596 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3597 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3598 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3599 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3600 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3601 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3602 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3603 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3604 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3605 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3606 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3607 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3608 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3609 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3610 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3611 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3612 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3613 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3614 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3615 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3616 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3617 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3618 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3620 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3625 	mask = 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3626 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3627 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3628 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3629 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3630 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3631 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3632 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3633 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3634 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3635 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3636 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3637 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3638 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3639 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3640 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3641 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3642 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3643 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3644 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3645 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3646 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3647 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3648 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3649 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3650 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3651 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3652 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3653 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3654 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3655 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3657 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3664 	mask = 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3665 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3667 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3671 	mask = 1U << ((mmDMA5_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3672 	mask |= 1U << ((mmDMA5_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3673 	mask |= 1U << ((mmDMA5_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3674 	mask |= 1U << ((mmDMA5_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3675 	mask |= 1U << ((mmDMA5_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3676 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3677 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3678 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3679 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3680 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3681 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3682 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3683 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3684 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3685 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3686 	mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3687 	mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3688 	mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3690 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3694 	mask = 1U << ((mmDMA5_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3695 	mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3696 	mask |= 1U << ((mmDMA5_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3697 	mask |= 1U << ((mmDMA5_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3699 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3703 	mask = 1U << ((mmDMA5_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3704 	mask |= 1U << ((mmDMA5_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3705 	mask |= 1U << ((mmDMA5_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3706 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3707 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3708 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3709 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3710 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3711 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3712 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3713 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3714 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3715 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3717 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3721 	mask = 1U << ((mmDMA5_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3722 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3723 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3724 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3725 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3726 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3727 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3728 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3729 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3730 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3731 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3732 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3733 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3734 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3735 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3736 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3737 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3738 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3739 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3740 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3741 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3742 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3743 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3744 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3745 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3747 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3752 	mask = 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3753 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3754 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3755 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3756 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3757 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3758 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3759 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3761 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3768 	mask = 1U << ((mmDMA5_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3769 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3770 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3771 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3772 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3774 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3778 	mask = 1U << ((mmDMA5_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3779 	mask |= 1U << ((mmDMA5_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3780 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3781 	mask |= 1U << ((mmDMA5_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3782 	mask |= 1U << ((mmDMA5_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3783 	mask |= 1U << ((mmDMA5_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3784 	mask |= 1U << ((mmDMA5_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3785 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3786 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3787 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3788 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3789 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3790 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3791 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3792 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3793 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3794 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3795 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3796 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3797 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3798 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3799 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3800 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3801 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3802 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3803 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3804 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3806 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3811 	mask = 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3812 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3813 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3814 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3815 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3816 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3817 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3818 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3819 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3820 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3821 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3822 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3823 	mask |= 1U << ((mmDMA5_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3824 	mask |= 1U << ((mmDMA5_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3825 	mask |= 1U << ((mmDMA5_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3827 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3831 	mask = 1U << ((mmDMA5_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3832 	mask |= 1U << ((mmDMA5_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3833 	mask |= 1U << ((mmDMA5_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3834 	mask |= 1U << ((mmDMA5_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3835 	mask |= 1U << ((mmDMA5_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3836 	mask |= 1U << ((mmDMA5_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3837 	mask |= 1U << ((mmDMA5_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3838 	mask |= 1U << ((mmDMA5_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3839 	mask |= 1U << ((mmDMA5_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3840 	mask |= 1U << ((mmDMA5_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3841 	mask |= 1U << ((mmDMA5_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3842 	mask |= 1U << ((mmDMA5_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3843 	mask |= 1U << ((mmDMA5_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3844 	mask |= 1U << ((mmDMA5_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3845 	mask |= 1U << ((mmDMA5_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3847 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3852 	mask = 1U << ((mmDMA5_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3854 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3858 	mask = 1U << ((mmDMA6_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3859 	mask |= 1U << ((mmDMA6_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3860 	mask |= 1U << ((mmDMA6_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3861 	mask |= 1U << ((mmDMA6_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3862 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3863 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3864 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3865 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3866 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3867 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3868 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3869 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3870 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3871 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3872 	mask |= 1U << ((mmDMA6_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3873 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3874 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3875 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3876 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3877 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3878 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3879 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3880 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3881 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3882 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3883 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3884 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3885 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3886 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3888 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3892 	mask = 1U << ((mmDMA6_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3893 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3894 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3895 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3896 	mask |= 1U << ((mmDMA6_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3897 	mask |= 1U << ((mmDMA6_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3898 	mask |= 1U << ((mmDMA6_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3899 	mask |= 1U << ((mmDMA6_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3900 	mask |= 1U << ((mmDMA6_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3901 	mask |= 1U << ((mmDMA6_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3902 	mask |= 1U << ((mmDMA6_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3903 	mask |= 1U << ((mmDMA6_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3904 	mask |= 1U << ((mmDMA6_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3905 	mask |= 1U << ((mmDMA6_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3906 	mask |= 1U << ((mmDMA6_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3907 	mask |= 1U << ((mmDMA6_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3908 	mask |= 1U << ((mmDMA6_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3909 	mask |= 1U << ((mmDMA6_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3910 	mask |= 1U << ((mmDMA6_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3911 	mask |= 1U << ((mmDMA6_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3912 	mask |= 1U << ((mmDMA6_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3913 	mask |= 1U << ((mmDMA6_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3914 	mask |= 1U << ((mmDMA6_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3915 	mask |= 1U << ((mmDMA6_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3916 	mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3917 	mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3918 	mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3919 	mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3920 	mask |= 1U << ((mmDMA6_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3921 	mask |= 1U << ((mmDMA6_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3922 	mask |= 1U << ((mmDMA6_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3923 	mask |= 1U << ((mmDMA6_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3925 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3929 	mask = 1U << ((mmDMA6_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3930 	mask |= 1U << ((mmDMA6_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3931 	mask |= 1U << ((mmDMA6_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3932 	mask |= 1U << ((mmDMA6_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3933 	mask |= 1U << ((mmDMA6_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3934 	mask |= 1U << ((mmDMA6_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3935 	mask |= 1U << ((mmDMA6_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3936 	mask |= 1U << ((mmDMA6_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3937 	mask |= 1U << ((mmDMA6_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3938 	mask |= 1U << ((mmDMA6_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3939 	mask |= 1U << ((mmDMA6_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3940 	mask |= 1U << ((mmDMA6_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3941 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3942 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3943 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3945 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3949 	mask = 1U << ((mmDMA6_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3950 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3951 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3952 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3953 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3954 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3955 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3956 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3957 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3958 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3959 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3960 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3961 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3962 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3963 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3964 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3965 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3966 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3967 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3968 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3969 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3970 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3971 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3972 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3973 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3974 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3975 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3976 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3978 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3982 	mask = 1U << ((mmDMA6_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3983 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3984 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3985 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3986 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3987 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3988 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3989 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3990 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3991 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3992 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3993 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3994 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3995 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3996 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3997 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3998 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3999 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4000 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4001 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4002 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4003 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4004 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4005 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4006 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4007 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4008 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4009 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4010 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4011 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4012 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4013 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4015 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4020 	mask = 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4021 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4022 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4023 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4024 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4025 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4026 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4027 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4028 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4029 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4030 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4031 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4032 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4033 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4034 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4035 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4036 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4037 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4038 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4039 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4040 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4041 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4042 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4043 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4044 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4045 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4046 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4047 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4048 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4049 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4050 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4052 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4059 	mask = 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4060 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4062 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4066 	mask = 1U << ((mmDMA6_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4067 	mask |= 1U << ((mmDMA6_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4068 	mask |= 1U << ((mmDMA6_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4069 	mask |= 1U << ((mmDMA6_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4070 	mask |= 1U << ((mmDMA6_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4071 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4072 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4073 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4074 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4075 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4076 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4077 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4078 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4079 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4080 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4081 	mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4082 	mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4083 	mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4085 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4089 	mask = 1U << ((mmDMA6_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4090 	mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4091 	mask |= 1U << ((mmDMA6_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4092 	mask |= 1U << ((mmDMA6_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4094 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4098 	mask = 1U << ((mmDMA6_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4099 	mask |= 1U << ((mmDMA6_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4100 	mask |= 1U << ((mmDMA6_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4101 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4102 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4103 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4104 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4105 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4106 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4107 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4108 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4109 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4110 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4112 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4116 	mask = 1U << ((mmDMA6_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4117 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4118 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4119 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4120 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4121 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4122 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4123 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4124 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4125 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4126 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4127 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4128 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4129 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4130 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4131 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4132 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4133 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4134 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4135 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4136 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4137 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4138 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4139 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4140 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4142 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4147 	mask = 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4148 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4149 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4150 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4151 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4152 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4153 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4154 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4156 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4164 	mask = 1U << ((mmDMA6_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4165 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4166 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4167 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4168 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4170 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4174 	mask = 1U << ((mmDMA6_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4175 	mask |= 1U << ((mmDMA6_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4176 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4177 	mask |= 1U << ((mmDMA6_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4178 	mask |= 1U << ((mmDMA6_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4179 	mask |= 1U << ((mmDMA6_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4180 	mask |= 1U << ((mmDMA6_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4181 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4182 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4183 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4184 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4185 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4186 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4187 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4188 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4189 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4190 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4191 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4192 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4193 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4194 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4195 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4196 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4197 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4198 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4199 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4200 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4202 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4207 	mask = 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4208 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4209 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4210 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4211 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4212 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4213 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4214 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4215 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4216 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4217 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4218 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4219 	mask |= 1U << ((mmDMA6_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4220 	mask |= 1U << ((mmDMA6_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4221 	mask |= 1U << ((mmDMA6_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4223 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4227 	mask = 1U << ((mmDMA6_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4228 	mask |= 1U << ((mmDMA6_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4229 	mask |= 1U << ((mmDMA6_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4230 	mask |= 1U << ((mmDMA6_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4231 	mask |= 1U << ((mmDMA6_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4232 	mask |= 1U << ((mmDMA6_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4233 	mask |= 1U << ((mmDMA6_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4234 	mask |= 1U << ((mmDMA6_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4235 	mask |= 1U << ((mmDMA6_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4236 	mask |= 1U << ((mmDMA6_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4237 	mask |= 1U << ((mmDMA6_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4238 	mask |= 1U << ((mmDMA6_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4239 	mask |= 1U << ((mmDMA6_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4240 	mask |= 1U << ((mmDMA6_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4241 	mask |= 1U << ((mmDMA6_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4243 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4248 	mask = 1U << ((mmDMA6_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4250 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4254 	mask = 1U << ((mmDMA7_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4255 	mask |= 1U << ((mmDMA7_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4256 	mask |= 1U << ((mmDMA7_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4257 	mask |= 1U << ((mmDMA7_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4258 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4259 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4260 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4261 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4262 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4263 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4264 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4265 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4266 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4267 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4268 	mask |= 1U << ((mmDMA7_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4269 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4270 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4271 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4272 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4273 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4274 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4275 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4276 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4277 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4278 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4279 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4280 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4281 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4282 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4284 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4288 	mask = 1U << ((mmDMA7_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4289 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4290 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4291 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4292 	mask |= 1U << ((mmDMA7_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4293 	mask |= 1U << ((mmDMA7_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4294 	mask |= 1U << ((mmDMA7_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4295 	mask |= 1U << ((mmDMA7_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4296 	mask |= 1U << ((mmDMA7_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4297 	mask |= 1U << ((mmDMA7_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4298 	mask |= 1U << ((mmDMA7_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4299 	mask |= 1U << ((mmDMA7_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4300 	mask |= 1U << ((mmDMA7_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4301 	mask |= 1U << ((mmDMA7_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4302 	mask |= 1U << ((mmDMA7_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4303 	mask |= 1U << ((mmDMA7_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4304 	mask |= 1U << ((mmDMA7_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4305 	mask |= 1U << ((mmDMA7_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4306 	mask |= 1U << ((mmDMA7_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4307 	mask |= 1U << ((mmDMA7_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4308 	mask |= 1U << ((mmDMA7_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4309 	mask |= 1U << ((mmDMA7_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4310 	mask |= 1U << ((mmDMA7_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4311 	mask |= 1U << ((mmDMA7_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4312 	mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4313 	mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4314 	mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4315 	mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4316 	mask |= 1U << ((mmDMA7_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4317 	mask |= 1U << ((mmDMA7_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4318 	mask |= 1U << ((mmDMA7_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4319 	mask |= 1U << ((mmDMA7_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4321 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4325 	mask = 1U << ((mmDMA7_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4326 	mask |= 1U << ((mmDMA7_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4327 	mask |= 1U << ((mmDMA7_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4328 	mask |= 1U << ((mmDMA7_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4329 	mask |= 1U << ((mmDMA7_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4330 	mask |= 1U << ((mmDMA7_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4331 	mask |= 1U << ((mmDMA7_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4332 	mask |= 1U << ((mmDMA7_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4333 	mask |= 1U << ((mmDMA7_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4334 	mask |= 1U << ((mmDMA7_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4335 	mask |= 1U << ((mmDMA7_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4336 	mask |= 1U << ((mmDMA7_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4337 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4338 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4339 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4341 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4345 	mask = 1U << ((mmDMA7_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4346 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4347 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4348 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4349 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4350 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4351 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4352 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4353 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4354 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4355 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4356 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4357 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4358 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4359 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4360 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4361 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4362 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4363 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4364 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4365 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4366 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4367 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4368 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4369 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4370 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4371 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4372 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4374 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4378 	mask = 1U << ((mmDMA7_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4379 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4380 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4381 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4382 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4383 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4384 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4385 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4386 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4387 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4388 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4389 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4390 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4391 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4392 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4393 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4394 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4395 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4396 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4397 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4398 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4399 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4400 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4401 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4402 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4403 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4404 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4405 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4406 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4407 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4408 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4409 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4411 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4416 	mask = 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4417 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4418 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4419 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4420 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4421 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4422 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4423 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4424 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4425 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4426 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4427 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4428 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4429 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4430 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4431 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4432 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4433 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4434 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4435 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4436 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4437 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4438 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4439 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4440 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4441 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4442 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4443 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4444 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4445 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4446 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4448 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4455 	mask = 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4456 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4458 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4462 	mask = 1U << ((mmDMA7_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4463 	mask |= 1U << ((mmDMA7_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4464 	mask |= 1U << ((mmDMA7_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4465 	mask |= 1U << ((mmDMA7_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4466 	mask |= 1U << ((mmDMA7_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4467 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4468 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4469 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4470 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4471 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4472 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4473 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4474 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4475 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4476 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4477 	mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4478 	mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4479 	mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4481 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4485 	mask = 1U << ((mmDMA7_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4486 	mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4487 	mask |= 1U << ((mmDMA7_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4488 	mask |= 1U << ((mmDMA7_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4490 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4494 	mask = 1U << ((mmDMA7_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4495 	mask |= 1U << ((mmDMA7_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4496 	mask |= 1U << ((mmDMA7_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4497 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4498 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4499 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4500 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4501 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4502 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4503 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4504 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4505 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4506 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4508 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4512 	mask = 1U << ((mmDMA7_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4513 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4514 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4515 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4516 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4517 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4518 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4519 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4520 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4521 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4522 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4523 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4524 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4525 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4526 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4527 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4528 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4529 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4530 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4531 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4532 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4533 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4534 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4535 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4536 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4538 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4543 	mask = 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4544 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4545 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4546 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4547 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4548 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4549 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4550 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4552 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4559 	mask = 1U << ((mmDMA7_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4560 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4561 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4562 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4563 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4565 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4569 	mask = 1U << ((mmDMA7_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4570 	mask |= 1U << ((mmDMA7_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4571 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4572 	mask |= 1U << ((mmDMA7_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4573 	mask |= 1U << ((mmDMA7_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4574 	mask |= 1U << ((mmDMA7_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4575 	mask |= 1U << ((mmDMA7_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4576 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4577 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4578 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4579 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4580 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4581 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4582 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4583 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4584 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4585 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4586 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4587 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4588 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4589 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4590 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4591 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4592 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4593 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4594 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4595 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4597 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4602 	mask = 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4603 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4604 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4605 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4606 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4607 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4608 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4609 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4610 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4611 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4612 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4613 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4614 	mask |= 1U << ((mmDMA7_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4615 	mask |= 1U << ((mmDMA7_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4616 	mask |= 1U << ((mmDMA7_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4618 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4622 	mask = 1U << ((mmDMA7_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4623 	mask |= 1U << ((mmDMA7_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4624 	mask |= 1U << ((mmDMA7_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4625 	mask |= 1U << ((mmDMA7_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4626 	mask |= 1U << ((mmDMA7_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4627 	mask |= 1U << ((mmDMA7_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4628 	mask |= 1U << ((mmDMA7_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4629 	mask |= 1U << ((mmDMA7_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4630 	mask |= 1U << ((mmDMA7_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4631 	mask |= 1U << ((mmDMA7_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4632 	mask |= 1U << ((mmDMA7_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4633 	mask |= 1U << ((mmDMA7_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4634 	mask |= 1U << ((mmDMA7_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4635 	mask |= 1U << ((mmDMA7_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4636 	mask |= 1U << ((mmDMA7_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4638 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4643 	mask = 1U << ((mmDMA7_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4645 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4649 	mask = 1U << ((mmDMA0_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4650 	mask |= 1U << ((mmDMA0_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4651 	mask |= 1U << ((mmDMA0_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4653 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4657 	mask = 1U << ((mmDMA0_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4658 	mask |= 1U << ((mmDMA0_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4659 	mask |= 1U << ((mmDMA0_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4661 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4666 	mask = 1U << ((mmDMA0_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4667 	mask |= 1U << ((mmDMA0_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4668 	mask |= 1U << ((mmDMA0_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4669 	mask |= 1U << ((mmDMA0_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4670 	mask |= 1U << ((mmDMA0_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4671 	mask |= 1U << ((mmDMA0_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4672 	mask |= 1U << ((mmDMA0_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4673 	mask |= 1U << ((mmDMA0_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4674 	mask |= 1U << ((mmDMA0_CORE_WR_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4675 	mask |= 1U << ((mmDMA0_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4676 	mask |= 1U << ((mmDMA0_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4677 	mask |= 1U << ((mmDMA0_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4678 	mask |= 1U << ((mmDMA0_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4679 	mask |= 1U << ((mmDMA0_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4680 	mask |= 1U << ((mmDMA0_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4681 	mask |= 1U << ((mmDMA0_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4682 	mask |= 1U << ((mmDMA0_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4683 	mask |= 1U << ((mmDMA0_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4684 	mask |= 1U << ((mmDMA0_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4686 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4690 	mask = 1U << ((mmDMA0_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4691 	mask |= 1U << ((mmDMA0_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4693 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4697 	mask = 1U << ((mmDMA0_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4698 	mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4699 	mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4700 	mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4701 	mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4702 	mask |= 1U << ((mmDMA0_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4703 	mask |= 1U << ((mmDMA0_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4704 	mask |= 1U << ((mmDMA0_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4705 	mask |= 1U << ((mmDMA0_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4706 	mask |= 1U << ((mmDMA0_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4707 	mask |= 1U << ((mmDMA0_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4708 	mask |= 1U << ((mmDMA0_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4710 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4714 	mask = 1U << ((mmDMA1_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4715 	mask |= 1U << ((mmDMA1_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4716 	mask |= 1U << ((mmDMA1_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4718 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4722 	mask = 1U << ((mmDMA1_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4723 	mask |= 1U << ((mmDMA1_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4724 	mask |= 1U << ((mmDMA1_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4726 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4731 	mask = 1U << ((mmDMA1_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4732 	mask |= 1U << ((mmDMA1_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4733 	mask |= 1U << ((mmDMA1_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4734 	mask |= 1U << ((mmDMA1_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4735 	mask |= 1U << ((mmDMA1_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4736 	mask |= 1U << ((mmDMA1_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4737 	mask |= 1U << ((mmDMA1_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4738 	mask |= 1U << ((mmDMA1_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4739 	mask |= 1U << ((mmDMA1_CORE_WR_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4740 	mask |= 1U << ((mmDMA1_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4741 	mask |= 1U << ((mmDMA1_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4742 	mask |= 1U << ((mmDMA1_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4743 	mask |= 1U << ((mmDMA1_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4744 	mask |= 1U << ((mmDMA1_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4745 	mask |= 1U << ((mmDMA1_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4746 	mask |= 1U << ((mmDMA1_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4747 	mask |= 1U << ((mmDMA1_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4748 	mask |= 1U << ((mmDMA1_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4749 	mask |= 1U << ((mmDMA1_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4751 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4755 	mask = 1U << ((mmDMA1_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4756 	mask |= 1U << ((mmDMA1_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4758 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4762 	mask = 1U << ((mmDMA1_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4763 	mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4764 	mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4765 	mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4766 	mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4767 	mask |= 1U << ((mmDMA1_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4768 	mask |= 1U << ((mmDMA1_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4769 	mask |= 1U << ((mmDMA1_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4770 	mask |= 1U << ((mmDMA1_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4771 	mask |= 1U << ((mmDMA1_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4772 	mask |= 1U << ((mmDMA1_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4773 	mask |= 1U << ((mmDMA1_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4775 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4779 	mask = 1U << ((mmDMA2_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4780 	mask |= 1U << ((mmDMA2_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4781 	mask |= 1U << ((mmDMA2_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4783 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4787 	mask = 1U << ((mmDMA2_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4788 	mask |= 1U << ((mmDMA2_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4789 	mask |= 1U << ((mmDMA2_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4791 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4796 	mask = 1U << ((mmDMA2_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4797 	mask |= 1U << ((mmDMA2_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4798 	mask |= 1U << ((mmDMA2_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4799 	mask |= 1U << ((mmDMA2_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4800 	mask |= 1U << ((mmDMA2_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4801 	mask |= 1U << ((mmDMA2_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4802 	mask |= 1U << ((mmDMA2_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4803 	mask |= 1U << ((mmDMA2_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4804 	mask |= 1U << ((mmDMA2_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4805 	mask |= 1U << ((mmDMA2_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4806 	mask |= 1U << ((mmDMA2_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4807 	mask |= 1U << ((mmDMA2_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4808 	mask |= 1U << ((mmDMA2_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4809 	mask |= 1U << ((mmDMA2_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4810 	mask |= 1U << ((mmDMA2_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4811 	mask |= 1U << ((mmDMA2_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4812 	mask |= 1U << ((mmDMA2_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4813 	mask |= 1U << ((mmDMA2_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4815 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4819 	mask = 1U << ((mmDMA2_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4820 	mask |= 1U << ((mmDMA2_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4822 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4826 	mask = 1U << ((mmDMA2_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4827 	mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4828 	mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4829 	mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4830 	mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4831 	mask |= 1U << ((mmDMA2_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4832 	mask |= 1U << ((mmDMA2_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4833 	mask |= 1U << ((mmDMA2_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4834 	mask |= 1U << ((mmDMA2_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4835 	mask |= 1U << ((mmDMA2_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4836 	mask |= 1U << ((mmDMA2_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4837 	mask |= 1U << ((mmDMA2_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4839 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4843 	mask = 1U << ((mmDMA3_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4844 	mask |= 1U << ((mmDMA3_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4845 	mask |= 1U << ((mmDMA3_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4847 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4851 	mask = 1U << ((mmDMA3_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4852 	mask |= 1U << ((mmDMA3_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4853 	mask |= 1U << ((mmDMA3_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4855 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4860 	mask = 1U << ((mmDMA3_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4861 	mask |= 1U << ((mmDMA3_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4862 	mask |= 1U << ((mmDMA3_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4863 	mask |= 1U << ((mmDMA3_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4864 	mask |= 1U << ((mmDMA3_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4865 	mask |= 1U << ((mmDMA3_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4866 	mask |= 1U << ((mmDMA3_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4867 	mask |= 1U << ((mmDMA3_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4868 	mask |= 1U << ((mmDMA3_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4869 	mask |= 1U << ((mmDMA3_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4870 	mask |= 1U << ((mmDMA3_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4871 	mask |= 1U << ((mmDMA3_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4872 	mask |= 1U << ((mmDMA3_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4873 	mask |= 1U << ((mmDMA3_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4874 	mask |= 1U << ((mmDMA3_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4875 	mask |= 1U << ((mmDMA3_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4876 	mask |= 1U << ((mmDMA3_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4877 	mask |= 1U << ((mmDMA3_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4879 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4883 	mask = 1U << ((mmDMA3_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4884 	mask |= 1U << ((mmDMA3_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4886 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4890 	mask = 1U << ((mmDMA3_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4891 	mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4892 	mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4893 	mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4894 	mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4895 	mask |= 1U << ((mmDMA3_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4896 	mask |= 1U << ((mmDMA3_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4897 	mask |= 1U << ((mmDMA3_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4898 	mask |= 1U << ((mmDMA3_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4899 	mask |= 1U << ((mmDMA3_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4900 	mask |= 1U << ((mmDMA3_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4901 	mask |= 1U << ((mmDMA3_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4903 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4907 	mask = 1U << ((mmDMA4_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4908 	mask |= 1U << ((mmDMA4_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4909 	mask |= 1U << ((mmDMA4_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4911 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4915 	mask = 1U << ((mmDMA4_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4916 	mask |= 1U << ((mmDMA4_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4917 	mask |= 1U << ((mmDMA4_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4919 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4924 	mask = 1U << ((mmDMA4_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4925 	mask |= 1U << ((mmDMA4_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4926 	mask |= 1U << ((mmDMA4_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4927 	mask |= 1U << ((mmDMA4_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4928 	mask |= 1U << ((mmDMA4_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4929 	mask |= 1U << ((mmDMA4_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4930 	mask |= 1U << ((mmDMA4_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4931 	mask |= 1U << ((mmDMA4_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4932 	mask |= 1U << ((mmDMA4_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4933 	mask |= 1U << ((mmDMA4_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4934 	mask |= 1U << ((mmDMA4_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4935 	mask |= 1U << ((mmDMA4_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4936 	mask |= 1U << ((mmDMA4_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4937 	mask |= 1U << ((mmDMA4_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4938 	mask |= 1U << ((mmDMA4_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4939 	mask |= 1U << ((mmDMA4_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4940 	mask |= 1U << ((mmDMA4_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4941 	mask |= 1U << ((mmDMA4_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4943 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4947 	mask = 1U << ((mmDMA4_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4948 	mask |= 1U << ((mmDMA4_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4950 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4954 	mask = 1U << ((mmDMA4_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4955 	mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4956 	mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4957 	mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4958 	mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4959 	mask |= 1U << ((mmDMA4_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4960 	mask |= 1U << ((mmDMA4_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4961 	mask |= 1U << ((mmDMA4_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4962 	mask |= 1U << ((mmDMA4_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4963 	mask |= 1U << ((mmDMA4_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4964 	mask |= 1U << ((mmDMA4_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4965 	mask |= 1U << ((mmDMA4_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4967 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4971 	mask = 1U << ((mmDMA5_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4972 	mask |= 1U << ((mmDMA5_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4973 	mask |= 1U << ((mmDMA5_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4975 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4979 	mask = 1U << ((mmDMA5_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4980 	mask |= 1U << ((mmDMA5_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4981 	mask |= 1U << ((mmDMA5_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4983 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4988 	mask = 1U << ((mmDMA5_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4989 	mask |= 1U << ((mmDMA5_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4990 	mask |= 1U << ((mmDMA5_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4991 	mask |= 1U << ((mmDMA5_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4992 	mask |= 1U << ((mmDMA5_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4993 	mask |= 1U << ((mmDMA5_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4994 	mask |= 1U << ((mmDMA5_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4995 	mask |= 1U << ((mmDMA5_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4996 	mask |= 1U << ((mmDMA5_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4997 	mask |= 1U << ((mmDMA5_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4998 	mask |= 1U << ((mmDMA5_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4999 	mask |= 1U << ((mmDMA5_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5000 	mask |= 1U << ((mmDMA5_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5001 	mask |= 1U << ((mmDMA5_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5002 	mask |= 1U << ((mmDMA5_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5003 	mask |= 1U << ((mmDMA5_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5004 	mask |= 1U << ((mmDMA5_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5005 	mask |= 1U << ((mmDMA5_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5007 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5011 	mask = 1U << ((mmDMA5_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5012 	mask |= 1U << ((mmDMA5_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5014 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5018 	mask = 1U << ((mmDMA5_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5019 	mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5020 	mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5021 	mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5022 	mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5023 	mask |= 1U << ((mmDMA5_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5024 	mask |= 1U << ((mmDMA5_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5025 	mask |= 1U << ((mmDMA5_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5026 	mask |= 1U << ((mmDMA5_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5027 	mask |= 1U << ((mmDMA5_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5028 	mask |= 1U << ((mmDMA5_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5029 	mask |= 1U << ((mmDMA5_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5031 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5035 	mask = 1U << ((mmDMA6_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5036 	mask |= 1U << ((mmDMA6_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5037 	mask |= 1U << ((mmDMA6_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5039 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5043 	mask = 1U << ((mmDMA6_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5044 	mask |= 1U << ((mmDMA6_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5045 	mask |= 1U << ((mmDMA6_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5047 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5052 	mask = 1U << ((mmDMA6_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5053 	mask |= 1U << ((mmDMA6_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5054 	mask |= 1U << ((mmDMA6_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5055 	mask |= 1U << ((mmDMA6_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5056 	mask |= 1U << ((mmDMA6_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5057 	mask |= 1U << ((mmDMA6_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5058 	mask |= 1U << ((mmDMA6_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5059 	mask |= 1U << ((mmDMA6_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5060 	mask |= 1U << ((mmDMA6_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5061 	mask |= 1U << ((mmDMA6_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5062 	mask |= 1U << ((mmDMA6_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5063 	mask |= 1U << ((mmDMA6_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5064 	mask |= 1U << ((mmDMA6_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5065 	mask |= 1U << ((mmDMA6_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5066 	mask |= 1U << ((mmDMA6_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5067 	mask |= 1U << ((mmDMA6_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5068 	mask |= 1U << ((mmDMA6_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5069 	mask |= 1U << ((mmDMA6_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5071 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5075 	mask = 1U << ((mmDMA6_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5076 	mask |= 1U << ((mmDMA6_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5078 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5082 	mask = 1U << ((mmDMA6_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5083 	mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5084 	mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5085 	mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5086 	mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5087 	mask |= 1U << ((mmDMA6_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5088 	mask |= 1U << ((mmDMA6_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5089 	mask |= 1U << ((mmDMA6_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5090 	mask |= 1U << ((mmDMA6_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5091 	mask |= 1U << ((mmDMA6_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5092 	mask |= 1U << ((mmDMA6_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5093 	mask |= 1U << ((mmDMA6_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5095 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5099 	mask = 1U << ((mmDMA7_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5100 	mask |= 1U << ((mmDMA7_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5101 	mask |= 1U << ((mmDMA7_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5103 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5107 	mask = 1U << ((mmDMA7_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5108 	mask |= 1U << ((mmDMA7_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5109 	mask |= 1U << ((mmDMA7_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5111 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5116 	mask = 1U << ((mmDMA7_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5117 	mask |= 1U << ((mmDMA7_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5118 	mask |= 1U << ((mmDMA7_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5119 	mask |= 1U << ((mmDMA7_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5120 	mask |= 1U << ((mmDMA7_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5121 	mask |= 1U << ((mmDMA7_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5122 	mask |= 1U << ((mmDMA7_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5123 	mask |= 1U << ((mmDMA7_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5124 	mask |= 1U << ((mmDMA7_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5125 	mask |= 1U << ((mmDMA7_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5126 	mask |= 1U << ((mmDMA7_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5127 	mask |= 1U << ((mmDMA7_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5128 	mask |= 1U << ((mmDMA7_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5129 	mask |= 1U << ((mmDMA7_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5130 	mask |= 1U << ((mmDMA7_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5131 	mask |= 1U << ((mmDMA7_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5132 	mask |= 1U << ((mmDMA7_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5133 	mask |= 1U << ((mmDMA7_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5135 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5139 	mask = 1U << ((mmDMA7_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5140 	mask |= 1U << ((mmDMA7_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5142 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5146 	mask = 1U << ((mmDMA7_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5147 	mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5148 	mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5149 	mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5150 	mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5151 	mask |= 1U << ((mmDMA7_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5152 	mask |= 1U << ((mmDMA7_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5153 	mask |= 1U << ((mmDMA7_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5154 	mask |= 1U << ((mmDMA7_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5155 	mask |= 1U << ((mmDMA7_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5156 	mask |= 1U << ((mmDMA7_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5157 	mask |= 1U << ((mmDMA7_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5159 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5164 	u32 pb_addr, mask;  in gaudi_init_nic_protection_bits()  local
5172 	mask = 1U << ((mmNIC0_QM0_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5173 	mask |= 1U << ((mmNIC0_QM0_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5174 	mask |= 1U << ((mmNIC0_QM0_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5175 	mask |= 1U << ((mmNIC0_QM0_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5176 	mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5177 	mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5178 	mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5179 	mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5180 	mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5181 	mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5182 	mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5183 	mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5184 	mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5185 	mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5186 	mask |= 1U << ((mmNIC0_QM0_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5187 	mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5188 	mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5189 	mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5190 	mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5191 	mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5192 	mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5193 	mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5194 	mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5195 	mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5196 	mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5197 	mask |= 1U << ((mmNIC0_QM0_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5198 	mask |= 1U << ((mmNIC0_QM0_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5199 	mask |= 1U << ((mmNIC0_QM0_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5200 	mask |= 1U << ((mmNIC0_QM0_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5202 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5206 	mask = 1U << ((mmNIC0_QM0_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5207 	mask |= 1U << ((mmNIC0_QM0_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5208 	mask |= 1U << ((mmNIC0_QM0_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5209 	mask |= 1U << ((mmNIC0_QM0_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5210 	mask |= 1U << ((mmNIC0_QM0_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5211 	mask |= 1U << ((mmNIC0_QM0_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5212 	mask |= 1U << ((mmNIC0_QM0_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5213 	mask |= 1U << ((mmNIC0_QM0_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5214 	mask |= 1U << ((mmNIC0_QM0_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5215 	mask |= 1U << ((mmNIC0_QM0_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5216 	mask |= 1U << ((mmNIC0_QM0_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5217 	mask |= 1U << ((mmNIC0_QM0_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5218 	mask |= 1U << ((mmNIC0_QM0_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5219 	mask |= 1U << ((mmNIC0_QM0_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5220 	mask |= 1U << ((mmNIC0_QM0_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5221 	mask |= 1U << ((mmNIC0_QM0_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5222 	mask |= 1U << ((mmNIC0_QM0_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5223 	mask |= 1U << ((mmNIC0_QM0_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5224 	mask |= 1U << ((mmNIC0_QM0_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5225 	mask |= 1U << ((mmNIC0_QM0_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5226 	mask |= 1U << ((mmNIC0_QM0_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5227 	mask |= 1U << ((mmNIC0_QM0_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5228 	mask |= 1U << ((mmNIC0_QM0_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5229 	mask |= 1U << ((mmNIC0_QM0_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5230 	mask |= 1U << ((mmNIC0_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5231 	mask |= 1U << ((mmNIC0_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5232 	mask |= 1U << ((mmNIC0_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5233 	mask |= 1U << ((mmNIC0_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5234 	mask |= 1U << ((mmNIC0_QM0_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5235 	mask |= 1U << ((mmNIC0_QM0_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5236 	mask |= 1U << ((mmNIC0_QM0_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5237 	mask |= 1U << ((mmNIC0_QM0_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5239 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5243 	mask = 1U << ((mmNIC0_QM0_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5244 	mask |= 1U << ((mmNIC0_QM0_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5245 	mask |= 1U << ((mmNIC0_QM0_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5246 	mask |= 1U << ((mmNIC0_QM0_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5247 	mask |= 1U << ((mmNIC0_QM0_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5248 	mask |= 1U << ((mmNIC0_QM0_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5249 	mask |= 1U << ((mmNIC0_QM0_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5250 	mask |= 1U << ((mmNIC0_QM0_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5251 	mask |= 1U << ((mmNIC0_QM0_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5252 	mask |= 1U << ((mmNIC0_QM0_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5253 	mask |= 1U << ((mmNIC0_QM0_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5254 	mask |= 1U << ((mmNIC0_QM0_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5255 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5256 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5257 	mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5259 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5263 	mask = 1U << ((mmNIC0_QM0_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5264 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5265 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5266 	mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5267 	mask |= 1U << ((mmNIC0_QM0_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5268 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5269 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5270 	mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5271 	mask |= 1U << ((mmNIC0_QM0_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5272 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5273 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5274 	mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5275 	mask |= 1U << ((mmNIC0_QM0_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5276 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5277 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5278 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5279 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5280 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5281 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5282 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5283 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5284 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5285 	mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5286 	mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5287 	mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5288 	mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5289 	mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5290 	mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5292 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5296 	mask = 1U << ((mmNIC0_QM0_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5297 	mask |= 1U << ((mmNIC0_QM0_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5298 	mask |= 1U << ((mmNIC0_QM0_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5299 	mask |= 1U << ((mmNIC0_QM0_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5300 	mask |= 1U << ((mmNIC0_QM0_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5301 	mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5302 	mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5303 	mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5304 	mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5305 	mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5306 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5307 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5308 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5309 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5310 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5311 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5312 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5313 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5314 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5315 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5316 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5317 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5318 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5319 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5320 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5321 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5322 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5323 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5324 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5325 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5326 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5327 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5329 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5334 	mask = 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5335 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5336 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5337 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5338 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5339 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5340 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5341 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5342 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5343 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5344 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5345 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5346 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5347 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5348 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5349 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5350 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5351 	mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5352 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5353 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5354 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5355 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5356 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5357 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5358 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5359 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5360 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5361 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5362 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5363 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5364 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5366 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5372 	mask = 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5373 	mask |= 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5375 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5379 	mask = 1U << ((mmNIC0_QM0_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5380 	mask |= 1U << ((mmNIC0_QM0_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5381 	mask |= 1U << ((mmNIC0_QM0_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5382 	mask |= 1U << ((mmNIC0_QM0_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5383 	mask |= 1U << ((mmNIC0_QM0_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5384 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5385 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5386 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5387 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5388 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5389 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5390 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5391 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5392 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5393 	mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5394 	mask |= 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5395 	mask |= 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5396 	mask |= 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5398 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5403 	mask = 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5404 	mask |= 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5405 	mask |= 1U << ((mmNIC0_QM0_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5406 	mask |= 1U << ((mmNIC0_QM0_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5408 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5412 	mask = 1U << ((mmNIC0_QM0_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5413 	mask |= 1U << ((mmNIC0_QM0_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5414 	mask |= 1U << ((mmNIC0_QM0_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5415 	mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5416 	mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5417 	mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5418 	mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5419 	mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5420 	mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5421 	mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5422 	mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5423 	mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5424 	mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5426 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5430 	mask = 1U << ((mmNIC0_QM0_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5431 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5432 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5433 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5434 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5435 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5436 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5437 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5438 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5439 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5440 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5441 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5442 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5443 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5444 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5445 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5446 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5447 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5448 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5449 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5450 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5451 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5452 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5453 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5454 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5456 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5461 	mask = 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5462 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5463 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5464 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5465 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5466 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5467 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5468 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5470 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5476 	mask = 1U << ((mmNIC0_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5477 	mask |= 1U << ((mmNIC0_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5478 	mask |= 1U << ((mmNIC0_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5479 	mask |= 1U << ((mmNIC0_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5480 	mask |= 1U << ((mmNIC0_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5482 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5486 	mask = 1U << ((mmNIC0_QM0_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5487 	mask |= 1U << ((mmNIC0_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5488 	mask |= 1U << ((mmNIC0_QM0_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5489 	mask |= 1U << ((mmNIC0_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5490 	mask |= 1U << ((mmNIC0_QM0_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5491 	mask |= 1U << ((mmNIC0_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5492 	mask |= 1U << ((mmNIC0_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5493 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5494 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5495 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5496 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5497 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5498 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5499 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5500 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5501 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5502 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5503 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5504 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5505 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5506 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5507 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5508 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5509 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5510 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5511 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5512 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5514 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5519 	mask = 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5520 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5521 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5522 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5523 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5524 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5525 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5526 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5527 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5528 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5529 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5530 	mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5531 	mask |= 1U << ((mmNIC0_QM0_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5532 	mask |= 1U << ((mmNIC0_QM0_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5533 	mask |= 1U << ((mmNIC0_QM0_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5535 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5540 	mask = 1U << ((mmNIC0_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5541 	mask |= 1U << ((mmNIC0_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5542 	mask |= 1U << ((mmNIC0_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5543 	mask |= 1U << ((mmNIC0_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5544 	mask |= 1U << ((mmNIC0_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5545 	mask |= 1U << ((mmNIC0_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5546 	mask |= 1U << ((mmNIC0_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5547 	mask |= 1U << ((mmNIC0_QM0_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5548 	mask |= 1U << ((mmNIC0_QM0_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5549 	mask |= 1U << ((mmNIC0_QM0_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5550 	mask |= 1U << ((mmNIC0_QM0_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5551 	mask |= 1U << ((mmNIC0_QM0_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5552 	mask |= 1U << ((mmNIC0_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5553 	mask |= 1U << ((mmNIC0_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5554 	mask |= 1U << ((mmNIC0_QM0_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5556 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5561 	mask = 1U << ((mmNIC0_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5563 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5567 	mask = 1U << ((mmNIC0_QM1_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5568 	mask |= 1U << ((mmNIC0_QM1_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5569 	mask |= 1U << ((mmNIC0_QM1_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5570 	mask |= 1U << ((mmNIC0_QM1_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5571 	mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5572 	mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5573 	mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5574 	mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5575 	mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5576 	mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5577 	mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5578 	mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5579 	mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5580 	mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5581 	mask |= 1U << ((mmNIC0_QM1_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5582 	mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5583 	mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5584 	mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5585 	mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5586 	mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5587 	mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5588 	mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5589 	mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5590 	mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5591 	mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5592 	mask |= 1U << ((mmNIC0_QM1_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5593 	mask |= 1U << ((mmNIC0_QM1_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5594 	mask |= 1U << ((mmNIC0_QM1_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5595 	mask |= 1U << ((mmNIC0_QM1_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5597 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5601 	mask = 1U << ((mmNIC0_QM1_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5602 	mask |= 1U << ((mmNIC0_QM1_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5603 	mask |= 1U << ((mmNIC0_QM1_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5604 	mask |= 1U << ((mmNIC0_QM1_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5605 	mask |= 1U << ((mmNIC0_QM1_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5606 	mask |= 1U << ((mmNIC0_QM1_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5607 	mask |= 1U << ((mmNIC0_QM1_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5608 	mask |= 1U << ((mmNIC0_QM1_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5609 	mask |= 1U << ((mmNIC0_QM1_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5610 	mask |= 1U << ((mmNIC0_QM1_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5611 	mask |= 1U << ((mmNIC0_QM1_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5612 	mask |= 1U << ((mmNIC0_QM1_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5613 	mask |= 1U << ((mmNIC0_QM1_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5614 	mask |= 1U << ((mmNIC0_QM1_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5615 	mask |= 1U << ((mmNIC0_QM1_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5616 	mask |= 1U << ((mmNIC0_QM1_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5617 	mask |= 1U << ((mmNIC0_QM1_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5618 	mask |= 1U << ((mmNIC0_QM1_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5619 	mask |= 1U << ((mmNIC0_QM1_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5620 	mask |= 1U << ((mmNIC0_QM1_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5621 	mask |= 1U << ((mmNIC0_QM1_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5622 	mask |= 1U << ((mmNIC0_QM1_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5623 	mask |= 1U << ((mmNIC0_QM1_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5624 	mask |= 1U << ((mmNIC0_QM1_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5625 	mask |= 1U << ((mmNIC0_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5626 	mask |= 1U << ((mmNIC0_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5627 	mask |= 1U << ((mmNIC0_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5628 	mask |= 1U << ((mmNIC0_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5629 	mask |= 1U << ((mmNIC0_QM1_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5630 	mask |= 1U << ((mmNIC0_QM1_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5631 	mask |= 1U << ((mmNIC0_QM1_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5632 	mask |= 1U << ((mmNIC0_QM1_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5634 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5638 	mask = 1U << ((mmNIC0_QM1_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5639 	mask |= 1U << ((mmNIC0_QM1_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5640 	mask |= 1U << ((mmNIC0_QM1_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5641 	mask |= 1U << ((mmNIC0_QM1_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5642 	mask |= 1U << ((mmNIC0_QM1_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5643 	mask |= 1U << ((mmNIC0_QM1_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5644 	mask |= 1U << ((mmNIC0_QM1_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5645 	mask |= 1U << ((mmNIC0_QM1_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5646 	mask |= 1U << ((mmNIC0_QM1_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5647 	mask |= 1U << ((mmNIC0_QM1_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5648 	mask |= 1U << ((mmNIC0_QM1_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5649 	mask |= 1U << ((mmNIC0_QM1_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5650 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5651 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5652 	mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5654 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5658 	mask = 1U << ((mmNIC0_QM1_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5659 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5660 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5661 	mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5662 	mask |= 1U << ((mmNIC0_QM1_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5663 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5664 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5665 	mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5666 	mask |= 1U << ((mmNIC0_QM1_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5667 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5668 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5669 	mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5670 	mask |= 1U << ((mmNIC0_QM1_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5671 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5672 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5673 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5674 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5675 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5676 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5677 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5678 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5679 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5680 	mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5681 	mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5682 	mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5683 	mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5684 	mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5685 	mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5687 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5691 	mask = 1U << ((mmNIC0_QM1_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5692 	mask |= 1U << ((mmNIC0_QM1_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5693 	mask |= 1U << ((mmNIC0_QM1_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5694 	mask |= 1U << ((mmNIC0_QM1_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5695 	mask |= 1U << ((mmNIC0_QM1_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5696 	mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5697 	mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5698 	mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5699 	mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5700 	mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5701 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5702 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5703 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5704 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5705 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5706 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5707 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5708 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5709 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5710 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5711 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5712 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5713 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5714 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5715 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5716 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5717 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5718 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5719 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5720 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5721 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5722 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5724 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5729 	mask = 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5730 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5731 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5732 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5733 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5734 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5735 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5736 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5737 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5738 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5739 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5740 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5741 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5742 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5743 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5744 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5745 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5746 	mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5747 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5748 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5749 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5750 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5751 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5752 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5753 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5754 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5755 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5756 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5757 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5758 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5759 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5761 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5767 	mask = 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5768 	mask |= 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5770 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5774 	mask = 1U << ((mmNIC0_QM1_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5775 	mask |= 1U << ((mmNIC0_QM1_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5776 	mask |= 1U << ((mmNIC0_QM1_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5777 	mask |= 1U << ((mmNIC0_QM1_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5778 	mask |= 1U << ((mmNIC0_QM1_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5779 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5780 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5781 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5782 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5783 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5784 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5785 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5786 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5787 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5788 	mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5789 	mask |= 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5790 	mask |= 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5791 	mask |= 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5793 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5798 	mask = 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5799 	mask |= 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5800 	mask |= 1U << ((mmNIC0_QM1_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5801 	mask |= 1U << ((mmNIC0_QM1_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5803 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5807 	mask = 1U << ((mmNIC0_QM1_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5808 	mask |= 1U << ((mmNIC0_QM1_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5809 	mask |= 1U << ((mmNIC0_QM1_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5810 	mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5811 	mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5812 	mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5813 	mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5814 	mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5815 	mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5816 	mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5817 	mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5818 	mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5819 	mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5821 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5825 	mask = 1U << ((mmNIC0_QM1_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5826 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5827 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5828 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5829 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5830 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5831 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5832 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5833 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5834 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5835 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5836 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5837 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5838 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5839 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5840 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5841 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5842 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5843 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5844 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5845 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5846 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5847 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5848 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5849 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5851 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5856 	mask = 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5857 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5858 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5859 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5860 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5861 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5862 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5863 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5865 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5871 	mask = 1U << ((mmNIC0_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5872 	mask |= 1U << ((mmNIC0_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5873 	mask |= 1U << ((mmNIC0_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5874 	mask |= 1U << ((mmNIC0_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5875 	mask |= 1U << ((mmNIC0_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5877 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5881 	mask = 1U << ((mmNIC0_QM1_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5882 	mask |= 1U << ((mmNIC0_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5883 	mask |= 1U << ((mmNIC0_QM1_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5884 	mask |= 1U << ((mmNIC0_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5885 	mask |= 1U << ((mmNIC0_QM1_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5886 	mask |= 1U << ((mmNIC0_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5887 	mask |= 1U << ((mmNIC0_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5888 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5889 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5890 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5891 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5892 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5893 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5894 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5895 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5896 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5897 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5898 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5899 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5900 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5901 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5902 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5903 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5904 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5905 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5906 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5907 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5909 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5914 	mask = 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5915 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5916 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5917 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5918 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5919 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5920 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5921 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5922 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5923 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5924 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5925 	mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5926 	mask |= 1U << ((mmNIC0_QM1_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5927 	mask |= 1U << ((mmNIC0_QM1_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5928 	mask |= 1U << ((mmNIC0_QM1_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5930 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5935 	mask = 1U << ((mmNIC0_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5936 	mask |= 1U << ((mmNIC0_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5937 	mask |= 1U << ((mmNIC0_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5938 	mask |= 1U << ((mmNIC0_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5939 	mask |= 1U << ((mmNIC0_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5940 	mask |= 1U << ((mmNIC0_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5941 	mask |= 1U << ((mmNIC0_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5942 	mask |= 1U << ((mmNIC0_QM1_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5943 	mask |= 1U << ((mmNIC0_QM1_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5944 	mask |= 1U << ((mmNIC0_QM1_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5945 	mask |= 1U << ((mmNIC0_QM1_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5946 	mask |= 1U << ((mmNIC0_QM1_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5947 	mask |= 1U << ((mmNIC0_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5948 	mask |= 1U << ((mmNIC0_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5949 	mask |= 1U << ((mmNIC0_QM1_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5951 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5956 	mask = 1U << ((mmNIC0_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5958 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5965 	mask = 1U << ((mmNIC1_QM0_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5966 	mask |= 1U << ((mmNIC1_QM0_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5967 	mask |= 1U << ((mmNIC1_QM0_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5968 	mask |= 1U << ((mmNIC1_QM0_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5969 	mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5970 	mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5971 	mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5972 	mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5973 	mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5974 	mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5975 	mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5976 	mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5977 	mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5978 	mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5979 	mask |= 1U << ((mmNIC1_QM0_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5980 	mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5981 	mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5982 	mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5983 	mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5984 	mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5985 	mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5986 	mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5987 	mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5988 	mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5989 	mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5990 	mask |= 1U << ((mmNIC1_QM0_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5991 	mask |= 1U << ((mmNIC1_QM0_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5992 	mask |= 1U << ((mmNIC1_QM0_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5993 	mask |= 1U << ((mmNIC1_QM0_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
5995 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
5999 	mask = 1U << ((mmNIC1_QM0_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6000 	mask |= 1U << ((mmNIC1_QM0_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6001 	mask |= 1U << ((mmNIC1_QM0_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6002 	mask |= 1U << ((mmNIC1_QM0_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6003 	mask |= 1U << ((mmNIC1_QM0_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6004 	mask |= 1U << ((mmNIC1_QM0_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6005 	mask |= 1U << ((mmNIC1_QM0_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6006 	mask |= 1U << ((mmNIC1_QM0_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6007 	mask |= 1U << ((mmNIC1_QM0_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6008 	mask |= 1U << ((mmNIC1_QM0_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6009 	mask |= 1U << ((mmNIC1_QM0_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6010 	mask |= 1U << ((mmNIC1_QM0_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6011 	mask |= 1U << ((mmNIC1_QM0_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6012 	mask |= 1U << ((mmNIC1_QM0_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6013 	mask |= 1U << ((mmNIC1_QM0_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6014 	mask |= 1U << ((mmNIC1_QM0_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6015 	mask |= 1U << ((mmNIC1_QM0_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6016 	mask |= 1U << ((mmNIC1_QM0_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6017 	mask |= 1U << ((mmNIC1_QM0_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6018 	mask |= 1U << ((mmNIC1_QM0_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6019 	mask |= 1U << ((mmNIC1_QM0_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6020 	mask |= 1U << ((mmNIC1_QM0_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6021 	mask |= 1U << ((mmNIC1_QM0_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6022 	mask |= 1U << ((mmNIC1_QM0_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6023 	mask |= 1U << ((mmNIC1_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6024 	mask |= 1U << ((mmNIC1_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6025 	mask |= 1U << ((mmNIC1_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6026 	mask |= 1U << ((mmNIC1_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6027 	mask |= 1U << ((mmNIC1_QM0_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6028 	mask |= 1U << ((mmNIC1_QM0_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6029 	mask |= 1U << ((mmNIC1_QM0_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6030 	mask |= 1U << ((mmNIC1_QM0_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6032 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6036 	mask = 1U << ((mmNIC1_QM0_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6037 	mask |= 1U << ((mmNIC1_QM0_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6038 	mask |= 1U << ((mmNIC1_QM0_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6039 	mask |= 1U << ((mmNIC1_QM0_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6040 	mask |= 1U << ((mmNIC1_QM0_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6041 	mask |= 1U << ((mmNIC1_QM0_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6042 	mask |= 1U << ((mmNIC1_QM0_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6043 	mask |= 1U << ((mmNIC1_QM0_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6044 	mask |= 1U << ((mmNIC1_QM0_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6045 	mask |= 1U << ((mmNIC1_QM0_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6046 	mask |= 1U << ((mmNIC1_QM0_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6047 	mask |= 1U << ((mmNIC1_QM0_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6048 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6049 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6050 	mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6052 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6056 	mask = 1U << ((mmNIC1_QM0_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6057 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6058 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6059 	mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6060 	mask |= 1U << ((mmNIC1_QM0_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6061 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6062 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6063 	mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6064 	mask |= 1U << ((mmNIC1_QM0_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6065 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6066 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6067 	mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6068 	mask |= 1U << ((mmNIC1_QM0_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6069 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6070 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6071 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6072 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6073 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6074 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6075 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6076 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6077 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6078 	mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6079 	mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6080 	mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6081 	mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6082 	mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6083 	mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6085 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6089 	mask = 1U << ((mmNIC1_QM0_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6090 	mask |= 1U << ((mmNIC1_QM0_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6091 	mask |= 1U << ((mmNIC1_QM0_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6092 	mask |= 1U << ((mmNIC1_QM0_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6093 	mask |= 1U << ((mmNIC1_QM0_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6094 	mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6095 	mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6096 	mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6097 	mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6098 	mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6099 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6100 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6101 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6102 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6103 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6104 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6105 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6106 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6107 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6108 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6109 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6110 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6111 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6112 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6113 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6114 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6115 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6116 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6117 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6118 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6119 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6120 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6122 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6127 	mask = 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6128 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6129 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6130 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6131 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6132 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6133 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6134 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6135 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6136 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6137 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6138 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6139 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6140 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6141 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6142 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6143 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6144 	mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6145 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6146 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6147 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6148 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6149 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6150 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6151 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6152 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6153 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6154 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6155 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6156 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6157 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6159 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6165 	mask = 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6166 	mask |= 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6168 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6172 	mask = 1U << ((mmNIC1_QM0_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6173 	mask |= 1U << ((mmNIC1_QM0_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6174 	mask |= 1U << ((mmNIC1_QM0_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6175 	mask |= 1U << ((mmNIC1_QM0_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6176 	mask |= 1U << ((mmNIC1_QM0_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6177 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6178 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6179 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6180 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6181 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6182 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6183 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6184 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6185 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6186 	mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6187 	mask |= 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6188 	mask |= 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6189 	mask |= 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6191 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6196 	mask = 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6197 	mask |= 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6198 	mask |= 1U << ((mmNIC1_QM0_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6199 	mask |= 1U << ((mmNIC1_QM0_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6201 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6205 	mask = 1U << ((mmNIC1_QM0_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6206 	mask |= 1U << ((mmNIC1_QM0_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6207 	mask |= 1U << ((mmNIC1_QM0_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6208 	mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6209 	mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6210 	mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6211 	mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6212 	mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6213 	mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6214 	mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6215 	mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6216 	mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6217 	mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6219 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6223 	mask = 1U << ((mmNIC1_QM0_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6224 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6225 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6226 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6227 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6228 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6229 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6230 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6231 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6232 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6233 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6234 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6235 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6236 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6237 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6238 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6239 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6240 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6241 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6242 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6243 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6244 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6245 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6246 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6247 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6249 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6254 	mask = 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6255 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6256 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6257 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6258 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6259 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6260 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6261 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6263 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6269 	mask = 1U << ((mmNIC1_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6270 	mask |= 1U << ((mmNIC1_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6271 	mask |= 1U << ((mmNIC1_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6272 	mask |= 1U << ((mmNIC1_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6273 	mask |= 1U << ((mmNIC1_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6274 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6278 	mask = 1U << ((mmNIC1_QM0_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6279 	mask |= 1U << ((mmNIC1_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6280 	mask |= 1U << ((mmNIC1_QM0_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6281 	mask |= 1U << ((mmNIC1_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6282 	mask |= 1U << ((mmNIC1_QM0_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6283 	mask |= 1U << ((mmNIC1_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6284 	mask |= 1U << ((mmNIC1_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6285 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6286 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6287 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6288 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6289 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6290 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6291 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6292 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6293 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6294 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6295 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6296 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6297 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6298 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6299 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6300 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6301 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6302 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6303 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6304 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6306 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6311 	mask = 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6312 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6313 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6314 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6315 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6316 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6317 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6318 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6319 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6320 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6321 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6322 	mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6323 	mask |= 1U << ((mmNIC1_QM0_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6324 	mask |= 1U << ((mmNIC1_QM0_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6325 	mask |= 1U << ((mmNIC1_QM0_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6327 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6332 	mask = 1U << ((mmNIC1_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6333 	mask |= 1U << ((mmNIC1_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6334 	mask |= 1U << ((mmNIC1_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6335 	mask |= 1U << ((mmNIC1_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6336 	mask |= 1U << ((mmNIC1_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6337 	mask |= 1U << ((mmNIC1_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6338 	mask |= 1U << ((mmNIC1_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6339 	mask |= 1U << ((mmNIC1_QM0_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6340 	mask |= 1U << ((mmNIC1_QM0_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6341 	mask |= 1U << ((mmNIC1_QM0_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6342 	mask |= 1U << ((mmNIC1_QM0_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6343 	mask |= 1U << ((mmNIC1_QM0_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6344 	mask |= 1U << ((mmNIC1_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6345 	mask |= 1U << ((mmNIC1_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6346 	mask |= 1U << ((mmNIC1_QM0_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6348 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6353 	mask = 1U << ((mmNIC1_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6355 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6359 	mask = 1U << ((mmNIC1_QM1_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6360 	mask |= 1U << ((mmNIC1_QM1_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6361 	mask |= 1U << ((mmNIC1_QM1_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6362 	mask |= 1U << ((mmNIC1_QM1_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6363 	mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6364 	mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6365 	mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6366 	mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6367 	mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6368 	mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6369 	mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6370 	mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6371 	mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6372 	mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6373 	mask |= 1U << ((mmNIC1_QM1_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6374 	mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6375 	mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6376 	mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6377 	mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6378 	mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6379 	mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6380 	mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6381 	mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6382 	mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6383 	mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6384 	mask |= 1U << ((mmNIC1_QM1_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6385 	mask |= 1U << ((mmNIC1_QM1_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6386 	mask |= 1U << ((mmNIC1_QM1_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6387 	mask |= 1U << ((mmNIC1_QM1_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6389 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6393 	mask = 1U << ((mmNIC1_QM1_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6394 	mask |= 1U << ((mmNIC1_QM1_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6395 	mask |= 1U << ((mmNIC1_QM1_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6396 	mask |= 1U << ((mmNIC1_QM1_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6397 	mask |= 1U << ((mmNIC1_QM1_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6398 	mask |= 1U << ((mmNIC1_QM1_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6399 	mask |= 1U << ((mmNIC1_QM1_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6400 	mask |= 1U << ((mmNIC1_QM1_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6401 	mask |= 1U << ((mmNIC1_QM1_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6402 	mask |= 1U << ((mmNIC1_QM1_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6403 	mask |= 1U << ((mmNIC1_QM1_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6404 	mask |= 1U << ((mmNIC1_QM1_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6405 	mask |= 1U << ((mmNIC1_QM1_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6406 	mask |= 1U << ((mmNIC1_QM1_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6407 	mask |= 1U << ((mmNIC1_QM1_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6408 	mask |= 1U << ((mmNIC1_QM1_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6409 	mask |= 1U << ((mmNIC1_QM1_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6410 	mask |= 1U << ((mmNIC1_QM1_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6411 	mask |= 1U << ((mmNIC1_QM1_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6412 	mask |= 1U << ((mmNIC1_QM1_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6413 	mask |= 1U << ((mmNIC1_QM1_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6414 	mask |= 1U << ((mmNIC1_QM1_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6415 	mask |= 1U << ((mmNIC1_QM1_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6416 	mask |= 1U << ((mmNIC1_QM1_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6417 	mask |= 1U << ((mmNIC1_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6418 	mask |= 1U << ((mmNIC1_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6419 	mask |= 1U << ((mmNIC1_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6420 	mask |= 1U << ((mmNIC1_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6421 	mask |= 1U << ((mmNIC1_QM1_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6422 	mask |= 1U << ((mmNIC1_QM1_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6423 	mask |= 1U << ((mmNIC1_QM1_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6424 	mask |= 1U << ((mmNIC1_QM1_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6426 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6430 	mask = 1U << ((mmNIC1_QM1_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6431 	mask |= 1U << ((mmNIC1_QM1_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6432 	mask |= 1U << ((mmNIC1_QM1_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6433 	mask |= 1U << ((mmNIC1_QM1_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6434 	mask |= 1U << ((mmNIC1_QM1_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6435 	mask |= 1U << ((mmNIC1_QM1_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6436 	mask |= 1U << ((mmNIC1_QM1_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6437 	mask |= 1U << ((mmNIC1_QM1_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6438 	mask |= 1U << ((mmNIC1_QM1_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6439 	mask |= 1U << ((mmNIC1_QM1_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6440 	mask |= 1U << ((mmNIC1_QM1_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6441 	mask |= 1U << ((mmNIC1_QM1_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6442 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6443 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6444 	mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6446 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6450 	mask = 1U << ((mmNIC1_QM1_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6451 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6452 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6453 	mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6454 	mask |= 1U << ((mmNIC1_QM1_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6455 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6456 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6457 	mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6458 	mask |= 1U << ((mmNIC1_QM1_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6459 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6460 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6461 	mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6462 	mask |= 1U << ((mmNIC1_QM1_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6463 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6464 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6465 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6466 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6467 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6468 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6469 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6470 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6471 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6472 	mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6473 	mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6474 	mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6475 	mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6476 	mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6477 	mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6479 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6483 	mask = 1U << ((mmNIC1_QM1_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6484 	mask |= 1U << ((mmNIC1_QM1_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6485 	mask |= 1U << ((mmNIC1_QM1_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6486 	mask |= 1U << ((mmNIC1_QM1_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6487 	mask |= 1U << ((mmNIC1_QM1_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6488 	mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6489 	mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6490 	mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6491 	mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6492 	mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6493 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6494 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6495 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6496 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6497 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6498 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6499 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6500 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6501 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6502 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6503 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6504 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6505 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6506 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6507 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6508 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6509 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6510 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6511 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6512 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6513 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6514 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6516 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6521 	mask = 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6522 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6523 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6524 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6525 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6526 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6527 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6528 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6529 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6530 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6531 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6532 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6533 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6534 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6535 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6536 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6537 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6538 	mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6539 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6540 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6541 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6542 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6543 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6544 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6545 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6546 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6547 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6548 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6549 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6550 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6551 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6553 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6559 	mask = 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6560 	mask |= 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6562 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6566 	mask = 1U << ((mmNIC1_QM1_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6567 	mask |= 1U << ((mmNIC1_QM1_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6568 	mask |= 1U << ((mmNIC1_QM1_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6569 	mask |= 1U << ((mmNIC1_QM1_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6570 	mask |= 1U << ((mmNIC1_QM1_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6571 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6572 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6573 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6574 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6575 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6576 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6577 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6578 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6579 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6580 	mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6581 	mask |= 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6582 	mask |= 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6583 	mask |= 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6585 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6590 	mask = 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6591 	mask |= 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6592 	mask |= 1U << ((mmNIC1_QM1_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6593 	mask |= 1U << ((mmNIC1_QM1_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6595 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6599 	mask = 1U << ((mmNIC1_QM1_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6600 	mask |= 1U << ((mmNIC1_QM1_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6601 	mask |= 1U << ((mmNIC1_QM1_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6602 	mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6603 	mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6604 	mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6605 	mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6606 	mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6607 	mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6608 	mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6609 	mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6610 	mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6611 	mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6613 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6617 	mask = 1U << ((mmNIC1_QM1_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6618 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6619 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6620 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6621 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6622 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6623 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6624 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6625 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6626 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6627 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6628 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6629 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6630 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6631 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6632 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6633 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6634 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6635 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6636 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6637 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6638 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6639 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6640 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6641 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6643 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6648 	mask = 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6649 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6650 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6651 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6652 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6653 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6654 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6655 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6657 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6663 	mask = 1U << ((mmNIC1_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6664 	mask |= 1U << ((mmNIC1_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6665 	mask |= 1U << ((mmNIC1_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6666 	mask |= 1U << ((mmNIC1_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6667 	mask |= 1U << ((mmNIC1_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6669 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6673 	mask = 1U << ((mmNIC1_QM1_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6674 	mask |= 1U << ((mmNIC1_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6675 	mask |= 1U << ((mmNIC1_QM1_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6676 	mask |= 1U << ((mmNIC1_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6677 	mask |= 1U << ((mmNIC1_QM1_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6678 	mask |= 1U << ((mmNIC1_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6679 	mask |= 1U << ((mmNIC1_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6680 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6681 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6682 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6683 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6684 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6685 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6686 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6687 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6688 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6689 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6690 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6691 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6692 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6693 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6694 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6695 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6696 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6697 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6698 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6699 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6701 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6706 	mask = 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6707 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6708 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6709 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6710 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6711 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6712 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6713 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6714 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6715 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6716 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6717 	mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6718 	mask |= 1U << ((mmNIC1_QM1_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6719 	mask |= 1U << ((mmNIC1_QM1_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6720 	mask |= 1U << ((mmNIC1_QM1_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6722 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6727 	mask = 1U << ((mmNIC1_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6728 	mask |= 1U << ((mmNIC1_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6729 	mask |= 1U << ((mmNIC1_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6730 	mask |= 1U << ((mmNIC1_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6731 	mask |= 1U << ((mmNIC1_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6732 	mask |= 1U << ((mmNIC1_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6733 	mask |= 1U << ((mmNIC1_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6734 	mask |= 1U << ((mmNIC1_QM1_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6735 	mask |= 1U << ((mmNIC1_QM1_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6736 	mask |= 1U << ((mmNIC1_QM1_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6737 	mask |= 1U << ((mmNIC1_QM1_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6738 	mask |= 1U << ((mmNIC1_QM1_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6739 	mask |= 1U << ((mmNIC1_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6740 	mask |= 1U << ((mmNIC1_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6741 	mask |= 1U << ((mmNIC1_QM1_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6743 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6748 	mask = 1U << ((mmNIC1_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6750 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6757 	mask = 1U << ((mmNIC2_QM0_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6758 	mask |= 1U << ((mmNIC2_QM0_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6759 	mask |= 1U << ((mmNIC2_QM0_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6760 	mask |= 1U << ((mmNIC2_QM0_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6761 	mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6762 	mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6763 	mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6764 	mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6765 	mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6766 	mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6767 	mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6768 	mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6769 	mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6770 	mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6771 	mask |= 1U << ((mmNIC2_QM0_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6772 	mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6773 	mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6774 	mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6775 	mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6776 	mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6777 	mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6778 	mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6779 	mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6780 	mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6781 	mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6782 	mask |= 1U << ((mmNIC2_QM0_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6783 	mask |= 1U << ((mmNIC2_QM0_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6784 	mask |= 1U << ((mmNIC2_QM0_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6785 	mask |= 1U << ((mmNIC2_QM0_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6787 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6791 	mask = 1U << ((mmNIC2_QM0_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6792 	mask |= 1U << ((mmNIC2_QM0_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6793 	mask |= 1U << ((mmNIC2_QM0_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6794 	mask |= 1U << ((mmNIC2_QM0_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6795 	mask |= 1U << ((mmNIC2_QM0_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6796 	mask |= 1U << ((mmNIC2_QM0_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6797 	mask |= 1U << ((mmNIC2_QM0_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6798 	mask |= 1U << ((mmNIC2_QM0_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6799 	mask |= 1U << ((mmNIC2_QM0_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6800 	mask |= 1U << ((mmNIC2_QM0_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6801 	mask |= 1U << ((mmNIC2_QM0_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6802 	mask |= 1U << ((mmNIC2_QM0_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6803 	mask |= 1U << ((mmNIC2_QM0_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6804 	mask |= 1U << ((mmNIC2_QM0_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6805 	mask |= 1U << ((mmNIC2_QM0_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6806 	mask |= 1U << ((mmNIC2_QM0_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6807 	mask |= 1U << ((mmNIC2_QM0_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6808 	mask |= 1U << ((mmNIC2_QM0_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6809 	mask |= 1U << ((mmNIC2_QM0_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6810 	mask |= 1U << ((mmNIC2_QM0_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6811 	mask |= 1U << ((mmNIC2_QM0_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6812 	mask |= 1U << ((mmNIC2_QM0_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6813 	mask |= 1U << ((mmNIC2_QM0_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6814 	mask |= 1U << ((mmNIC2_QM0_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6815 	mask |= 1U << ((mmNIC2_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6816 	mask |= 1U << ((mmNIC2_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6817 	mask |= 1U << ((mmNIC2_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6818 	mask |= 1U << ((mmNIC2_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6819 	mask |= 1U << ((mmNIC2_QM0_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6820 	mask |= 1U << ((mmNIC2_QM0_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6821 	mask |= 1U << ((mmNIC2_QM0_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6822 	mask |= 1U << ((mmNIC2_QM0_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6824 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6828 	mask = 1U << ((mmNIC2_QM0_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6829 	mask |= 1U << ((mmNIC2_QM0_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6830 	mask |= 1U << ((mmNIC2_QM0_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6831 	mask |= 1U << ((mmNIC2_QM0_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6832 	mask |= 1U << ((mmNIC2_QM0_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6833 	mask |= 1U << ((mmNIC2_QM0_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6834 	mask |= 1U << ((mmNIC2_QM0_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6835 	mask |= 1U << ((mmNIC2_QM0_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6836 	mask |= 1U << ((mmNIC2_QM0_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6837 	mask |= 1U << ((mmNIC2_QM0_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6838 	mask |= 1U << ((mmNIC2_QM0_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6839 	mask |= 1U << ((mmNIC2_QM0_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6840 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6841 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6842 	mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6844 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6848 	mask = 1U << ((mmNIC2_QM0_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6849 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6850 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6851 	mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6852 	mask |= 1U << ((mmNIC2_QM0_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6853 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6854 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6855 	mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6856 	mask |= 1U << ((mmNIC2_QM0_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6857 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6858 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6859 	mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6860 	mask |= 1U << ((mmNIC2_QM0_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6861 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6862 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6863 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6864 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6865 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6866 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6867 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6868 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6869 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6870 	mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6871 	mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6872 	mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6873 	mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6874 	mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6875 	mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6877 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6881 	mask = 1U << ((mmNIC2_QM0_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6882 	mask |= 1U << ((mmNIC2_QM0_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6883 	mask |= 1U << ((mmNIC2_QM0_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6884 	mask |= 1U << ((mmNIC2_QM0_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6885 	mask |= 1U << ((mmNIC2_QM0_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6886 	mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6887 	mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6888 	mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6889 	mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6890 	mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6891 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6892 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6893 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6894 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6895 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6896 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6897 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6898 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6899 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6900 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6901 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6902 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6903 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6904 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6905 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6906 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6907 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6908 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6909 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6910 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6911 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6912 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6914 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6920 	mask = 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6921 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6922 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6923 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6924 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6925 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6926 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6927 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6928 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6929 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6930 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6931 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6932 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6933 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6934 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6935 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6936 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6937 	mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6938 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6939 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6940 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6941 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6942 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6943 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6944 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6945 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6946 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6947 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6948 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6949 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6950 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6952 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6958 	mask = 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6959 	mask |= 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6961 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6965 	mask = 1U << ((mmNIC2_QM0_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6966 	mask |= 1U << ((mmNIC2_QM0_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6967 	mask |= 1U << ((mmNIC2_QM0_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6968 	mask |= 1U << ((mmNIC2_QM0_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6969 	mask |= 1U << ((mmNIC2_QM0_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6970 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6971 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6972 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6973 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6974 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6975 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6976 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6977 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6978 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6979 	mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6980 	mask |= 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6981 	mask |= 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6982 	mask |= 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6984 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6989 	mask = 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6990 	mask |= 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6991 	mask |= 1U << ((mmNIC2_QM0_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6992 	mask |= 1U << ((mmNIC2_QM0_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6994 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
6998 	mask = 1U << ((mmNIC2_QM0_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
6999 	mask |= 1U << ((mmNIC2_QM0_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7000 	mask |= 1U << ((mmNIC2_QM0_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7001 	mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7002 	mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7003 	mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7004 	mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7005 	mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7006 	mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7007 	mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7008 	mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7009 	mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7010 	mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7012 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7016 	mask = 1U << ((mmNIC2_QM0_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7017 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7018 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7019 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7020 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7021 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7022 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7023 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7024 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7025 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7026 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7027 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7028 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7029 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7030 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7031 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7032 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7033 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7034 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7035 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7036 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7037 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7038 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7039 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7040 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7042 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7047 	mask = 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7048 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7049 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7050 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7051 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7052 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7053 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7054 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7056 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7062 	mask = 1U << ((mmNIC2_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7063 	mask |= 1U << ((mmNIC2_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7064 	mask |= 1U << ((mmNIC2_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7065 	mask |= 1U << ((mmNIC2_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7066 	mask |= 1U << ((mmNIC2_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7068 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7072 	mask = 1U << ((mmNIC2_QM0_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7073 	mask |= 1U << ((mmNIC2_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7074 	mask |= 1U << ((mmNIC2_QM0_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7075 	mask |= 1U << ((mmNIC2_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7076 	mask |= 1U << ((mmNIC2_QM0_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7077 	mask |= 1U << ((mmNIC2_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7078 	mask |= 1U << ((mmNIC2_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7079 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7080 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7081 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7082 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7083 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7084 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7085 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7086 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7087 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7088 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7089 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7090 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7091 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7092 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7093 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7094 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7095 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7096 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7097 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7098 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7100 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7105 	mask = 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7106 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7107 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7108 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7109 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7110 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7111 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7112 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7113 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7114 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7115 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7116 	mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7117 	mask |= 1U << ((mmNIC2_QM0_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7118 	mask |= 1U << ((mmNIC2_QM0_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7119 	mask |= 1U << ((mmNIC2_QM0_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7121 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7126 	mask = 1U << ((mmNIC2_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7127 	mask |= 1U << ((mmNIC2_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7128 	mask |= 1U << ((mmNIC2_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7129 	mask |= 1U << ((mmNIC2_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7130 	mask |= 1U << ((mmNIC2_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7131 	mask |= 1U << ((mmNIC2_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7132 	mask |= 1U << ((mmNIC2_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7133 	mask |= 1U << ((mmNIC2_QM0_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7134 	mask |= 1U << ((mmNIC2_QM0_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7135 	mask |= 1U << ((mmNIC2_QM0_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7136 	mask |= 1U << ((mmNIC2_QM0_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7137 	mask |= 1U << ((mmNIC2_QM0_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7138 	mask |= 1U << ((mmNIC2_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7139 	mask |= 1U << ((mmNIC2_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7140 	mask |= 1U << ((mmNIC2_QM0_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7142 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7147 	mask = 1U << ((mmNIC2_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7149 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7153 	mask = 1U << ((mmNIC2_QM1_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7154 	mask |= 1U << ((mmNIC2_QM1_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7155 	mask |= 1U << ((mmNIC2_QM1_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7156 	mask |= 1U << ((mmNIC2_QM1_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7157 	mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7158 	mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7159 	mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7160 	mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7161 	mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7162 	mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7163 	mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7164 	mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7165 	mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7166 	mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7167 	mask |= 1U << ((mmNIC2_QM1_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7168 	mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7169 	mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7170 	mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7171 	mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7172 	mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7173 	mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7174 	mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7175 	mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7176 	mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7177 	mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7178 	mask |= 1U << ((mmNIC2_QM1_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7179 	mask |= 1U << ((mmNIC2_QM1_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7180 	mask |= 1U << ((mmNIC2_QM1_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7181 	mask |= 1U << ((mmNIC2_QM1_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7183 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7187 	mask = 1U << ((mmNIC2_QM1_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7188 	mask |= 1U << ((mmNIC2_QM1_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7189 	mask |= 1U << ((mmNIC2_QM1_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7190 	mask |= 1U << ((mmNIC2_QM1_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7191 	mask |= 1U << ((mmNIC2_QM1_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7192 	mask |= 1U << ((mmNIC2_QM1_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7193 	mask |= 1U << ((mmNIC2_QM1_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7194 	mask |= 1U << ((mmNIC2_QM1_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7195 	mask |= 1U << ((mmNIC2_QM1_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7196 	mask |= 1U << ((mmNIC2_QM1_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7197 	mask |= 1U << ((mmNIC2_QM1_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7198 	mask |= 1U << ((mmNIC2_QM1_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7199 	mask |= 1U << ((mmNIC2_QM1_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7200 	mask |= 1U << ((mmNIC2_QM1_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7201 	mask |= 1U << ((mmNIC2_QM1_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7202 	mask |= 1U << ((mmNIC2_QM1_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7203 	mask |= 1U << ((mmNIC2_QM1_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7204 	mask |= 1U << ((mmNIC2_QM1_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7205 	mask |= 1U << ((mmNIC2_QM1_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7206 	mask |= 1U << ((mmNIC2_QM1_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7207 	mask |= 1U << ((mmNIC2_QM1_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7208 	mask |= 1U << ((mmNIC2_QM1_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7209 	mask |= 1U << ((mmNIC2_QM1_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7210 	mask |= 1U << ((mmNIC2_QM1_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7211 	mask |= 1U << ((mmNIC2_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7212 	mask |= 1U << ((mmNIC2_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7213 	mask |= 1U << ((mmNIC2_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7214 	mask |= 1U << ((mmNIC2_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7215 	mask |= 1U << ((mmNIC2_QM1_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7216 	mask |= 1U << ((mmNIC2_QM1_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7217 	mask |= 1U << ((mmNIC2_QM1_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7218 	mask |= 1U << ((mmNIC2_QM1_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7220 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7224 	mask = 1U << ((mmNIC2_QM1_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7225 	mask |= 1U << ((mmNIC2_QM1_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7226 	mask |= 1U << ((mmNIC2_QM1_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7227 	mask |= 1U << ((mmNIC2_QM1_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7228 	mask |= 1U << ((mmNIC2_QM1_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7229 	mask |= 1U << ((mmNIC2_QM1_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7230 	mask |= 1U << ((mmNIC2_QM1_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7231 	mask |= 1U << ((mmNIC2_QM1_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7232 	mask |= 1U << ((mmNIC2_QM1_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7233 	mask |= 1U << ((mmNIC2_QM1_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7234 	mask |= 1U << ((mmNIC2_QM1_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7235 	mask |= 1U << ((mmNIC2_QM1_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7236 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7237 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7238 	mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7240 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7244 	mask = 1U << ((mmNIC2_QM1_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7245 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7246 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7247 	mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7248 	mask |= 1U << ((mmNIC2_QM1_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7249 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7250 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7251 	mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7252 	mask |= 1U << ((mmNIC2_QM1_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7253 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7254 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7255 	mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7256 	mask |= 1U << ((mmNIC2_QM1_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7257 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7258 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7259 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7260 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7261 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7262 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7263 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7264 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7265 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7266 	mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7267 	mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7268 	mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7269 	mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7270 	mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7271 	mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7273 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7277 	mask = 1U << ((mmNIC2_QM1_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7278 	mask |= 1U << ((mmNIC2_QM1_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7279 	mask |= 1U << ((mmNIC2_QM1_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7280 	mask |= 1U << ((mmNIC2_QM1_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7281 	mask |= 1U << ((mmNIC2_QM1_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7282 	mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7283 	mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7284 	mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7285 	mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7286 	mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7287 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7288 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7289 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7290 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7291 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7292 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7293 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7294 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7295 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7296 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7297 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7298 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7299 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7300 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7301 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7302 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7303 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7304 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7305 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7306 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7307 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7308 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7310 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7315 	mask = 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7316 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7317 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7318 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7319 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7320 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7321 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7322 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7323 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7324 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7325 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7326 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7327 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7328 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7329 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7330 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7331 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7332 	mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7333 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7334 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7335 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7336 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7337 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7338 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7339 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7340 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7341 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7342 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7343 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7344 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7345 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7347 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7353 	mask = 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7354 	mask |= 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7356 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7360 	mask = 1U << ((mmNIC2_QM1_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7361 	mask |= 1U << ((mmNIC2_QM1_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7362 	mask |= 1U << ((mmNIC2_QM1_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7363 	mask |= 1U << ((mmNIC2_QM1_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7364 	mask |= 1U << ((mmNIC2_QM1_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7365 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7366 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7367 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7368 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7369 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7370 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7371 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7372 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7373 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7374 	mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7375 	mask |= 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7376 	mask |= 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7377 	mask |= 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7379 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7384 	mask = 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7385 	mask |= 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7386 	mask |= 1U << ((mmNIC2_QM1_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7387 	mask |= 1U << ((mmNIC2_QM1_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7389 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7393 	mask = 1U << ((mmNIC2_QM1_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7394 	mask |= 1U << ((mmNIC2_QM1_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7395 	mask |= 1U << ((mmNIC2_QM1_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7396 	mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7397 	mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7398 	mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7399 	mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7400 	mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7401 	mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7402 	mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7403 	mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7404 	mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7405 	mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7407 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7411 	mask = 1U << ((mmNIC2_QM1_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7412 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7413 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7414 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7415 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7416 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7417 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7418 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7419 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7420 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7421 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7422 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7423 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7424 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7425 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7426 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7427 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7428 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7429 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7430 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7431 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7432 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7433 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7434 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7435 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7437 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7442 	mask = 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7443 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7444 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7445 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7446 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7447 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7448 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7449 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7451 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7457 	mask = 1U << ((mmNIC2_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7458 	mask |= 1U << ((mmNIC2_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7459 	mask |= 1U << ((mmNIC2_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7460 	mask |= 1U << ((mmNIC2_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7461 	mask |= 1U << ((mmNIC2_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7463 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7467 	mask = 1U << ((mmNIC2_QM1_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7468 	mask |= 1U << ((mmNIC2_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7469 	mask |= 1U << ((mmNIC2_QM1_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7470 	mask |= 1U << ((mmNIC2_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7471 	mask |= 1U << ((mmNIC2_QM1_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7472 	mask |= 1U << ((mmNIC2_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7473 	mask |= 1U << ((mmNIC2_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7474 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7475 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7476 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7477 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7478 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7479 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7480 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7481 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7482 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7483 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7484 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7485 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7486 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7487 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7488 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7489 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7490 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7491 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7492 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7493 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7495 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7500 	mask = 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7501 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7502 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7503 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7504 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7505 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7506 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7507 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7508 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7509 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7510 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7511 	mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7512 	mask |= 1U << ((mmNIC2_QM1_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7513 	mask |= 1U << ((mmNIC2_QM1_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7514 	mask |= 1U << ((mmNIC2_QM1_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7516 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7521 	mask = 1U << ((mmNIC2_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7522 	mask |= 1U << ((mmNIC2_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7523 	mask |= 1U << ((mmNIC2_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7524 	mask |= 1U << ((mmNIC2_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7525 	mask |= 1U << ((mmNIC2_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7526 	mask |= 1U << ((mmNIC2_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7527 	mask |= 1U << ((mmNIC2_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7528 	mask |= 1U << ((mmNIC2_QM1_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7529 	mask |= 1U << ((mmNIC2_QM1_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7530 	mask |= 1U << ((mmNIC2_QM1_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7531 	mask |= 1U << ((mmNIC2_QM1_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7532 	mask |= 1U << ((mmNIC2_QM1_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7533 	mask |= 1U << ((mmNIC2_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7534 	mask |= 1U << ((mmNIC2_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7535 	mask |= 1U << ((mmNIC2_QM1_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7537 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7542 	mask = 1U << ((mmNIC2_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7544 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7551 	mask = 1U << ((mmNIC3_QM0_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7552 	mask |= 1U << ((mmNIC3_QM0_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7553 	mask |= 1U << ((mmNIC3_QM0_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7554 	mask |= 1U << ((mmNIC3_QM0_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7555 	mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7556 	mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7557 	mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7558 	mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7559 	mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7560 	mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7561 	mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7562 	mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7563 	mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7564 	mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7565 	mask |= 1U << ((mmNIC3_QM0_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7566 	mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7567 	mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7568 	mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7569 	mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7570 	mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7571 	mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7572 	mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7573 	mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7574 	mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7575 	mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7576 	mask |= 1U << ((mmNIC3_QM0_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7577 	mask |= 1U << ((mmNIC3_QM0_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7578 	mask |= 1U << ((mmNIC3_QM0_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7579 	mask |= 1U << ((mmNIC3_QM0_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7581 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7585 	mask = 1U << ((mmNIC3_QM0_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7586 	mask |= 1U << ((mmNIC3_QM0_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7587 	mask |= 1U << ((mmNIC3_QM0_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7588 	mask |= 1U << ((mmNIC3_QM0_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7589 	mask |= 1U << ((mmNIC3_QM0_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7590 	mask |= 1U << ((mmNIC3_QM0_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7591 	mask |= 1U << ((mmNIC3_QM0_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7592 	mask |= 1U << ((mmNIC3_QM0_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7593 	mask |= 1U << ((mmNIC3_QM0_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7594 	mask |= 1U << ((mmNIC3_QM0_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7595 	mask |= 1U << ((mmNIC3_QM0_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7596 	mask |= 1U << ((mmNIC3_QM0_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7597 	mask |= 1U << ((mmNIC3_QM0_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7598 	mask |= 1U << ((mmNIC3_QM0_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7599 	mask |= 1U << ((mmNIC3_QM0_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7600 	mask |= 1U << ((mmNIC3_QM0_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7601 	mask |= 1U << ((mmNIC3_QM0_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7602 	mask |= 1U << ((mmNIC3_QM0_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7603 	mask |= 1U << ((mmNIC3_QM0_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7604 	mask |= 1U << ((mmNIC3_QM0_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7605 	mask |= 1U << ((mmNIC3_QM0_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7606 	mask |= 1U << ((mmNIC3_QM0_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7607 	mask |= 1U << ((mmNIC3_QM0_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7608 	mask |= 1U << ((mmNIC3_QM0_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7609 	mask |= 1U << ((mmNIC3_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7610 	mask |= 1U << ((mmNIC3_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7611 	mask |= 1U << ((mmNIC3_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7612 	mask |= 1U << ((mmNIC3_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7613 	mask |= 1U << ((mmNIC3_QM0_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7614 	mask |= 1U << ((mmNIC3_QM0_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7615 	mask |= 1U << ((mmNIC3_QM0_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7616 	mask |= 1U << ((mmNIC3_QM0_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7618 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7622 	mask = 1U << ((mmNIC3_QM0_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7623 	mask |= 1U << ((mmNIC3_QM0_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7624 	mask |= 1U << ((mmNIC3_QM0_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7625 	mask |= 1U << ((mmNIC3_QM0_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7626 	mask |= 1U << ((mmNIC3_QM0_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7627 	mask |= 1U << ((mmNIC3_QM0_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7628 	mask |= 1U << ((mmNIC3_QM0_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7629 	mask |= 1U << ((mmNIC3_QM0_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7630 	mask |= 1U << ((mmNIC3_QM0_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7631 	mask |= 1U << ((mmNIC3_QM0_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7632 	mask |= 1U << ((mmNIC3_QM0_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7633 	mask |= 1U << ((mmNIC3_QM0_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7634 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7635 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7636 	mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7638 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7642 	mask = 1U << ((mmNIC3_QM0_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7643 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7644 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7645 	mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7646 	mask |= 1U << ((mmNIC3_QM0_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7647 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7648 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7649 	mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7650 	mask |= 1U << ((mmNIC3_QM0_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7651 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7652 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7653 	mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7654 	mask |= 1U << ((mmNIC3_QM0_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7655 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7656 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7657 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7658 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7659 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7660 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7661 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7662 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7663 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7664 	mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7665 	mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7666 	mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7667 	mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7668 	mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7669 	mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7671 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7675 	mask = 1U << ((mmNIC3_QM0_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7676 	mask |= 1U << ((mmNIC3_QM0_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7677 	mask |= 1U << ((mmNIC3_QM0_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7678 	mask |= 1U << ((mmNIC3_QM0_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7679 	mask |= 1U << ((mmNIC3_QM0_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7680 	mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7681 	mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7682 	mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7683 	mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7684 	mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7685 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7686 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7687 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7688 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7689 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7690 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7691 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7692 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7693 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7694 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7695 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7696 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7697 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7698 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7699 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7700 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7701 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7702 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7703 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7704 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7705 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7706 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7708 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7713 	mask = 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7714 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7715 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7716 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7717 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7718 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7719 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7720 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7721 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7722 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7723 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7724 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7725 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7726 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7727 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7728 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7729 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7730 	mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7731 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7732 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7733 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7734 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7735 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7736 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7737 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7738 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7739 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7740 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7741 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7742 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7743 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7745 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7751 	mask = 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7752 	mask |= 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7754 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7758 	mask = 1U << ((mmNIC3_QM0_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7759 	mask |= 1U << ((mmNIC3_QM0_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7760 	mask |= 1U << ((mmNIC3_QM0_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7761 	mask |= 1U << ((mmNIC3_QM0_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7762 	mask |= 1U << ((mmNIC3_QM0_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7763 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7764 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7765 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7766 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7767 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7768 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7769 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7770 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7771 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7772 	mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7773 	mask |= 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7774 	mask |= 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7775 	mask |= 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7777 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7782 	mask = 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7783 	mask |= 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7784 	mask |= 1U << ((mmNIC3_QM0_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7785 	mask |= 1U << ((mmNIC3_QM0_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7787 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7791 	mask = 1U << ((mmNIC3_QM0_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7792 	mask |= 1U << ((mmNIC3_QM0_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7793 	mask |= 1U << ((mmNIC3_QM0_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7794 	mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7795 	mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7796 	mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7797 	mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7798 	mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7799 	mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7800 	mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7801 	mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7802 	mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7803 	mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7805 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7809 	mask = 1U << ((mmNIC3_QM0_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7810 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7811 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7812 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7813 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7814 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7815 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7816 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7817 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7818 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7819 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7820 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7821 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7822 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7823 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7824 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7825 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7826 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7827 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7828 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7829 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7830 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7831 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7832 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7833 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7835 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7840 	mask = 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7841 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7842 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7843 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7844 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7845 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7846 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7847 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7849 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7855 	mask = 1U << ((mmNIC3_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7856 	mask |= 1U << ((mmNIC3_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7857 	mask |= 1U << ((mmNIC3_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7858 	mask |= 1U << ((mmNIC3_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7859 	mask |= 1U << ((mmNIC3_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7861 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7865 	mask = 1U << ((mmNIC3_QM0_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7866 	mask |= 1U << ((mmNIC3_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7867 	mask |= 1U << ((mmNIC3_QM0_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7868 	mask |= 1U << ((mmNIC3_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7869 	mask |= 1U << ((mmNIC3_QM0_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7870 	mask |= 1U << ((mmNIC3_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7871 	mask |= 1U << ((mmNIC3_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7872 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7873 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7874 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7875 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7876 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7877 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7878 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7879 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7880 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7881 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7882 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7883 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7884 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7885 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7886 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7887 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7888 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7889 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7890 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7891 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7893 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7898 	mask = 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7899 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7900 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7901 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7902 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7903 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7904 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7905 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7906 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7907 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7908 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7909 	mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7910 	mask |= 1U << ((mmNIC3_QM0_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7911 	mask |= 1U << ((mmNIC3_QM0_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7912 	mask |= 1U << ((mmNIC3_QM0_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7914 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7919 	mask = 1U << ((mmNIC3_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7920 	mask |= 1U << ((mmNIC3_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7921 	mask |= 1U << ((mmNIC3_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7922 	mask |= 1U << ((mmNIC3_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7923 	mask |= 1U << ((mmNIC3_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7924 	mask |= 1U << ((mmNIC3_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7925 	mask |= 1U << ((mmNIC3_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7926 	mask |= 1U << ((mmNIC3_QM0_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7927 	mask |= 1U << ((mmNIC3_QM0_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7928 	mask |= 1U << ((mmNIC3_QM0_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7929 	mask |= 1U << ((mmNIC3_QM0_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7930 	mask |= 1U << ((mmNIC3_QM0_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7931 	mask |= 1U << ((mmNIC3_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7932 	mask |= 1U << ((mmNIC3_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7933 	mask |= 1U << ((mmNIC3_QM0_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7935 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7940 	mask = 1U << ((mmNIC3_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7942 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7946 	mask = 1U << ((mmNIC3_QM1_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7947 	mask |= 1U << ((mmNIC3_QM1_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7948 	mask |= 1U << ((mmNIC3_QM1_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7949 	mask |= 1U << ((mmNIC3_QM1_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7950 	mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7951 	mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7952 	mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7953 	mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7954 	mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7955 	mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7956 	mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7957 	mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7958 	mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7959 	mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7960 	mask |= 1U << ((mmNIC3_QM1_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7961 	mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7962 	mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7963 	mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7964 	mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7965 	mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7966 	mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7967 	mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7968 	mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7969 	mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7970 	mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7971 	mask |= 1U << ((mmNIC3_QM1_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7972 	mask |= 1U << ((mmNIC3_QM1_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7973 	mask |= 1U << ((mmNIC3_QM1_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7974 	mask |= 1U << ((mmNIC3_QM1_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7976 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
7980 	mask = 1U << ((mmNIC3_QM1_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7981 	mask |= 1U << ((mmNIC3_QM1_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7982 	mask |= 1U << ((mmNIC3_QM1_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7983 	mask |= 1U << ((mmNIC3_QM1_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7984 	mask |= 1U << ((mmNIC3_QM1_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7985 	mask |= 1U << ((mmNIC3_QM1_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7986 	mask |= 1U << ((mmNIC3_QM1_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7987 	mask |= 1U << ((mmNIC3_QM1_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7988 	mask |= 1U << ((mmNIC3_QM1_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7989 	mask |= 1U << ((mmNIC3_QM1_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7990 	mask |= 1U << ((mmNIC3_QM1_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7991 	mask |= 1U << ((mmNIC3_QM1_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7992 	mask |= 1U << ((mmNIC3_QM1_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7993 	mask |= 1U << ((mmNIC3_QM1_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7994 	mask |= 1U << ((mmNIC3_QM1_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7995 	mask |= 1U << ((mmNIC3_QM1_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7996 	mask |= 1U << ((mmNIC3_QM1_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7997 	mask |= 1U << ((mmNIC3_QM1_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7998 	mask |= 1U << ((mmNIC3_QM1_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
7999 	mask |= 1U << ((mmNIC3_QM1_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8000 	mask |= 1U << ((mmNIC3_QM1_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8001 	mask |= 1U << ((mmNIC3_QM1_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8002 	mask |= 1U << ((mmNIC3_QM1_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8003 	mask |= 1U << ((mmNIC3_QM1_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8004 	mask |= 1U << ((mmNIC3_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8005 	mask |= 1U << ((mmNIC3_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8006 	mask |= 1U << ((mmNIC3_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8007 	mask |= 1U << ((mmNIC3_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8008 	mask |= 1U << ((mmNIC3_QM1_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8009 	mask |= 1U << ((mmNIC3_QM1_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8010 	mask |= 1U << ((mmNIC3_QM1_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8011 	mask |= 1U << ((mmNIC3_QM1_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8013 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8017 	mask = 1U << ((mmNIC3_QM1_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8018 	mask |= 1U << ((mmNIC3_QM1_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8019 	mask |= 1U << ((mmNIC3_QM1_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8020 	mask |= 1U << ((mmNIC3_QM1_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8021 	mask |= 1U << ((mmNIC3_QM1_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8022 	mask |= 1U << ((mmNIC3_QM1_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8023 	mask |= 1U << ((mmNIC3_QM1_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8024 	mask |= 1U << ((mmNIC3_QM1_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8025 	mask |= 1U << ((mmNIC3_QM1_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8026 	mask |= 1U << ((mmNIC3_QM1_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8027 	mask |= 1U << ((mmNIC3_QM1_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8028 	mask |= 1U << ((mmNIC3_QM1_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8029 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8030 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8031 	mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8033 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8037 	mask = 1U << ((mmNIC3_QM1_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8038 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8039 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8040 	mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8041 	mask |= 1U << ((mmNIC3_QM1_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8042 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8043 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8044 	mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8045 	mask |= 1U << ((mmNIC3_QM1_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8046 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8047 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8048 	mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8049 	mask |= 1U << ((mmNIC3_QM1_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8050 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8051 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8052 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8053 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8054 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8055 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8056 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8057 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8058 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8059 	mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8060 	mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8061 	mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8062 	mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8063 	mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8064 	mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8066 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8070 	mask = 1U << ((mmNIC3_QM1_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8071 	mask |= 1U << ((mmNIC3_QM1_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8072 	mask |= 1U << ((mmNIC3_QM1_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8073 	mask |= 1U << ((mmNIC3_QM1_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8074 	mask |= 1U << ((mmNIC3_QM1_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8075 	mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8076 	mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8077 	mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8078 	mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8079 	mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8080 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8081 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8082 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8083 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8084 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8085 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8086 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8087 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8088 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8089 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8090 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8091 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8092 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8093 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8094 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8095 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8096 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8097 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8098 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8099 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8100 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8101 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8103 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8108 	mask = 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8109 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8110 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8111 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8112 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8113 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8114 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8115 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8116 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8117 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8118 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8119 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8120 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8121 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8122 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8123 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8124 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8125 	mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8126 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8127 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8128 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8129 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8130 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8131 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8132 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8133 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8134 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8135 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8136 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8137 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8138 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8140 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8146 	mask = 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8147 	mask |= 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8149 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8153 	mask = 1U << ((mmNIC3_QM1_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8154 	mask |= 1U << ((mmNIC3_QM1_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8155 	mask |= 1U << ((mmNIC3_QM1_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8156 	mask |= 1U << ((mmNIC3_QM1_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8157 	mask |= 1U << ((mmNIC3_QM1_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8158 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8159 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8160 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8161 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8162 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8163 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8164 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8165 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8166 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8167 	mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8168 	mask |= 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8169 	mask |= 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8170 	mask |= 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8172 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8177 	mask = 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8178 	mask |= 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8179 	mask |= 1U << ((mmNIC3_QM1_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8180 	mask |= 1U << ((mmNIC3_QM1_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8182 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8186 	mask = 1U << ((mmNIC3_QM1_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8187 	mask |= 1U << ((mmNIC3_QM1_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8188 	mask |= 1U << ((mmNIC3_QM1_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8189 	mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8190 	mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8191 	mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8192 	mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8193 	mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8194 	mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8195 	mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8196 	mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8197 	mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8198 	mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8200 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8204 	mask = 1U << ((mmNIC3_QM1_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8205 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8206 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8207 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8208 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8209 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8210 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8211 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8212 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8213 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8214 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8215 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8216 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8217 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8218 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8219 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8220 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8221 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8222 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8223 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8224 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8225 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8226 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8227 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8228 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8230 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8235 	mask = 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8236 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8237 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8238 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8239 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8240 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8241 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8242 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8244 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8250 	mask = 1U << ((mmNIC3_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8251 	mask |= 1U << ((mmNIC3_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8252 	mask |= 1U << ((mmNIC3_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8253 	mask |= 1U << ((mmNIC3_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8254 	mask |= 1U << ((mmNIC3_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8256 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8260 	mask = 1U << ((mmNIC3_QM1_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8261 	mask |= 1U << ((mmNIC3_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8262 	mask |= 1U << ((mmNIC3_QM1_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8263 	mask |= 1U << ((mmNIC3_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8264 	mask |= 1U << ((mmNIC3_QM1_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8265 	mask |= 1U << ((mmNIC3_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8266 	mask |= 1U << ((mmNIC3_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8267 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8268 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8269 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8270 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8271 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8272 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8273 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8274 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8275 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8276 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8277 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8278 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8279 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8280 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8281 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8282 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8283 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8284 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8285 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8286 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8288 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8293 	mask = 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8294 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8295 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8296 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8297 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8298 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8299 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8300 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8301 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8302 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8303 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8304 	mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8305 	mask |= 1U << ((mmNIC3_QM1_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8306 	mask |= 1U << ((mmNIC3_QM1_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8307 	mask |= 1U << ((mmNIC3_QM1_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8309 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8314 	mask = 1U << ((mmNIC3_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8315 	mask |= 1U << ((mmNIC3_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8316 	mask |= 1U << ((mmNIC3_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8317 	mask |= 1U << ((mmNIC3_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8318 	mask |= 1U << ((mmNIC3_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8319 	mask |= 1U << ((mmNIC3_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8320 	mask |= 1U << ((mmNIC3_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8321 	mask |= 1U << ((mmNIC3_QM1_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8322 	mask |= 1U << ((mmNIC3_QM1_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8323 	mask |= 1U << ((mmNIC3_QM1_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8324 	mask |= 1U << ((mmNIC3_QM1_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8325 	mask |= 1U << ((mmNIC3_QM1_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8326 	mask |= 1U << ((mmNIC3_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8327 	mask |= 1U << ((mmNIC3_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8328 	mask |= 1U << ((mmNIC3_QM1_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8330 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8335 	mask = 1U << ((mmNIC3_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8337 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8344 	mask = 1U << ((mmNIC4_QM0_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8345 	mask |= 1U << ((mmNIC4_QM0_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8346 	mask |= 1U << ((mmNIC4_QM0_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8347 	mask |= 1U << ((mmNIC4_QM0_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8348 	mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8349 	mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8350 	mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8351 	mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8352 	mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8353 	mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8354 	mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8355 	mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8356 	mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8357 	mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8358 	mask |= 1U << ((mmNIC4_QM0_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8359 	mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8360 	mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8361 	mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8362 	mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8363 	mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8364 	mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8365 	mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8366 	mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8367 	mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8368 	mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8369 	mask |= 1U << ((mmNIC4_QM0_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8370 	mask |= 1U << ((mmNIC4_QM0_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8371 	mask |= 1U << ((mmNIC4_QM0_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8372 	mask |= 1U << ((mmNIC4_QM0_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8374 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8378 	mask = 1U << ((mmNIC4_QM0_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8379 	mask |= 1U << ((mmNIC4_QM0_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8380 	mask |= 1U << ((mmNIC4_QM0_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8381 	mask |= 1U << ((mmNIC4_QM0_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8382 	mask |= 1U << ((mmNIC4_QM0_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8383 	mask |= 1U << ((mmNIC4_QM0_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8384 	mask |= 1U << ((mmNIC4_QM0_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8385 	mask |= 1U << ((mmNIC4_QM0_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8386 	mask |= 1U << ((mmNIC4_QM0_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8387 	mask |= 1U << ((mmNIC4_QM0_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8388 	mask |= 1U << ((mmNIC4_QM0_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8389 	mask |= 1U << ((mmNIC4_QM0_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8390 	mask |= 1U << ((mmNIC4_QM0_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8391 	mask |= 1U << ((mmNIC4_QM0_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8392 	mask |= 1U << ((mmNIC4_QM0_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8393 	mask |= 1U << ((mmNIC4_QM0_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8394 	mask |= 1U << ((mmNIC4_QM0_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8395 	mask |= 1U << ((mmNIC4_QM0_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8396 	mask |= 1U << ((mmNIC4_QM0_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8397 	mask |= 1U << ((mmNIC4_QM0_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8398 	mask |= 1U << ((mmNIC4_QM0_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8399 	mask |= 1U << ((mmNIC4_QM0_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8400 	mask |= 1U << ((mmNIC4_QM0_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8401 	mask |= 1U << ((mmNIC4_QM0_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8402 	mask |= 1U << ((mmNIC4_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8403 	mask |= 1U << ((mmNIC4_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8404 	mask |= 1U << ((mmNIC4_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8405 	mask |= 1U << ((mmNIC4_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8406 	mask |= 1U << ((mmNIC4_QM0_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8407 	mask |= 1U << ((mmNIC4_QM0_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8408 	mask |= 1U << ((mmNIC4_QM0_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8409 	mask |= 1U << ((mmNIC4_QM0_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8411 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8415 	mask = 1U << ((mmNIC4_QM0_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8416 	mask |= 1U << ((mmNIC4_QM0_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8417 	mask |= 1U << ((mmNIC4_QM0_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8418 	mask |= 1U << ((mmNIC4_QM0_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8419 	mask |= 1U << ((mmNIC4_QM0_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8420 	mask |= 1U << ((mmNIC4_QM0_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8421 	mask |= 1U << ((mmNIC4_QM0_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8422 	mask |= 1U << ((mmNIC4_QM0_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8423 	mask |= 1U << ((mmNIC4_QM0_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8424 	mask |= 1U << ((mmNIC4_QM0_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8425 	mask |= 1U << ((mmNIC4_QM0_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8426 	mask |= 1U << ((mmNIC4_QM0_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8427 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8428 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8429 	mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8431 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8435 	mask = 1U << ((mmNIC4_QM0_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8436 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8437 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8438 	mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8439 	mask |= 1U << ((mmNIC4_QM0_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8440 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8441 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8442 	mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8443 	mask |= 1U << ((mmNIC4_QM0_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8444 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8445 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8446 	mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8447 	mask |= 1U << ((mmNIC4_QM0_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8448 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8449 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8450 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8451 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8452 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8453 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8454 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8455 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8456 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8457 	mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8458 	mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8459 	mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8460 	mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8461 	mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8462 	mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8464 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8468 	mask = 1U << ((mmNIC4_QM0_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8469 	mask |= 1U << ((mmNIC4_QM0_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8470 	mask |= 1U << ((mmNIC4_QM0_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8471 	mask |= 1U << ((mmNIC4_QM0_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8472 	mask |= 1U << ((mmNIC4_QM0_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8473 	mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8474 	mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8475 	mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8476 	mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8477 	mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8478 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8479 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8480 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8481 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8482 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8483 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8484 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8485 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8486 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8487 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8488 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8489 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8490 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8491 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8492 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8493 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8494 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8495 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8496 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8497 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8498 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8499 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8501 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8506 	mask = 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8507 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8508 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8509 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8510 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8511 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8512 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8513 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8514 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8515 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8516 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8517 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8518 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8519 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8520 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8521 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8522 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8523 	mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8524 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8525 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8526 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8527 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8528 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8529 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8530 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8531 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8532 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8533 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8534 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8535 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8536 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8538 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8544 	mask = 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8545 	mask |= 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8547 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8551 	mask = 1U << ((mmNIC4_QM0_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8552 	mask |= 1U << ((mmNIC4_QM0_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8553 	mask |= 1U << ((mmNIC4_QM0_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8554 	mask |= 1U << ((mmNIC4_QM0_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8555 	mask |= 1U << ((mmNIC4_QM0_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8556 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8557 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8558 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8559 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8560 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8561 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8562 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8563 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8564 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8565 	mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8566 	mask |= 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8567 	mask |= 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8568 	mask |= 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8570 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8575 	mask = 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8576 	mask |= 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8577 	mask |= 1U << ((mmNIC4_QM0_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8578 	mask |= 1U << ((mmNIC4_QM0_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8580 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8584 	mask = 1U << ((mmNIC4_QM0_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8585 	mask |= 1U << ((mmNIC4_QM0_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8586 	mask |= 1U << ((mmNIC4_QM0_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8587 	mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8588 	mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8589 	mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8590 	mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8591 	mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8592 	mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8593 	mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8594 	mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8595 	mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8596 	mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8598 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8602 	mask = 1U << ((mmNIC4_QM0_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8603 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8604 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8605 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8606 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8607 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8608 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8609 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8610 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8611 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8612 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8613 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8614 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8615 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8616 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8617 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8618 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8619 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8620 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8621 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8622 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8623 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8624 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8625 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8626 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8628 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8633 	mask = 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8634 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8635 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8636 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8637 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8638 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8639 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8640 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8642 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8648 	mask = 1U << ((mmNIC4_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8649 	mask |= 1U << ((mmNIC4_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8650 	mask |= 1U << ((mmNIC4_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8651 	mask |= 1U << ((mmNIC4_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8652 	mask |= 1U << ((mmNIC4_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8654 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8658 	mask = 1U << ((mmNIC4_QM0_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8659 	mask |= 1U << ((mmNIC4_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8660 	mask |= 1U << ((mmNIC4_QM0_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8661 	mask |= 1U << ((mmNIC4_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8662 	mask |= 1U << ((mmNIC4_QM0_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8663 	mask |= 1U << ((mmNIC4_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8664 	mask |= 1U << ((mmNIC4_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8665 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8666 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8667 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8668 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8669 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8670 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8671 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8672 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8673 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8674 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8675 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8676 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8677 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8678 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8679 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8680 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8681 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8682 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8683 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8684 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8686 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8691 	mask = 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8692 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8693 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8694 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8695 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8696 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8697 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8698 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8699 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8700 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8701 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8702 	mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8703 	mask |= 1U << ((mmNIC4_QM0_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8704 	mask |= 1U << ((mmNIC4_QM0_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8705 	mask |= 1U << ((mmNIC4_QM0_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8707 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8712 	mask = 1U << ((mmNIC4_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8713 	mask |= 1U << ((mmNIC4_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8714 	mask |= 1U << ((mmNIC4_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8715 	mask |= 1U << ((mmNIC4_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8716 	mask |= 1U << ((mmNIC4_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8717 	mask |= 1U << ((mmNIC4_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8718 	mask |= 1U << ((mmNIC4_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8719 	mask |= 1U << ((mmNIC4_QM0_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8720 	mask |= 1U << ((mmNIC4_QM0_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8721 	mask |= 1U << ((mmNIC4_QM0_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8722 	mask |= 1U << ((mmNIC4_QM0_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8723 	mask |= 1U << ((mmNIC4_QM0_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8724 	mask |= 1U << ((mmNIC4_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8725 	mask |= 1U << ((mmNIC4_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8726 	mask |= 1U << ((mmNIC4_QM0_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8728 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8733 	mask = 1U << ((mmNIC4_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8735 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8739 	mask = 1U << ((mmNIC4_QM1_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8740 	mask |= 1U << ((mmNIC4_QM1_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8741 	mask |= 1U << ((mmNIC4_QM1_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8742 	mask |= 1U << ((mmNIC4_QM1_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8743 	mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8744 	mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8745 	mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8746 	mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8747 	mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8748 	mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8749 	mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8750 	mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8751 	mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8752 	mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8753 	mask |= 1U << ((mmNIC4_QM1_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8754 	mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8755 	mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8756 	mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8757 	mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8758 	mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8759 	mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8760 	mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8761 	mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8762 	mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8763 	mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8764 	mask |= 1U << ((mmNIC4_QM1_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8765 	mask |= 1U << ((mmNIC4_QM1_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8766 	mask |= 1U << ((mmNIC4_QM1_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8767 	mask |= 1U << ((mmNIC4_QM1_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8769 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8773 	mask = 1U << ((mmNIC4_QM1_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8774 	mask |= 1U << ((mmNIC4_QM1_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8775 	mask |= 1U << ((mmNIC4_QM1_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8776 	mask |= 1U << ((mmNIC4_QM1_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8777 	mask |= 1U << ((mmNIC4_QM1_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8778 	mask |= 1U << ((mmNIC4_QM1_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8779 	mask |= 1U << ((mmNIC4_QM1_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8780 	mask |= 1U << ((mmNIC4_QM1_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8781 	mask |= 1U << ((mmNIC4_QM1_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8782 	mask |= 1U << ((mmNIC4_QM1_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8783 	mask |= 1U << ((mmNIC4_QM1_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8784 	mask |= 1U << ((mmNIC4_QM1_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8785 	mask |= 1U << ((mmNIC4_QM1_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8786 	mask |= 1U << ((mmNIC4_QM1_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8787 	mask |= 1U << ((mmNIC4_QM1_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8788 	mask |= 1U << ((mmNIC4_QM1_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8789 	mask |= 1U << ((mmNIC4_QM1_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8790 	mask |= 1U << ((mmNIC4_QM1_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8791 	mask |= 1U << ((mmNIC4_QM1_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8792 	mask |= 1U << ((mmNIC4_QM1_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8793 	mask |= 1U << ((mmNIC4_QM1_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8794 	mask |= 1U << ((mmNIC4_QM1_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8795 	mask |= 1U << ((mmNIC4_QM1_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8796 	mask |= 1U << ((mmNIC4_QM1_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8797 	mask |= 1U << ((mmNIC4_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8798 	mask |= 1U << ((mmNIC4_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8799 	mask |= 1U << ((mmNIC4_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8800 	mask |= 1U << ((mmNIC4_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8801 	mask |= 1U << ((mmNIC4_QM1_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8802 	mask |= 1U << ((mmNIC4_QM1_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8803 	mask |= 1U << ((mmNIC4_QM1_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8804 	mask |= 1U << ((mmNIC4_QM1_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8806 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8810 	mask = 1U << ((mmNIC4_QM1_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8811 	mask |= 1U << ((mmNIC4_QM1_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8812 	mask |= 1U << ((mmNIC4_QM1_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8813 	mask |= 1U << ((mmNIC4_QM1_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8814 	mask |= 1U << ((mmNIC4_QM1_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8815 	mask |= 1U << ((mmNIC4_QM1_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8816 	mask |= 1U << ((mmNIC4_QM1_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8817 	mask |= 1U << ((mmNIC4_QM1_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8818 	mask |= 1U << ((mmNIC4_QM1_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8819 	mask |= 1U << ((mmNIC4_QM1_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8820 	mask |= 1U << ((mmNIC4_QM1_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8821 	mask |= 1U << ((mmNIC4_QM1_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8822 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8823 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8824 	mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8826 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8830 	mask = 1U << ((mmNIC4_QM1_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8831 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8832 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8833 	mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8834 	mask |= 1U << ((mmNIC4_QM1_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8835 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8836 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8837 	mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8838 	mask |= 1U << ((mmNIC4_QM1_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8839 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8840 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8841 	mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8842 	mask |= 1U << ((mmNIC4_QM1_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8843 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8844 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8845 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8846 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8847 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8848 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8849 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8850 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8851 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8852 	mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8853 	mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8854 	mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8855 	mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8856 	mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8857 	mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8859 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8863 	mask = 1U << ((mmNIC4_QM1_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8864 	mask |= 1U << ((mmNIC4_QM1_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8865 	mask |= 1U << ((mmNIC4_QM1_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8866 	mask |= 1U << ((mmNIC4_QM1_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8867 	mask |= 1U << ((mmNIC4_QM1_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8868 	mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8869 	mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8870 	mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8871 	mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8872 	mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8873 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8874 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8875 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8876 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8877 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8878 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8879 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8880 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8881 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8882 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8883 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8884 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8885 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8886 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8887 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8888 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8889 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8890 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8891 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8892 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8893 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8894 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8896 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8901 	mask = 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8902 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8903 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8904 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8905 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8906 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8907 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8908 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8909 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8910 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8911 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8912 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8913 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8914 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8915 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8916 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8917 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8918 	mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8919 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8920 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8921 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8922 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8923 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8924 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8925 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8926 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8927 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8928 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8929 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8930 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8931 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8933 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8939 	mask = 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8940 	mask |= 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8942 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8946 	mask = 1U << ((mmNIC4_QM1_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8947 	mask |= 1U << ((mmNIC4_QM1_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8948 	mask |= 1U << ((mmNIC4_QM1_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8949 	mask |= 1U << ((mmNIC4_QM1_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8950 	mask |= 1U << ((mmNIC4_QM1_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8951 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8952 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8953 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8954 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8955 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8956 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8957 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8958 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8959 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8960 	mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8961 	mask |= 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8962 	mask |= 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8963 	mask |= 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8965 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8970 	mask = 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8971 	mask |= 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8972 	mask |= 1U << ((mmNIC4_QM1_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8973 	mask |= 1U << ((mmNIC4_QM1_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8975 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8979 	mask = 1U << ((mmNIC4_QM1_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8980 	mask |= 1U << ((mmNIC4_QM1_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8981 	mask |= 1U << ((mmNIC4_QM1_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8982 	mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8983 	mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8984 	mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8985 	mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8986 	mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8987 	mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8988 	mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8989 	mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8990 	mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8991 	mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8993 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
8997 	mask = 1U << ((mmNIC4_QM1_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8998 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
8999 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9000 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9001 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9002 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9003 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9004 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9005 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9006 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9007 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9008 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9009 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9010 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9011 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9012 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9013 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9014 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9015 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9016 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9017 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9018 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9019 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9020 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9021 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9023 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
9028 	mask = 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9029 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9030 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9031 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9032 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9033 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9034 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9035 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9037 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
9043 	mask = 1U << ((mmNIC4_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9044 	mask |= 1U << ((mmNIC4_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9045 	mask |= 1U << ((mmNIC4_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9046 	mask |= 1U << ((mmNIC4_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9047 	mask |= 1U << ((mmNIC4_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9049 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
9053 	mask = 1U << ((mmNIC4_QM1_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9054 	mask |= 1U << ((mmNIC4_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9055 	mask |= 1U << ((mmNIC4_QM1_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9056 	mask |= 1U << ((mmNIC4_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9057 	mask |= 1U << ((mmNIC4_QM1_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9058 	mask |= 1U << ((mmNIC4_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9059 	mask |= 1U << ((mmNIC4_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9060 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9061 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9062 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9063 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9064 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9065 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9066 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9067 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9068 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9069 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9070 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9071 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9072 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9073 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9074 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9075 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9076 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9077 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9078 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9079 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9081 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
9086 	mask = 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9087 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9088 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9089 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9090 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9091 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9092 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9093 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9094 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9095 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9096 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9097 	mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9098 	mask |= 1U << ((mmNIC4_QM1_CGM_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9099 	mask |= 1U << ((mmNIC4_QM1_CGM_STS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9100 	mask |= 1U << ((mmNIC4_QM1_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9102 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
9107 	mask = 1U << ((mmNIC4_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9108 	mask |= 1U << ((mmNIC4_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9109 	mask |= 1U << ((mmNIC4_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9110 	mask |= 1U << ((mmNIC4_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9111 	mask |= 1U << ((mmNIC4_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9112 	mask |= 1U << ((mmNIC4_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9113 	mask |= 1U << ((mmNIC4_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9114 	mask |= 1U << ((mmNIC4_QM1_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9115 	mask |= 1U << ((mmNIC4_QM1_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9116 	mask |= 1U << ((mmNIC4_QM1_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9117 	mask |= 1U << ((mmNIC4_QM1_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9118 	mask |= 1U << ((mmNIC4_QM1_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9119 	mask |= 1U << ((mmNIC4_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9120 	mask |= 1U << ((mmNIC4_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9121 	mask |= 1U << ((mmNIC4_QM1_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9123 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
9128 	mask = 1U << ((mmNIC4_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_nic_protection_bits()
9130 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_nic_protection_bits()
9135 	u32 pb_addr, mask;  in gaudi_init_tpc_protection_bits()  local
9154 	mask = 1U << ((mmTPC0_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9155 	mask |= 1U << ((mmTPC0_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9156 	mask |= 1U << ((mmTPC0_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9157 	mask |= 1U << ((mmTPC0_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9158 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9159 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9160 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9161 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9162 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9163 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9164 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9165 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9166 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9167 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9168 	mask |= 1U << ((mmTPC0_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9169 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9170 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9171 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9172 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9173 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9174 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9175 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9176 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9177 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9178 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9179 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9180 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9181 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9182 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9184 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9188 	mask = 1U << ((mmTPC0_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9189 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9190 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9191 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9192 	mask |= 1U << ((mmTPC0_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9193 	mask |= 1U << ((mmTPC0_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9194 	mask |= 1U << ((mmTPC0_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9195 	mask |= 1U << ((mmTPC0_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9196 	mask |= 1U << ((mmTPC0_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9197 	mask |= 1U << ((mmTPC0_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9198 	mask |= 1U << ((mmTPC0_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9199 	mask |= 1U << ((mmTPC0_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9200 	mask |= 1U << ((mmTPC0_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9201 	mask |= 1U << ((mmTPC0_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9202 	mask |= 1U << ((mmTPC0_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9203 	mask |= 1U << ((mmTPC0_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9204 	mask |= 1U << ((mmTPC0_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9205 	mask |= 1U << ((mmTPC0_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9206 	mask |= 1U << ((mmTPC0_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9207 	mask |= 1U << ((mmTPC0_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9208 	mask |= 1U << ((mmTPC0_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9209 	mask |= 1U << ((mmTPC0_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9210 	mask |= 1U << ((mmTPC0_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9211 	mask |= 1U << ((mmTPC0_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9212 	mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9213 	mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9214 	mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9215 	mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9216 	mask |= 1U << ((mmTPC0_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9217 	mask |= 1U << ((mmTPC0_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9218 	mask |= 1U << ((mmTPC0_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9219 	mask |= 1U << ((mmTPC0_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9221 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9225 	mask = 1U << ((mmTPC0_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9226 	mask |= 1U << ((mmTPC0_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9227 	mask |= 1U << ((mmTPC0_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9228 	mask |= 1U << ((mmTPC0_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9229 	mask |= 1U << ((mmTPC0_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9230 	mask |= 1U << ((mmTPC0_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9231 	mask |= 1U << ((mmTPC0_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9232 	mask |= 1U << ((mmTPC0_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9233 	mask |= 1U << ((mmTPC0_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9234 	mask |= 1U << ((mmTPC0_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9235 	mask |= 1U << ((mmTPC0_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9236 	mask |= 1U << ((mmTPC0_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9237 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9238 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9239 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9241 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9245 	mask = 1U << ((mmTPC0_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9246 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9247 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9248 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9249 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9250 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9251 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9252 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9253 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9254 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9255 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9256 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9257 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9258 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9259 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9260 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9261 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9262 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9263 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9264 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9265 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9266 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9267 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9268 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9269 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9270 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9271 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9272 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9274 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9278 	mask = 1U << ((mmTPC0_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9279 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9280 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9281 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9282 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9283 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9284 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9285 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9286 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9287 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9288 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9289 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9290 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9291 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9292 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9293 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9294 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9295 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9296 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9297 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9298 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9299 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9300 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9301 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9302 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9303 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9304 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9305 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9306 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9307 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9308 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9309 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9311 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9316 	mask = 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9317 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9318 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9319 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9320 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9321 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9322 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9323 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9324 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9325 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9326 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9327 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9328 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9329 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9330 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9331 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9332 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9333 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9334 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9335 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9336 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9337 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9338 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9339 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9340 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9341 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9342 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9343 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9344 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9345 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9346 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9348 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9356 	mask = 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9357 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9359 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9363 	mask = 1U << ((mmTPC0_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9364 	mask |= 1U << ((mmTPC0_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9365 	mask |= 1U << ((mmTPC0_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9366 	mask |= 1U << ((mmTPC0_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9367 	mask |= 1U << ((mmTPC0_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9368 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9369 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9370 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9371 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9372 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9373 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9374 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9375 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9376 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9377 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9378 	mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9379 	mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9380 	mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9382 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9386 	mask = 1U << ((mmTPC0_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9387 	mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9388 	mask |= 1U << ((mmTPC0_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9389 	mask |= 1U << ((mmTPC0_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9391 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9395 	mask = 1U << ((mmTPC0_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9396 	mask |= 1U << ((mmTPC0_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9397 	mask |= 1U << ((mmTPC0_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9398 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9399 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9400 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9401 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9402 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9403 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9404 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9405 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9406 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9407 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9409 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9413 	mask = 1U << ((mmTPC0_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9414 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9415 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9416 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9417 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9418 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9419 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9420 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9421 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9422 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9423 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9424 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9425 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9426 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9427 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9428 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9429 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9430 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9431 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9432 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9433 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9434 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9435 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9436 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9437 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9439 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9444 	mask = 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9445 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9446 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9447 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9448 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9449 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9450 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9451 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9453 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9460 	mask = 1U << ((mmTPC0_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9461 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9462 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9463 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9464 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9466 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9470 	mask = 1U << ((mmTPC0_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9471 	mask |= 1U << ((mmTPC0_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9472 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9473 	mask |= 1U << ((mmTPC0_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9474 	mask |= 1U << ((mmTPC0_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9475 	mask |= 1U << ((mmTPC0_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9476 	mask |= 1U << ((mmTPC0_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9477 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9478 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9479 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9480 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9481 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9482 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9483 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9484 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9485 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9486 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9487 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9488 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9489 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9490 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9491 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9492 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9493 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9494 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9495 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9496 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9498 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9503 	mask = 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9504 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9505 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9506 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9507 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9508 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9509 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9510 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9511 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9512 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9513 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9514 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9515 	mask |= 1U << ((mmTPC0_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9516 	mask |= 1U << ((mmTPC0_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9517 	mask |= 1U << ((mmTPC0_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9519 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9523 	mask = 1U << ((mmTPC0_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9524 	mask |= 1U << ((mmTPC0_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9525 	mask |= 1U << ((mmTPC0_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9526 	mask |= 1U << ((mmTPC0_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9527 	mask |= 1U << ((mmTPC0_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9528 	mask |= 1U << ((mmTPC0_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9529 	mask |= 1U << ((mmTPC0_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9530 	mask |= 1U << ((mmTPC0_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9531 	mask |= 1U << ((mmTPC0_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9532 	mask |= 1U << ((mmTPC0_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9533 	mask |= 1U << ((mmTPC0_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9534 	mask |= 1U << ((mmTPC0_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9535 	mask |= 1U << ((mmTPC0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9536 	mask |= 1U << ((mmTPC0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9537 	mask |= 1U << ((mmTPC0_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9539 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9544 	mask = 1U << ((mmTPC0_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9546 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9550 	mask = 1U << ((mmTPC0_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9552 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9556 	mask = 1U << ((mmTPC0_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9557 	mask |= 1U << ((mmTPC0_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9558 	mask |= 1U << ((mmTPC0_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9559 	mask |= 1U << ((mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9560 	mask |= 1U << ((mmTPC0_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9561 	mask |= 1U << ((mmTPC0_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9562 	mask |= 1U << ((mmTPC0_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9563 	mask |= 1U << ((mmTPC0_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9564 	mask |= 1U << ((mmTPC0_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9565 	mask |= 1U << ((mmTPC0_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9566 	mask |= 1U << ((mmTPC0_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9567 	mask |= 1U << ((mmTPC0_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9568 	mask |= 1U << ((mmTPC0_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9569 	mask |= 1U << ((mmTPC0_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9570 	mask |= 1U << ((mmTPC0_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9571 	mask |= 1U << ((mmTPC0_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9572 	mask |= 1U << ((mmTPC0_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9574 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9579 	mask = 1U << ((mmTPC0_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9580 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9581 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9582 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9583 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9584 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9585 	mask |= 1U << ((mmTPC0_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9586 	mask |= 1U << ((mmTPC0_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9587 	mask |= 1U << ((mmTPC0_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9588 	mask |= 1U << ((mmTPC0_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9589 	mask |= 1U << ((mmTPC0_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9590 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9591 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9592 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9593 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9594 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9595 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9596 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9597 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9598 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9599 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9600 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9601 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9603 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9610 	mask = 1U << ((mmTPC1_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9611 	mask |= 1U << ((mmTPC1_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9612 	mask |= 1U << ((mmTPC1_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9613 	mask |= 1U << ((mmTPC1_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9614 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9615 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9616 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9617 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9618 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9619 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9620 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9621 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9622 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9623 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9624 	mask |= 1U << ((mmTPC1_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9625 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9626 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9627 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9628 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9629 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9630 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9631 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9632 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9633 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9634 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9635 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9636 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9637 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9638 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9640 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9644 	mask = 1U << ((mmTPC1_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9645 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9646 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9647 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9648 	mask |= 1U << ((mmTPC1_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9649 	mask |= 1U << ((mmTPC1_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9650 	mask |= 1U << ((mmTPC1_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9651 	mask |= 1U << ((mmTPC1_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9652 	mask |= 1U << ((mmTPC1_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9653 	mask |= 1U << ((mmTPC1_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9654 	mask |= 1U << ((mmTPC1_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9655 	mask |= 1U << ((mmTPC1_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9656 	mask |= 1U << ((mmTPC1_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9657 	mask |= 1U << ((mmTPC1_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9658 	mask |= 1U << ((mmTPC1_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9659 	mask |= 1U << ((mmTPC1_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9660 	mask |= 1U << ((mmTPC1_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9661 	mask |= 1U << ((mmTPC1_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9662 	mask |= 1U << ((mmTPC1_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9663 	mask |= 1U << ((mmTPC1_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9664 	mask |= 1U << ((mmTPC1_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9665 	mask |= 1U << ((mmTPC1_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9666 	mask |= 1U << ((mmTPC1_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9667 	mask |= 1U << ((mmTPC1_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9668 	mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9669 	mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9670 	mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9671 	mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9672 	mask |= 1U << ((mmTPC1_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9673 	mask |= 1U << ((mmTPC1_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9674 	mask |= 1U << ((mmTPC1_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9675 	mask |= 1U << ((mmTPC1_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9677 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9681 	mask = 1U << ((mmTPC1_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9682 	mask |= 1U << ((mmTPC1_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9683 	mask |= 1U << ((mmTPC1_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9684 	mask |= 1U << ((mmTPC1_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9685 	mask |= 1U << ((mmTPC1_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9686 	mask |= 1U << ((mmTPC1_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9687 	mask |= 1U << ((mmTPC1_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9688 	mask |= 1U << ((mmTPC1_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9689 	mask |= 1U << ((mmTPC1_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9690 	mask |= 1U << ((mmTPC1_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9691 	mask |= 1U << ((mmTPC1_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9692 	mask |= 1U << ((mmTPC1_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9693 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9694 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9695 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9697 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9701 	mask = 1U << ((mmTPC1_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9702 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9703 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9704 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9705 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9706 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9707 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9708 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9709 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9710 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9711 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9712 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9713 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9714 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9715 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9716 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9717 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9718 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9719 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9720 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9721 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9722 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9723 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9724 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9725 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9726 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9727 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9728 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9730 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9734 	mask = 1U << ((mmTPC1_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9735 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9736 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9737 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9738 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9739 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9740 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9741 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9742 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9743 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9744 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9745 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9746 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9747 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9748 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9749 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9750 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9751 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9752 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9753 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9754 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9755 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9756 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9757 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9758 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9759 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9760 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9761 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9762 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9763 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9764 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9765 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9767 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9772 	mask = 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9773 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9774 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9775 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9776 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9777 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9778 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9779 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9780 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9781 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9782 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9783 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9784 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9785 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9786 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9787 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9788 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9789 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9790 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9791 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9792 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9793 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9794 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9795 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9796 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9797 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9798 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9799 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9800 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9801 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9802 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9804 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9810 	mask = 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9811 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9813 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9817 	mask = 1U << ((mmTPC1_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9818 	mask |= 1U << ((mmTPC1_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9819 	mask |= 1U << ((mmTPC1_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9820 	mask |= 1U << ((mmTPC1_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9821 	mask |= 1U << ((mmTPC1_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9822 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9823 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9824 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9825 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9826 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9827 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9828 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9829 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9830 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9831 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9832 	mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9833 	mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9834 	mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9836 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9840 	mask = 1U << ((mmTPC1_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9841 	mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9842 	mask |= 1U << ((mmTPC1_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9843 	mask |= 1U << ((mmTPC1_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9845 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9849 	mask = 1U << ((mmTPC1_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9850 	mask |= 1U << ((mmTPC1_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9851 	mask |= 1U << ((mmTPC1_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9852 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9853 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9854 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9855 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9856 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9857 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9858 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9859 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9860 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9861 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9863 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9867 	mask = 1U << ((mmTPC1_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9868 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9869 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9870 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9871 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9872 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9873 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9874 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9875 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9876 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9877 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9878 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9879 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9880 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9881 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9882 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9883 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9884 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9885 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9886 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9887 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9888 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9889 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9890 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9891 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9893 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9898 	mask = 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9899 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9900 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9901 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9902 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9903 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9904 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9905 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9907 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9914 	mask = 1U << ((mmTPC1_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9915 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9916 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9917 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9918 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9920 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9924 	mask = 1U << ((mmTPC1_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9925 	mask |= 1U << ((mmTPC1_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9926 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9927 	mask |= 1U << ((mmTPC1_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9928 	mask |= 1U << ((mmTPC1_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9929 	mask |= 1U << ((mmTPC1_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9930 	mask |= 1U << ((mmTPC1_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9931 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9932 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9933 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9934 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9935 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9936 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9937 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9938 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9939 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9940 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9941 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9942 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9943 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9944 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9945 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9946 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9947 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9948 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9949 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9950 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9952 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9957 	mask = 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9958 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9959 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9960 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9961 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9962 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9963 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9964 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9965 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9966 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9967 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9968 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9969 	mask |= 1U << ((mmTPC1_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9970 	mask |= 1U << ((mmTPC1_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9971 	mask |= 1U << ((mmTPC1_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9973 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9977 	mask = 1U << ((mmTPC1_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9978 	mask |= 1U << ((mmTPC1_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9979 	mask |= 1U << ((mmTPC1_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9980 	mask |= 1U << ((mmTPC1_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9981 	mask |= 1U << ((mmTPC1_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9982 	mask |= 1U << ((mmTPC1_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9983 	mask |= 1U << ((mmTPC1_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9984 	mask |= 1U << ((mmTPC1_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9985 	mask |= 1U << ((mmTPC1_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9986 	mask |= 1U << ((mmTPC1_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9987 	mask |= 1U << ((mmTPC1_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9988 	mask |= 1U << ((mmTPC1_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9989 	mask |= 1U << ((mmTPC1_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9990 	mask |= 1U << ((mmTPC1_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9991 	mask |= 1U << ((mmTPC1_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
9993 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
9998 	mask = 1U << ((mmTPC1_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10000 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10004 	mask = 1U << ((mmTPC1_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10006 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10010 	mask = 1U << ((mmTPC1_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10011 	mask |= 1U << ((mmTPC1_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10012 	mask |= 1U << ((mmTPC1_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10013 	mask |= 1U << ((mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10014 	mask |= 1U << ((mmTPC1_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10015 	mask |= 1U << ((mmTPC1_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10016 	mask |= 1U << ((mmTPC1_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10017 	mask |= 1U << ((mmTPC1_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10018 	mask |= 1U << ((mmTPC1_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10019 	mask |= 1U << ((mmTPC1_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10020 	mask |= 1U << ((mmTPC1_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10021 	mask |= 1U << ((mmTPC1_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10022 	mask |= 1U << ((mmTPC1_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10023 	mask |= 1U << ((mmTPC1_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10024 	mask |= 1U << ((mmTPC1_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10025 	mask |= 1U << ((mmTPC1_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10026 	mask |= 1U << ((mmTPC1_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10028 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10033 	mask = 1U << ((mmTPC1_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10034 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10035 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10036 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10037 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10038 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10039 	mask |= 1U << ((mmTPC1_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10040 	mask |= 1U << ((mmTPC1_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10041 	mask |= 1U << ((mmTPC1_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10042 	mask |= 1U << ((mmTPC1_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10043 	mask |= 1U << ((mmTPC1_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10044 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10045 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10046 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10047 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10048 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10049 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10050 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10051 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10052 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10053 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10054 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10055 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10057 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10064 	mask = 1U << ((mmTPC2_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10065 	mask |= 1U << ((mmTPC2_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10066 	mask |= 1U << ((mmTPC2_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10067 	mask |= 1U << ((mmTPC2_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10068 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10069 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10070 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10071 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10072 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10073 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10074 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10075 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10076 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10077 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10078 	mask |= 1U << ((mmTPC2_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10079 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10080 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10081 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10082 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10083 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10084 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10085 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10086 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10087 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10088 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10089 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10090 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10091 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10092 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10094 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10098 	mask = 1U << ((mmTPC2_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10099 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10100 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10101 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10102 	mask |= 1U << ((mmTPC2_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10103 	mask |= 1U << ((mmTPC2_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10104 	mask |= 1U << ((mmTPC2_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10105 	mask |= 1U << ((mmTPC2_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10106 	mask |= 1U << ((mmTPC2_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10107 	mask |= 1U << ((mmTPC2_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10108 	mask |= 1U << ((mmTPC2_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10109 	mask |= 1U << ((mmTPC2_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10110 	mask |= 1U << ((mmTPC2_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10111 	mask |= 1U << ((mmTPC2_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10112 	mask |= 1U << ((mmTPC2_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10113 	mask |= 1U << ((mmTPC2_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10114 	mask |= 1U << ((mmTPC2_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10115 	mask |= 1U << ((mmTPC2_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10116 	mask |= 1U << ((mmTPC2_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10117 	mask |= 1U << ((mmTPC2_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10118 	mask |= 1U << ((mmTPC2_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10119 	mask |= 1U << ((mmTPC2_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10120 	mask |= 1U << ((mmTPC2_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10121 	mask |= 1U << ((mmTPC2_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10122 	mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10123 	mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10124 	mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10125 	mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10126 	mask |= 1U << ((mmTPC2_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10127 	mask |= 1U << ((mmTPC2_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10128 	mask |= 1U << ((mmTPC2_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10129 	mask |= 1U << ((mmTPC2_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10131 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10135 	mask = 1U << ((mmTPC2_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10136 	mask |= 1U << ((mmTPC2_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10137 	mask |= 1U << ((mmTPC2_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10138 	mask |= 1U << ((mmTPC2_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10139 	mask |= 1U << ((mmTPC2_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10140 	mask |= 1U << ((mmTPC2_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10141 	mask |= 1U << ((mmTPC2_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10142 	mask |= 1U << ((mmTPC2_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10143 	mask |= 1U << ((mmTPC2_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10144 	mask |= 1U << ((mmTPC2_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10145 	mask |= 1U << ((mmTPC2_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10146 	mask |= 1U << ((mmTPC2_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10147 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10148 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10149 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10151 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10155 	mask = 1U << ((mmTPC2_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10156 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10157 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10158 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10159 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10160 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10161 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10162 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10163 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10164 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10165 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10166 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10167 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10168 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10169 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10170 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10171 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10172 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10173 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10174 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10175 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10176 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10177 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10178 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10179 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10180 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10181 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10182 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10184 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10188 	mask = 1U << ((mmTPC2_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10189 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10190 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10191 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10192 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10193 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10194 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10195 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10196 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10197 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10198 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10199 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10200 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10201 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10202 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10203 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10204 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10205 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10206 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10207 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10208 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10209 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10210 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10211 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10212 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10213 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10214 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10215 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10216 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10217 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10218 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10219 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10221 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10226 	mask = 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10227 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10228 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10229 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10230 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10231 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10232 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10233 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10234 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10235 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10236 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10237 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10238 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10239 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10240 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10241 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10242 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10243 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10244 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10245 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10246 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10247 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10248 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10249 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10250 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10251 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10252 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10253 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10254 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10255 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10256 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10258 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10264 	mask = 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10265 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10267 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10271 	mask = 1U << ((mmTPC2_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10272 	mask |= 1U << ((mmTPC2_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10273 	mask |= 1U << ((mmTPC2_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10274 	mask |= 1U << ((mmTPC2_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10275 	mask |= 1U << ((mmTPC2_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10276 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10277 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10278 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10279 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10280 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10281 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10282 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10283 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10284 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10285 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10286 	mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10287 	mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10288 	mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10290 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10294 	mask = 1U << ((mmTPC2_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10295 	mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10296 	mask |= 1U << ((mmTPC2_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10297 	mask |= 1U << ((mmTPC2_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10299 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10303 	mask = 1U << ((mmTPC2_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10304 	mask |= 1U << ((mmTPC2_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10305 	mask |= 1U << ((mmTPC2_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10306 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10307 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10308 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10309 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10310 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10311 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10312 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10313 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10314 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10315 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10317 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10321 	mask = 1U << ((mmTPC2_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10322 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10323 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10324 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10325 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10326 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10327 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10328 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10329 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10330 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10331 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10332 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10333 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10334 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10335 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10336 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10337 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10338 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10339 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10340 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10341 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10342 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10343 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10344 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10345 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10347 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10352 	mask = 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10353 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10354 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10355 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10356 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10357 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10358 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10359 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10361 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10367 	mask = 1U << ((mmTPC2_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10368 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10369 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10370 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10371 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10373 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10377 	mask = 1U << ((mmTPC2_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10378 	mask |= 1U << ((mmTPC2_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10379 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10380 	mask |= 1U << ((mmTPC2_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10381 	mask |= 1U << ((mmTPC2_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10382 	mask |= 1U << ((mmTPC2_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10383 	mask |= 1U << ((mmTPC2_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10384 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10385 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10386 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10387 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10388 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10389 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10390 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10391 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10392 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10393 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10394 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10395 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10396 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10397 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10398 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10399 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10400 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10401 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10402 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10403 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10405 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10410 	mask = 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10411 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10412 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10413 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10414 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10415 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10416 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10417 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10418 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10419 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10420 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10421 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10422 	mask |= 1U << ((mmTPC2_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10423 	mask |= 1U << ((mmTPC2_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10424 	mask |= 1U << ((mmTPC2_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10426 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10430 	mask = 1U << ((mmTPC2_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10431 	mask |= 1U << ((mmTPC2_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10432 	mask |= 1U << ((mmTPC2_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10433 	mask |= 1U << ((mmTPC2_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10434 	mask |= 1U << ((mmTPC2_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10435 	mask |= 1U << ((mmTPC2_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10436 	mask |= 1U << ((mmTPC2_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10437 	mask |= 1U << ((mmTPC2_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10438 	mask |= 1U << ((mmTPC2_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10439 	mask |= 1U << ((mmTPC2_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10440 	mask |= 1U << ((mmTPC2_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10441 	mask |= 1U << ((mmTPC2_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10442 	mask |= 1U << ((mmTPC2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10443 	mask |= 1U << ((mmTPC2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10444 	mask |= 1U << ((mmTPC2_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10446 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10451 	mask = 1U << ((mmTPC2_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10453 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10457 	mask = 1U << ((mmTPC2_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10459 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10463 	mask = 1U << ((mmTPC2_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10464 	mask |= 1U << ((mmTPC2_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10465 	mask |= 1U << ((mmTPC2_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10466 	mask |= 1U << ((mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10467 	mask |= 1U << ((mmTPC2_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10468 	mask |= 1U << ((mmTPC2_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10469 	mask |= 1U << ((mmTPC2_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10470 	mask |= 1U << ((mmTPC2_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10471 	mask |= 1U << ((mmTPC2_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10472 	mask |= 1U << ((mmTPC2_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10473 	mask |= 1U << ((mmTPC2_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10474 	mask |= 1U << ((mmTPC2_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10475 	mask |= 1U << ((mmTPC2_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10476 	mask |= 1U << ((mmTPC2_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10477 	mask |= 1U << ((mmTPC2_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10478 	mask |= 1U << ((mmTPC2_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10479 	mask |= 1U << ((mmTPC2_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10481 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10486 	mask = 1U << ((mmTPC2_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10487 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10488 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10489 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10490 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10491 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10492 	mask |= 1U << ((mmTPC2_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10493 	mask |= 1U << ((mmTPC2_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10494 	mask |= 1U << ((mmTPC2_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10495 	mask |= 1U << ((mmTPC2_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10496 	mask |= 1U << ((mmTPC2_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10497 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10498 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10499 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10500 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10501 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10502 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10503 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10504 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10505 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10506 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10507 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10508 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10510 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10517 	mask = 1U << ((mmTPC3_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10518 	mask |= 1U << ((mmTPC3_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10519 	mask |= 1U << ((mmTPC3_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10520 	mask |= 1U << ((mmTPC3_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10521 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10522 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10523 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10524 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10525 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10526 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10527 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10528 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10529 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10530 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10531 	mask |= 1U << ((mmTPC3_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10532 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10533 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10534 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10535 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10536 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10537 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10538 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10539 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10540 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10541 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10542 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10543 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10544 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10545 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10547 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10551 	mask = 1U << ((mmTPC3_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10552 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10553 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10554 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10555 	mask |= 1U << ((mmTPC3_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10556 	mask |= 1U << ((mmTPC3_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10557 	mask |= 1U << ((mmTPC3_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10558 	mask |= 1U << ((mmTPC3_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10559 	mask |= 1U << ((mmTPC3_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10560 	mask |= 1U << ((mmTPC3_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10561 	mask |= 1U << ((mmTPC3_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10562 	mask |= 1U << ((mmTPC3_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10563 	mask |= 1U << ((mmTPC3_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10564 	mask |= 1U << ((mmTPC3_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10565 	mask |= 1U << ((mmTPC3_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10566 	mask |= 1U << ((mmTPC3_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10567 	mask |= 1U << ((mmTPC3_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10568 	mask |= 1U << ((mmTPC3_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10569 	mask |= 1U << ((mmTPC3_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10570 	mask |= 1U << ((mmTPC3_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10571 	mask |= 1U << ((mmTPC3_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10572 	mask |= 1U << ((mmTPC3_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10573 	mask |= 1U << ((mmTPC3_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10574 	mask |= 1U << ((mmTPC3_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10575 	mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10576 	mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10577 	mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10578 	mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10579 	mask |= 1U << ((mmTPC3_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10580 	mask |= 1U << ((mmTPC3_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10581 	mask |= 1U << ((mmTPC3_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10582 	mask |= 1U << ((mmTPC3_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10584 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10588 	mask = 1U << ((mmTPC3_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10589 	mask |= 1U << ((mmTPC3_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10590 	mask |= 1U << ((mmTPC3_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10591 	mask |= 1U << ((mmTPC3_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10592 	mask |= 1U << ((mmTPC3_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10593 	mask |= 1U << ((mmTPC3_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10594 	mask |= 1U << ((mmTPC3_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10595 	mask |= 1U << ((mmTPC3_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10596 	mask |= 1U << ((mmTPC3_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10597 	mask |= 1U << ((mmTPC3_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10598 	mask |= 1U << ((mmTPC3_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10599 	mask |= 1U << ((mmTPC3_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10600 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10601 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10602 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10604 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10608 	mask = 1U << ((mmTPC3_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10609 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10610 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10611 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10612 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10613 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10614 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10615 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10616 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10617 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10618 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10619 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10620 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10621 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10622 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10623 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10624 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10625 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10626 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10627 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10628 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10629 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10630 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10631 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10632 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10633 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10634 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10635 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10637 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10641 	mask = 1U << ((mmTPC3_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10642 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10643 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10644 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10645 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10646 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10647 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10648 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10649 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10650 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10651 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10652 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10653 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10654 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10655 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10656 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10657 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10658 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10659 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10660 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10661 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10662 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10663 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10664 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10665 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10666 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10667 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10668 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10669 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10670 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10671 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10672 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10674 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10679 	mask = 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10680 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10681 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10682 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10683 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10684 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10685 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10686 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10687 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10688 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10689 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10690 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10691 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10692 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10693 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10694 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10695 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10696 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10697 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10698 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10699 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10700 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10701 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10702 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10703 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10704 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10705 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10706 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10707 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10708 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10709 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10711 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10717 	mask = 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10718 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10720 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10724 	mask = 1U << ((mmTPC3_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10725 	mask |= 1U << ((mmTPC3_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10726 	mask |= 1U << ((mmTPC3_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10727 	mask |= 1U << ((mmTPC3_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10728 	mask |= 1U << ((mmTPC3_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10729 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10730 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10731 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10732 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10733 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10734 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10735 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10736 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10737 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10738 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10739 	mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10740 	mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10741 	mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10743 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10747 	mask = 1U << ((mmTPC3_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10748 	mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10749 	mask |= 1U << ((mmTPC3_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10750 	mask |= 1U << ((mmTPC3_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10752 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10756 	mask = 1U << ((mmTPC3_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10757 	mask |= 1U << ((mmTPC3_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10758 	mask |= 1U << ((mmTPC3_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10759 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10760 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10761 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10762 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10763 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10764 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10765 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10766 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10767 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10768 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10770 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10774 	mask = 1U << ((mmTPC3_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10775 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10776 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10777 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10778 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10779 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10780 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10781 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10782 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10783 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10784 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10785 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10786 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10787 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10788 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10789 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10790 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10791 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10792 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10793 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10794 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10795 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10796 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10797 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10798 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10800 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10805 	mask = 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10806 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10807 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10808 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10809 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10810 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10811 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10812 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10814 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10820 	mask = 1U << ((mmTPC3_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10821 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10822 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10823 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10824 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10826 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10830 	mask = 1U << ((mmTPC3_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10831 	mask |= 1U << ((mmTPC3_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10832 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10833 	mask |= 1U << ((mmTPC3_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10834 	mask |= 1U << ((mmTPC3_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10835 	mask |= 1U << ((mmTPC3_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10836 	mask |= 1U << ((mmTPC3_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10837 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10838 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10839 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10840 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10841 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10842 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10843 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10844 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10845 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10846 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10847 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10848 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10849 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10850 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10851 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10852 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10853 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10854 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10855 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10856 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10858 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10863 	mask = 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10864 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10865 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10866 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10867 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10868 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10869 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10870 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10871 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10872 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10873 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10874 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10875 	mask |= 1U << ((mmTPC3_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10876 	mask |= 1U << ((mmTPC3_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10877 	mask |= 1U << ((mmTPC3_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10879 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10883 	mask = 1U << ((mmTPC3_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10884 	mask |= 1U << ((mmTPC3_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10885 	mask |= 1U << ((mmTPC3_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10886 	mask |= 1U << ((mmTPC3_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10887 	mask |= 1U << ((mmTPC3_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10888 	mask |= 1U << ((mmTPC3_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10889 	mask |= 1U << ((mmTPC3_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10890 	mask |= 1U << ((mmTPC3_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10891 	mask |= 1U << ((mmTPC3_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10892 	mask |= 1U << ((mmTPC3_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10893 	mask |= 1U << ((mmTPC3_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10894 	mask |= 1U << ((mmTPC3_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10895 	mask |= 1U << ((mmTPC3_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10896 	mask |= 1U << ((mmTPC3_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10897 	mask |= 1U << ((mmTPC3_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10899 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10904 	mask = 1U << ((mmTPC3_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10906 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10910 	mask = 1U << ((mmTPC3_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10912 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10916 	mask = 1U << ((mmTPC3_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10917 	mask |= 1U << ((mmTPC3_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10918 	mask |= 1U << ((mmTPC3_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10919 	mask |= 1U << ((mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10920 	mask |= 1U << ((mmTPC3_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10921 	mask |= 1U << ((mmTPC3_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10922 	mask |= 1U << ((mmTPC3_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10923 	mask |= 1U << ((mmTPC3_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10924 	mask |= 1U << ((mmTPC3_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10925 	mask |= 1U << ((mmTPC3_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10926 	mask |= 1U << ((mmTPC3_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10927 	mask |= 1U << ((mmTPC3_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10928 	mask |= 1U << ((mmTPC3_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10929 	mask |= 1U << ((mmTPC3_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10930 	mask |= 1U << ((mmTPC3_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10931 	mask |= 1U << ((mmTPC3_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10932 	mask |= 1U << ((mmTPC3_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10934 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10939 	mask = 1U << ((mmTPC3_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10940 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10941 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10942 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10943 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10944 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10945 	mask |= 1U << ((mmTPC3_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10946 	mask |= 1U << ((mmTPC3_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10947 	mask |= 1U << ((mmTPC3_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10948 	mask |= 1U << ((mmTPC3_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10949 	mask |= 1U << ((mmTPC3_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10950 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10951 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10952 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10953 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10954 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10955 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10956 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10957 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10958 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10959 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10960 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10961 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10963 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
10970 	mask = 1U << ((mmTPC4_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10971 	mask |= 1U << ((mmTPC4_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10972 	mask |= 1U << ((mmTPC4_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10973 	mask |= 1U << ((mmTPC4_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10974 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10975 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10976 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10977 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10978 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10979 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10980 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10981 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10982 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10983 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10984 	mask |= 1U << ((mmTPC4_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10985 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10986 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10987 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10988 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10989 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10990 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10991 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10992 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10993 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10994 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10995 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10996 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10997 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
10998 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11000 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11004 	mask = 1U << ((mmTPC4_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11005 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11006 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11007 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11008 	mask |= 1U << ((mmTPC4_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11009 	mask |= 1U << ((mmTPC4_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11010 	mask |= 1U << ((mmTPC4_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11011 	mask |= 1U << ((mmTPC4_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11012 	mask |= 1U << ((mmTPC4_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11013 	mask |= 1U << ((mmTPC4_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11014 	mask |= 1U << ((mmTPC4_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11015 	mask |= 1U << ((mmTPC4_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11016 	mask |= 1U << ((mmTPC4_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11017 	mask |= 1U << ((mmTPC4_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11018 	mask |= 1U << ((mmTPC4_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11019 	mask |= 1U << ((mmTPC4_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11020 	mask |= 1U << ((mmTPC4_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11021 	mask |= 1U << ((mmTPC4_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11022 	mask |= 1U << ((mmTPC4_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11023 	mask |= 1U << ((mmTPC4_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11024 	mask |= 1U << ((mmTPC4_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11025 	mask |= 1U << ((mmTPC4_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11026 	mask |= 1U << ((mmTPC4_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11027 	mask |= 1U << ((mmTPC4_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11028 	mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11029 	mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11030 	mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11031 	mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11032 	mask |= 1U << ((mmTPC4_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11033 	mask |= 1U << ((mmTPC4_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11034 	mask |= 1U << ((mmTPC4_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11035 	mask |= 1U << ((mmTPC4_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11037 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11041 	mask = 1U << ((mmTPC4_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11042 	mask |= 1U << ((mmTPC4_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11043 	mask |= 1U << ((mmTPC4_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11044 	mask |= 1U << ((mmTPC4_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11045 	mask |= 1U << ((mmTPC4_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11046 	mask |= 1U << ((mmTPC4_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11047 	mask |= 1U << ((mmTPC4_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11048 	mask |= 1U << ((mmTPC4_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11049 	mask |= 1U << ((mmTPC4_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11050 	mask |= 1U << ((mmTPC4_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11051 	mask |= 1U << ((mmTPC4_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11052 	mask |= 1U << ((mmTPC4_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11053 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11054 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11055 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11057 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11061 	mask = 1U << ((mmTPC4_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11062 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11063 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11064 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11065 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11066 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11067 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11068 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11069 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11070 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11071 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11072 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11073 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11074 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11075 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11076 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11077 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11078 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11079 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11080 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11081 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11082 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11083 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11084 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11085 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11086 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11087 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11088 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11090 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11094 	mask = 1U << ((mmTPC4_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11095 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11096 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11097 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11098 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11099 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11100 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11101 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11102 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11103 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11104 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11105 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11106 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11107 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11108 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11109 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11110 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11111 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11112 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11113 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11114 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11115 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11116 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11117 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11118 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11119 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11120 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11121 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11122 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11123 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11124 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11125 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11127 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11132 	mask = 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11133 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11134 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11135 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11136 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11137 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11138 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11139 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11140 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11141 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11142 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11143 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11144 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11145 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11146 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11147 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11148 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11149 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11150 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11151 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11152 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11153 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11154 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11155 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11156 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11157 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11158 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11159 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11160 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11161 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11162 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11164 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11170 	mask = 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11171 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11173 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11177 	mask = 1U << ((mmTPC4_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11178 	mask |= 1U << ((mmTPC4_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11179 	mask |= 1U << ((mmTPC4_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11180 	mask |= 1U << ((mmTPC4_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11181 	mask |= 1U << ((mmTPC4_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11182 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11183 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11184 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11185 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11186 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11187 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11188 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11189 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11190 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11191 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11192 	mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11193 	mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11194 	mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11196 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11200 	mask = 1U << ((mmTPC4_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11201 	mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11202 	mask |= 1U << ((mmTPC4_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11203 	mask |= 1U << ((mmTPC4_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11205 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11209 	mask = 1U << ((mmTPC4_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11210 	mask |= 1U << ((mmTPC4_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11211 	mask |= 1U << ((mmTPC4_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11212 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11213 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11214 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11215 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11216 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11217 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11218 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11219 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11220 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11221 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11223 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11227 	mask = 1U << ((mmTPC4_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11228 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11229 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11230 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11231 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11232 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11233 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11234 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11235 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11236 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11237 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11238 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11239 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11240 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11241 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11242 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11243 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11244 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11245 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11246 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11247 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11248 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11249 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11250 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11251 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11253 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11258 	mask = 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11259 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11260 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11261 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11262 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11263 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11264 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11265 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11267 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11273 	mask = 1U << ((mmTPC4_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11274 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11275 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11276 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11277 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11279 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11283 	mask = 1U << ((mmTPC4_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11284 	mask |= 1U << ((mmTPC4_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11285 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11286 	mask |= 1U << ((mmTPC4_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11287 	mask |= 1U << ((mmTPC4_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11288 	mask |= 1U << ((mmTPC4_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11289 	mask |= 1U << ((mmTPC4_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11290 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11291 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11292 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11293 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11294 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11295 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11296 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11297 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11298 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11299 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11300 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11301 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11302 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11303 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11304 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11305 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11306 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11307 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11308 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11309 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11311 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11316 	mask = 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11317 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11318 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11319 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11320 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11321 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11322 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11323 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11324 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11325 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11326 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11327 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11328 	mask |= 1U << ((mmTPC4_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11329 	mask |= 1U << ((mmTPC4_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11330 	mask |= 1U << ((mmTPC4_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11332 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11336 	mask = 1U << ((mmTPC4_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11337 	mask |= 1U << ((mmTPC4_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11338 	mask |= 1U << ((mmTPC4_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11339 	mask |= 1U << ((mmTPC4_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11340 	mask |= 1U << ((mmTPC4_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11341 	mask |= 1U << ((mmTPC4_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11342 	mask |= 1U << ((mmTPC4_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11343 	mask |= 1U << ((mmTPC4_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11344 	mask |= 1U << ((mmTPC4_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11345 	mask |= 1U << ((mmTPC4_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11346 	mask |= 1U << ((mmTPC4_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11347 	mask |= 1U << ((mmTPC4_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11348 	mask |= 1U << ((mmTPC4_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11349 	mask |= 1U << ((mmTPC4_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11350 	mask |= 1U << ((mmTPC4_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11352 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11357 	mask = 1U << ((mmTPC4_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11359 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11363 	mask = 1U << ((mmTPC4_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11365 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11369 	mask = 1U << ((mmTPC4_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11370 	mask |= 1U << ((mmTPC4_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11371 	mask |= 1U << ((mmTPC4_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11372 	mask |= 1U << ((mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11373 	mask |= 1U << ((mmTPC4_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11374 	mask |= 1U << ((mmTPC4_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11375 	mask |= 1U << ((mmTPC4_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11376 	mask |= 1U << ((mmTPC4_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11377 	mask |= 1U << ((mmTPC4_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11378 	mask |= 1U << ((mmTPC4_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11379 	mask |= 1U << ((mmTPC4_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11380 	mask |= 1U << ((mmTPC4_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11381 	mask |= 1U << ((mmTPC4_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11382 	mask |= 1U << ((mmTPC4_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11383 	mask |= 1U << ((mmTPC4_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11384 	mask |= 1U << ((mmTPC4_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11385 	mask |= 1U << ((mmTPC4_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11387 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11392 	mask = 1U << ((mmTPC4_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11393 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11394 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11395 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11396 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11397 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11398 	mask |= 1U << ((mmTPC4_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11399 	mask |= 1U << ((mmTPC4_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11400 	mask |= 1U << ((mmTPC4_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11401 	mask |= 1U << ((mmTPC4_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11402 	mask |= 1U << ((mmTPC4_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11403 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11404 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11405 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11406 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11407 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11408 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11409 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11410 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11411 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11412 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11413 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11414 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11416 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11423 	mask = 1U << ((mmTPC5_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11424 	mask |= 1U << ((mmTPC5_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11425 	mask |= 1U << ((mmTPC5_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11426 	mask |= 1U << ((mmTPC5_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11427 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11428 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11429 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11430 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11431 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11432 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11433 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11434 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11435 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11436 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11437 	mask |= 1U << ((mmTPC5_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11438 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11439 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11440 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11441 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11442 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11443 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11444 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11445 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11446 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11447 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11448 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11449 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11450 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11451 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11453 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11457 	mask = 1U << ((mmTPC5_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11458 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11459 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11460 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11461 	mask |= 1U << ((mmTPC5_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11462 	mask |= 1U << ((mmTPC5_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11463 	mask |= 1U << ((mmTPC5_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11464 	mask |= 1U << ((mmTPC5_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11465 	mask |= 1U << ((mmTPC5_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11466 	mask |= 1U << ((mmTPC5_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11467 	mask |= 1U << ((mmTPC5_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11468 	mask |= 1U << ((mmTPC5_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11469 	mask |= 1U << ((mmTPC5_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11470 	mask |= 1U << ((mmTPC5_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11471 	mask |= 1U << ((mmTPC5_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11472 	mask |= 1U << ((mmTPC5_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11473 	mask |= 1U << ((mmTPC5_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11474 	mask |= 1U << ((mmTPC5_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11475 	mask |= 1U << ((mmTPC5_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11476 	mask |= 1U << ((mmTPC5_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11477 	mask |= 1U << ((mmTPC5_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11478 	mask |= 1U << ((mmTPC5_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11479 	mask |= 1U << ((mmTPC5_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11480 	mask |= 1U << ((mmTPC5_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11481 	mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11482 	mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11483 	mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11484 	mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11485 	mask |= 1U << ((mmTPC5_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11486 	mask |= 1U << ((mmTPC5_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11487 	mask |= 1U << ((mmTPC5_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11488 	mask |= 1U << ((mmTPC5_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11490 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11494 	mask = 1U << ((mmTPC5_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11495 	mask |= 1U << ((mmTPC5_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11496 	mask |= 1U << ((mmTPC5_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11497 	mask |= 1U << ((mmTPC5_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11498 	mask |= 1U << ((mmTPC5_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11499 	mask |= 1U << ((mmTPC5_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11500 	mask |= 1U << ((mmTPC5_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11501 	mask |= 1U << ((mmTPC5_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11502 	mask |= 1U << ((mmTPC5_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11503 	mask |= 1U << ((mmTPC5_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11504 	mask |= 1U << ((mmTPC5_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11505 	mask |= 1U << ((mmTPC5_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11506 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11507 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11508 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11510 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11514 	mask = 1U << ((mmTPC5_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11515 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11516 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11517 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11518 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11519 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11520 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11521 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11522 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11523 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11524 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11525 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11526 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11527 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11528 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11529 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11530 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11531 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11532 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11533 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11534 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11535 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11536 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11537 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11538 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11539 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11540 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11541 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11543 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11547 	mask = 1U << ((mmTPC5_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11548 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11549 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11550 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11551 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11552 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11553 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11554 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11555 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11556 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11557 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11558 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11559 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11560 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11561 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11562 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11563 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11564 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11565 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11566 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11567 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11568 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11569 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11570 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11571 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11572 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11573 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11574 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11575 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11576 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11577 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11578 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11580 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11585 	mask = 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11586 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11587 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11588 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11589 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11590 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11591 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11592 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11593 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11594 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11595 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11596 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11597 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11598 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11599 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11600 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11601 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11602 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11603 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11604 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11605 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11606 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11607 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11608 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11609 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11610 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11611 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11612 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11613 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11614 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11615 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11617 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11623 	mask = 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11624 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11626 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11630 	mask = 1U << ((mmTPC5_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11631 	mask |= 1U << ((mmTPC5_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11632 	mask |= 1U << ((mmTPC5_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11633 	mask |= 1U << ((mmTPC5_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11634 	mask |= 1U << ((mmTPC5_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11635 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11636 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11637 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11638 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11639 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11640 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11641 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11642 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11643 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11644 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11645 	mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11646 	mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11647 	mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11649 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11653 	mask = 1U << ((mmTPC5_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11654 	mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11655 	mask |= 1U << ((mmTPC5_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11656 	mask |= 1U << ((mmTPC5_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11658 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11662 	mask = 1U << ((mmTPC5_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11663 	mask |= 1U << ((mmTPC5_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11664 	mask |= 1U << ((mmTPC5_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11665 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11666 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11667 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11668 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11669 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11670 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11671 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11672 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11673 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11674 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11676 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11680 	mask = 1U << ((mmTPC5_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11681 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11682 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11683 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11684 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11685 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11686 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11687 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11688 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11689 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11690 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11691 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11692 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11693 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11694 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11695 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11696 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11697 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11698 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11699 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11700 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11701 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11702 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11703 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11704 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11706 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11711 	mask = 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11712 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11713 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11714 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11715 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11716 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11717 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11718 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11720 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11726 	mask = 1U << ((mmTPC5_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11727 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11728 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11729 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11730 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11732 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11736 	mask = 1U << ((mmTPC5_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11737 	mask |= 1U << ((mmTPC5_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11738 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11739 	mask |= 1U << ((mmTPC5_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11740 	mask |= 1U << ((mmTPC5_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11741 	mask |= 1U << ((mmTPC5_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11742 	mask |= 1U << ((mmTPC5_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11743 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11744 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11745 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11746 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11747 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11748 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11749 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11750 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11751 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11752 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11753 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11754 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11755 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11756 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11757 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11758 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11759 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11760 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11761 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11762 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11764 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11769 	mask = 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11770 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11771 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11772 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11773 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11774 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11775 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11776 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11777 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11778 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11779 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11780 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11781 	mask |= 1U << ((mmTPC5_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11782 	mask |= 1U << ((mmTPC5_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11783 	mask |= 1U << ((mmTPC5_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11785 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11789 	mask = 1U << ((mmTPC5_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11790 	mask |= 1U << ((mmTPC5_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11791 	mask |= 1U << ((mmTPC5_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11792 	mask |= 1U << ((mmTPC5_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11793 	mask |= 1U << ((mmTPC5_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11794 	mask |= 1U << ((mmTPC5_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11795 	mask |= 1U << ((mmTPC5_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11796 	mask |= 1U << ((mmTPC5_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11797 	mask |= 1U << ((mmTPC5_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11798 	mask |= 1U << ((mmTPC5_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11799 	mask |= 1U << ((mmTPC5_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11800 	mask |= 1U << ((mmTPC5_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11801 	mask |= 1U << ((mmTPC5_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11802 	mask |= 1U << ((mmTPC5_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11803 	mask |= 1U << ((mmTPC5_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11805 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11810 	mask = 1U << ((mmTPC5_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11812 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11816 	mask = 1U << ((mmTPC5_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11818 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11822 	mask = 1U << ((mmTPC5_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11823 	mask |= 1U << ((mmTPC5_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11824 	mask |= 1U << ((mmTPC5_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11825 	mask |= 1U << ((mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11826 	mask |= 1U << ((mmTPC5_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11827 	mask |= 1U << ((mmTPC5_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11828 	mask |= 1U << ((mmTPC5_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11829 	mask |= 1U << ((mmTPC5_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11830 	mask |= 1U << ((mmTPC5_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11831 	mask |= 1U << ((mmTPC5_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11832 	mask |= 1U << ((mmTPC5_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11833 	mask |= 1U << ((mmTPC5_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11834 	mask |= 1U << ((mmTPC5_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11835 	mask |= 1U << ((mmTPC5_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11836 	mask |= 1U << ((mmTPC5_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11837 	mask |= 1U << ((mmTPC5_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11838 	mask |= 1U << ((mmTPC5_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11840 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11845 	mask = 1U << ((mmTPC5_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11846 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11847 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11848 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11849 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11850 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11851 	mask |= 1U << ((mmTPC5_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11852 	mask |= 1U << ((mmTPC5_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11853 	mask |= 1U << ((mmTPC5_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11854 	mask |= 1U << ((mmTPC5_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11855 	mask |= 1U << ((mmTPC5_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11856 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11857 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11858 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11859 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11860 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11861 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11862 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11863 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11864 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11865 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11866 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11867 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11869 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11876 	mask = 1U << ((mmTPC6_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11877 	mask |= 1U << ((mmTPC6_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11878 	mask |= 1U << ((mmTPC6_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11879 	mask |= 1U << ((mmTPC6_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11880 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11881 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11882 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11883 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11884 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11885 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11886 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11887 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11888 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11889 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11890 	mask |= 1U << ((mmTPC6_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11891 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11892 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11893 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11894 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11895 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11896 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11897 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11898 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11899 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11900 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11901 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11902 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11903 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11904 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11906 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11910 	mask = 1U << ((mmTPC6_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11911 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11912 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11913 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11914 	mask |= 1U << ((mmTPC6_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11915 	mask |= 1U << ((mmTPC6_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11916 	mask |= 1U << ((mmTPC6_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11917 	mask |= 1U << ((mmTPC6_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11918 	mask |= 1U << ((mmTPC6_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11919 	mask |= 1U << ((mmTPC6_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11920 	mask |= 1U << ((mmTPC6_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11921 	mask |= 1U << ((mmTPC6_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11922 	mask |= 1U << ((mmTPC6_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11923 	mask |= 1U << ((mmTPC6_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11924 	mask |= 1U << ((mmTPC6_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11925 	mask |= 1U << ((mmTPC6_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11926 	mask |= 1U << ((mmTPC6_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11927 	mask |= 1U << ((mmTPC6_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11928 	mask |= 1U << ((mmTPC6_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11929 	mask |= 1U << ((mmTPC6_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11930 	mask |= 1U << ((mmTPC6_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11931 	mask |= 1U << ((mmTPC6_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11932 	mask |= 1U << ((mmTPC6_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11933 	mask |= 1U << ((mmTPC6_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11934 	mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11935 	mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11936 	mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11937 	mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11938 	mask |= 1U << ((mmTPC6_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11939 	mask |= 1U << ((mmTPC6_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11940 	mask |= 1U << ((mmTPC6_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11941 	mask |= 1U << ((mmTPC6_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11943 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11947 	mask = 1U << ((mmTPC6_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11948 	mask |= 1U << ((mmTPC6_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11949 	mask |= 1U << ((mmTPC6_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11950 	mask |= 1U << ((mmTPC6_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11951 	mask |= 1U << ((mmTPC6_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11952 	mask |= 1U << ((mmTPC6_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11953 	mask |= 1U << ((mmTPC6_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11954 	mask |= 1U << ((mmTPC6_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11955 	mask |= 1U << ((mmTPC6_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11956 	mask |= 1U << ((mmTPC6_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11957 	mask |= 1U << ((mmTPC6_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11958 	mask |= 1U << ((mmTPC6_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11959 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11960 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11961 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11963 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
11967 	mask = 1U << ((mmTPC6_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11968 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11969 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11970 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11971 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11972 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11973 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11974 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11975 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11976 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11977 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11978 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11979 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11980 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11981 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11982 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11983 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11984 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11985 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11986 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11987 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11988 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11989 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11990 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11991 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11992 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11993 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11994 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
11996 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12000 	mask = 1U << ((mmTPC6_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12001 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12002 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12003 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12004 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12005 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12006 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12007 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12008 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12009 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12010 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12011 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12012 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12013 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12014 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12015 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12016 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12017 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12018 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12019 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12020 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12021 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12022 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12023 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12024 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12025 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12026 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12027 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12028 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12029 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12030 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12031 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12033 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12038 	mask = 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12039 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12040 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12041 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12042 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12043 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12044 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12045 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12046 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12047 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12048 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12049 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12050 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12051 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12052 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12053 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12054 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12055 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12056 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12057 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12058 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12059 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12060 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12061 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12062 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12063 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12064 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12065 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12066 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12067 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12068 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12070 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12076 	mask = 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12077 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12079 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12083 	mask = 1U << ((mmTPC6_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12084 	mask |= 1U << ((mmTPC6_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12085 	mask |= 1U << ((mmTPC6_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12086 	mask |= 1U << ((mmTPC6_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12087 	mask |= 1U << ((mmTPC6_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12088 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12089 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12090 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12091 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12092 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12093 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12094 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12095 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12096 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12097 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12098 	mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12099 	mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12100 	mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12102 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12106 	mask = 1U << ((mmTPC6_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12107 	mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12108 	mask |= 1U << ((mmTPC6_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12109 	mask |= 1U << ((mmTPC6_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12111 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12115 	mask = 1U << ((mmTPC6_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12116 	mask |= 1U << ((mmTPC6_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12117 	mask |= 1U << ((mmTPC6_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12118 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12119 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12120 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12121 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12122 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12123 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12124 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12125 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12126 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12127 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12129 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12133 	mask = 1U << ((mmTPC6_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12134 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12135 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12136 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12137 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12138 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12139 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12140 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12141 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12142 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12143 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12144 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12145 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12146 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12147 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12148 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12149 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12150 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12151 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12152 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12153 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12154 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12155 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12156 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12157 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12159 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12164 	mask = 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12165 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12166 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12167 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12168 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12169 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12170 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12171 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12173 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12180 	mask = 1U << ((mmTPC6_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12181 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12182 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12183 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12184 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12186 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12190 	mask = 1U << ((mmTPC6_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12191 	mask |= 1U << ((mmTPC6_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12192 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12193 	mask |= 1U << ((mmTPC6_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12194 	mask |= 1U << ((mmTPC6_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12195 	mask |= 1U << ((mmTPC6_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12196 	mask |= 1U << ((mmTPC6_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12197 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12198 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12199 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12200 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12201 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12202 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12203 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12204 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12205 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12206 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12207 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12208 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12209 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12210 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12211 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12212 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12213 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12214 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12215 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12216 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12218 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12223 	mask = 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12224 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12225 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12226 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12227 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12228 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12229 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12230 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12231 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12232 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12233 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12234 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12235 	mask |= 1U << ((mmTPC6_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12236 	mask |= 1U << ((mmTPC6_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12237 	mask |= 1U << ((mmTPC6_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12239 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12243 	mask = 1U << ((mmTPC6_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12244 	mask |= 1U << ((mmTPC6_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12245 	mask |= 1U << ((mmTPC6_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12246 	mask |= 1U << ((mmTPC6_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12247 	mask |= 1U << ((mmTPC6_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12248 	mask |= 1U << ((mmTPC6_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12249 	mask |= 1U << ((mmTPC6_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12250 	mask |= 1U << ((mmTPC6_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12251 	mask |= 1U << ((mmTPC6_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12252 	mask |= 1U << ((mmTPC6_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12253 	mask |= 1U << ((mmTPC6_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12254 	mask |= 1U << ((mmTPC6_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12255 	mask |= 1U << ((mmTPC6_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12256 	mask |= 1U << ((mmTPC6_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12257 	mask |= 1U << ((mmTPC6_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12259 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12265 	mask = 1U << ((mmTPC6_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12267 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12271 	mask = 1U << ((mmTPC6_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12273 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12277 	mask = 1U << ((mmTPC6_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12278 	mask |= 1U << ((mmTPC6_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12279 	mask |= 1U << ((mmTPC6_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12280 	mask |= 1U << ((mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12281 	mask |= 1U << ((mmTPC6_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12282 	mask |= 1U << ((mmTPC6_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12283 	mask |= 1U << ((mmTPC6_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12284 	mask |= 1U << ((mmTPC6_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12285 	mask |= 1U << ((mmTPC6_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12286 	mask |= 1U << ((mmTPC6_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12287 	mask |= 1U << ((mmTPC6_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12288 	mask |= 1U << ((mmTPC6_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12289 	mask |= 1U << ((mmTPC6_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12290 	mask |= 1U << ((mmTPC6_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12291 	mask |= 1U << ((mmTPC6_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12292 	mask |= 1U << ((mmTPC6_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12293 	mask |= 1U << ((mmTPC6_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12295 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12300 	mask = 1U << ((mmTPC6_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12301 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12302 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12303 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12304 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12305 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12306 	mask |= 1U << ((mmTPC6_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12307 	mask |= 1U << ((mmTPC6_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12308 	mask |= 1U << ((mmTPC6_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12309 	mask |= 1U << ((mmTPC6_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12310 	mask |= 1U << ((mmTPC6_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12311 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12312 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12313 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12314 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12315 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12316 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12317 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12318 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12319 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12320 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12321 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12322 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12324 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12331 	mask = 1U << ((mmTPC7_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12332 	mask |= 1U << ((mmTPC7_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12333 	mask |= 1U << ((mmTPC7_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12334 	mask |= 1U << ((mmTPC7_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12335 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12336 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12337 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12338 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12339 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12340 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12341 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12342 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12343 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12344 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12345 	mask |= 1U << ((mmTPC7_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12346 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12347 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12348 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12349 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12350 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12351 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12352 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12353 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12354 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12355 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12356 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12357 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12358 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12359 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12361 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12365 	mask = 1U << ((mmTPC7_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12366 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12367 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12368 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12369 	mask |= 1U << ((mmTPC7_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12370 	mask |= 1U << ((mmTPC7_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12371 	mask |= 1U << ((mmTPC7_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12372 	mask |= 1U << ((mmTPC7_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12373 	mask |= 1U << ((mmTPC7_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12374 	mask |= 1U << ((mmTPC7_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12375 	mask |= 1U << ((mmTPC7_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12376 	mask |= 1U << ((mmTPC7_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12377 	mask |= 1U << ((mmTPC7_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12378 	mask |= 1U << ((mmTPC7_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12379 	mask |= 1U << ((mmTPC7_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12380 	mask |= 1U << ((mmTPC7_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12381 	mask |= 1U << ((mmTPC7_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12382 	mask |= 1U << ((mmTPC7_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12383 	mask |= 1U << ((mmTPC7_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12384 	mask |= 1U << ((mmTPC7_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12385 	mask |= 1U << ((mmTPC7_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12386 	mask |= 1U << ((mmTPC7_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12387 	mask |= 1U << ((mmTPC7_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12388 	mask |= 1U << ((mmTPC7_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12389 	mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12390 	mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12391 	mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12392 	mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12393 	mask |= 1U << ((mmTPC7_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12394 	mask |= 1U << ((mmTPC7_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12395 	mask |= 1U << ((mmTPC7_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12396 	mask |= 1U << ((mmTPC7_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12398 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12402 	mask = 1U << ((mmTPC7_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12403 	mask |= 1U << ((mmTPC7_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12404 	mask |= 1U << ((mmTPC7_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12405 	mask |= 1U << ((mmTPC7_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12406 	mask |= 1U << ((mmTPC7_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12407 	mask |= 1U << ((mmTPC7_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12408 	mask |= 1U << ((mmTPC7_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12409 	mask |= 1U << ((mmTPC7_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12410 	mask |= 1U << ((mmTPC7_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12411 	mask |= 1U << ((mmTPC7_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12412 	mask |= 1U << ((mmTPC7_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12413 	mask |= 1U << ((mmTPC7_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12414 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12415 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12416 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12418 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12422 	mask = 1U << ((mmTPC7_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12423 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12424 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12425 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12426 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12427 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12428 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12429 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12430 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12431 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12432 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12433 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12434 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12435 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12436 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12437 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12438 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12439 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12440 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12441 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12442 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12443 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12444 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12445 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12446 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12447 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12448 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12449 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12451 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12455 	mask = 1U << ((mmTPC7_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12456 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12457 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12458 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12459 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12460 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12461 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12462 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12463 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12464 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12465 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12466 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12467 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12468 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12469 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12470 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12471 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12472 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12473 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12474 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12475 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12476 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12477 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12478 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12479 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12480 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12481 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12482 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12483 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12484 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12485 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12486 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12488 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12493 	mask = 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12494 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12495 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12496 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12497 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12498 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12499 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12500 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12501 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12502 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12503 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12504 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12505 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12506 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12507 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12508 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12509 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12510 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12511 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12512 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12513 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12514 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12515 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12516 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12517 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12518 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12519 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12520 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12521 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12522 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12523 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12525 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12533 	mask = 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12534 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12536 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12540 	mask = 1U << ((mmTPC7_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12541 	mask |= 1U << ((mmTPC7_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12542 	mask |= 1U << ((mmTPC7_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12543 	mask |= 1U << ((mmTPC7_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12544 	mask |= 1U << ((mmTPC7_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12545 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12546 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12547 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12548 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12549 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12550 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12551 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12552 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12553 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12554 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12555 	mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12556 	mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12557 	mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12559 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12563 	mask = 1U << ((mmTPC7_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12564 	mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12565 	mask |= 1U << ((mmTPC7_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12566 	mask |= 1U << ((mmTPC7_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12568 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12572 	mask = 1U << ((mmTPC7_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12573 	mask |= 1U << ((mmTPC7_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12574 	mask |= 1U << ((mmTPC7_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12575 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12576 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12577 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12578 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12579 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12580 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12581 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12582 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12583 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12584 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12586 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12590 	mask = 1U << ((mmTPC7_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12591 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12592 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12593 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12594 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12595 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12596 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12597 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12598 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12599 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12600 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12601 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12602 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12603 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12604 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12605 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12606 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12607 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12608 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12609 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12610 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12611 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12612 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12613 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12614 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12616 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12621 	mask = 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12622 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12623 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12624 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12625 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12626 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12627 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12628 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12630 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12636 	mask = 1U << ((mmTPC7_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12637 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12638 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12639 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12640 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12642 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12646 	mask = 1U << ((mmTPC7_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12647 	mask |= 1U << ((mmTPC7_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12648 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12649 	mask |= 1U << ((mmTPC7_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12650 	mask |= 1U << ((mmTPC7_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12651 	mask |= 1U << ((mmTPC7_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12652 	mask |= 1U << ((mmTPC7_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12653 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12654 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12655 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12656 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12657 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12658 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12659 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12660 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12661 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12662 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12663 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12664 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12665 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12666 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12667 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12668 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12669 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12670 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12671 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12672 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12674 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12679 	mask = 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12680 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12681 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12682 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12683 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12684 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12685 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12686 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12687 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12688 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12689 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12690 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12691 	mask |= 1U << ((mmTPC7_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12692 	mask |= 1U << ((mmTPC7_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12693 	mask |= 1U << ((mmTPC7_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12695 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12699 	mask = 1U << ((mmTPC7_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12700 	mask |= 1U << ((mmTPC7_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12701 	mask |= 1U << ((mmTPC7_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12702 	mask |= 1U << ((mmTPC7_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12703 	mask |= 1U << ((mmTPC7_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12704 	mask |= 1U << ((mmTPC7_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12705 	mask |= 1U << ((mmTPC7_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12706 	mask |= 1U << ((mmTPC7_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12707 	mask |= 1U << ((mmTPC7_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12708 	mask |= 1U << ((mmTPC7_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12709 	mask |= 1U << ((mmTPC7_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12710 	mask |= 1U << ((mmTPC7_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12711 	mask |= 1U << ((mmTPC7_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12712 	mask |= 1U << ((mmTPC7_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12713 	mask |= 1U << ((mmTPC7_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12715 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12720 	mask = 1U << ((mmTPC7_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12722 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12726 	mask = 1U << ((mmTPC7_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12728 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12732 	mask = 1U << ((mmTPC7_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12733 	mask |= 1U << ((mmTPC7_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12734 	mask |= 1U << ((mmTPC7_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12735 	mask |= 1U << ((mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12736 	mask |= 1U << ((mmTPC7_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12737 	mask |= 1U << ((mmTPC7_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12738 	mask |= 1U << ((mmTPC7_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12739 	mask |= 1U << ((mmTPC7_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12740 	mask |= 1U << ((mmTPC7_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12741 	mask |= 1U << ((mmTPC7_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12742 	mask |= 1U << ((mmTPC7_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12743 	mask |= 1U << ((mmTPC7_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12744 	mask |= 1U << ((mmTPC7_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12745 	mask |= 1U << ((mmTPC7_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12746 	mask |= 1U << ((mmTPC7_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12747 	mask |= 1U << ((mmTPC7_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12748 	mask |= 1U << ((mmTPC7_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12750 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
12755 	mask = 1U << ((mmTPC7_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12756 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12757 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12758 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12759 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12760 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12761 	mask |= 1U << ((mmTPC7_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12762 	mask |= 1U << ((mmTPC7_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12763 	mask |= 1U << ((mmTPC7_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12764 	mask |= 1U << ((mmTPC7_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12765 	mask |= 1U << ((mmTPC7_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12766 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12767 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12768 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12769 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12770 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12771 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12772 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12773 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12774 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12775 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12776 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12777 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
12779 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()