34 	struct vxge_hw_vpath_reg __iomem *vp_reg;  in vxge_hw_vpath_intr_enable()  local
48 	vp_reg = vpath->vp_reg;  in vxge_hw_vpath_intr_enable()
50 	writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_reg);  in vxge_hw_vpath_intr_enable()
53 			&vp_reg->general_errors_reg);  in vxge_hw_vpath_intr_enable()
56 			&vp_reg->pci_config_errors_reg);  in vxge_hw_vpath_intr_enable()
59 			&vp_reg->mrpcim_to_vpath_alarm_reg);  in vxge_hw_vpath_intr_enable()
62 			&vp_reg->srpcim_to_vpath_alarm_reg);  in vxge_hw_vpath_intr_enable()
65 			&vp_reg->vpath_ppif_int_status);  in vxge_hw_vpath_intr_enable()
68 			&vp_reg->srpcim_msg_to_vpath_reg);  in vxge_hw_vpath_intr_enable()
71 			&vp_reg->vpath_pcipif_int_status);  in vxge_hw_vpath_intr_enable()
74 			&vp_reg->prc_alarm_reg);  in vxge_hw_vpath_intr_enable()
77 			&vp_reg->wrdma_alarm_status);  in vxge_hw_vpath_intr_enable()
80 			&vp_reg->asic_ntwk_vp_err_reg);  in vxge_hw_vpath_intr_enable()
83 			&vp_reg->xgmac_vp_int_status);  in vxge_hw_vpath_intr_enable()
85 	readq(&vp_reg->vpath_general_int_status);  in vxge_hw_vpath_intr_enable()
90 			&vp_reg->vpath_pcipif_int_mask);  in vxge_hw_vpath_intr_enable()
93 			&vp_reg->srpcim_msg_to_vpath_mask);  in vxge_hw_vpath_intr_enable()
96 			&vp_reg->srpcim_to_vpath_alarm_mask);  in vxge_hw_vpath_intr_enable()
99 			&vp_reg->mrpcim_to_vpath_alarm_mask);  in vxge_hw_vpath_intr_enable()
102 			&vp_reg->pci_config_errors_mask);  in vxge_hw_vpath_intr_enable()
110 		&vp_reg->general_errors_mask);  in vxge_hw_vpath_intr_enable()
119 		&vp_reg->kdfcctl_errors_mask);  in vxge_hw_vpath_intr_enable()
121 	__vxge_hw_pio_mem_write32_upper(0, &vp_reg->vpath_ppif_int_mask);  in vxge_hw_vpath_intr_enable()
125 		&vp_reg->prc_alarm_mask);  in vxge_hw_vpath_intr_enable()
127 	__vxge_hw_pio_mem_write32_upper(0, &vp_reg->wrdma_alarm_mask);  in vxge_hw_vpath_intr_enable()
128 	__vxge_hw_pio_mem_write32_upper(0, &vp_reg->xgmac_vp_int_mask);  in vxge_hw_vpath_intr_enable()
132 			&vp_reg->asic_ntwk_vp_err_mask);  in vxge_hw_vpath_intr_enable()
137 		&vp_reg->asic_ntwk_vp_err_mask);  in vxge_hw_vpath_intr_enable()
140 		&vp_reg->vpath_general_int_mask);  in vxge_hw_vpath_intr_enable()
160 	struct vxge_hw_vpath_reg __iomem *vp_reg;  in vxge_hw_vpath_intr_disable()  local
172 	vp_reg = vpath->vp_reg;  in vxge_hw_vpath_intr_disable()
176 		&vp_reg->vpath_general_int_mask);  in vxge_hw_vpath_intr_disable()
178 	writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_mask);  in vxge_hw_vpath_intr_disable()
181 			&vp_reg->general_errors_mask);  in vxge_hw_vpath_intr_disable()
184 			&vp_reg->pci_config_errors_mask);  in vxge_hw_vpath_intr_disable()
187 			&vp_reg->mrpcim_to_vpath_alarm_mask);  in vxge_hw_vpath_intr_disable()
190 			&vp_reg->srpcim_to_vpath_alarm_mask);  in vxge_hw_vpath_intr_disable()
193 			&vp_reg->vpath_ppif_int_mask);  in vxge_hw_vpath_intr_disable()
196 			&vp_reg->srpcim_msg_to_vpath_mask);  in vxge_hw_vpath_intr_disable()
199 			&vp_reg->vpath_pcipif_int_mask);  in vxge_hw_vpath_intr_disable()
202 			&vp_reg->wrdma_alarm_mask);  in vxge_hw_vpath_intr_disable()
205 			&vp_reg->prc_alarm_mask);  in vxge_hw_vpath_intr_disable()
208 			&vp_reg->xgmac_vp_int_mask);  in vxge_hw_vpath_intr_disable()
211 			&vp_reg->asic_ntwk_vp_err_mask);  in vxge_hw_vpath_intr_disable()
219 	struct vxge_hw_vpath_reg __iomem *vp_reg;  in vxge_hw_vpath_tti_ci_set()  local
226 	vp_reg = fifo->vp_reg;  in vxge_hw_vpath_tti_ci_set()
231 		val64 = readq(&vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);  in vxge_hw_vpath_tti_ci_set()
234 		writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);  in vxge_hw_vpath_tti_ci_set()
244 	writeq(val64, &ring->vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]);  in vxge_hw_vpath_dynamic_rti_ci_set()
257 	writeq(val64, &fifo->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]);  in vxge_hw_vpath_dynamic_tti_rtimer_set()
273 	writeq(val64, &ring->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]);  in vxge_hw_vpath_dynamic_rti_rtimer_set()
601 	struct vxge_hw_vpath_reg __iomem *vp_reg;  in __vxge_hw_vpath_alarm_process()  local
610 	vp_reg = vpath->vp_reg;  in __vxge_hw_vpath_alarm_process()
611 	alarm_status = readq(&vp_reg->vpath_general_int_status);  in __vxge_hw_vpath_alarm_process()
635 		val64 = readq(&vp_reg->xgmac_vp_int_status);  in __vxge_hw_vpath_alarm_process()
640 			val64 = readq(&vp_reg->asic_ntwk_vp_err_reg);  in __vxge_hw_vpath_alarm_process()
655 					&vp_reg->asic_ntwk_vp_err_mask);  in __vxge_hw_vpath_alarm_process()
676 					&vp_reg->asic_ntwk_vp_err_mask);  in __vxge_hw_vpath_alarm_process()
684 				&vp_reg->asic_ntwk_vp_err_reg);  in __vxge_hw_vpath_alarm_process()
696 		pic_status = readq(&vp_reg->vpath_ppif_int_status);  in __vxge_hw_vpath_alarm_process()
701 			val64 = readq(&vp_reg->general_errors_reg);  in __vxge_hw_vpath_alarm_process()
702 			mask64 = readq(&vp_reg->general_errors_mask);  in __vxge_hw_vpath_alarm_process()
739 					&vp_reg->general_errors_reg);  in __vxge_hw_vpath_alarm_process()
749 			val64 = readq(&vp_reg->kdfcctl_errors_reg);  in __vxge_hw_vpath_alarm_process()
750 			mask64 = readq(&vp_reg->kdfcctl_errors_mask);  in __vxge_hw_vpath_alarm_process()
784 					&vp_reg->kdfcctl_errors_reg);  in __vxge_hw_vpath_alarm_process()
795 		val64 = readq(&vp_reg->wrdma_alarm_status);  in __vxge_hw_vpath_alarm_process()
799 			val64 = readq(&vp_reg->prc_alarm_reg);  in __vxge_hw_vpath_alarm_process()
800 			mask64 = readq(&vp_reg->prc_alarm_mask);  in __vxge_hw_vpath_alarm_process()
835 					&vp_reg->prc_alarm_reg);  in __vxge_hw_vpath_alarm_process()
1983 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_enable()
1992 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_enable()
2020 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_disable()
2028 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_disable()
2054 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_bcast_enable()
2058 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_bcast_enable()
2086 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_enable()
2090 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_enable()
2119 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_disable()
2123 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_disable()
2171 	struct vxge_hw_vpath_reg __iomem *vp_reg = vpath->vp_reg;  in vxge_hw_vpath_msix_set()  local
2179 	writeq(val64, &vp_reg->interrupt_cfg0);  in vxge_hw_vpath_msix_set()
2183 			&vp_reg->interrupt_cfg2);  in vxge_hw_vpath_msix_set()
2189 				0, 32), &vp_reg->one_shot_vect0_en);  in vxge_hw_vpath_msix_set()
2192 				0, 32), &vp_reg->one_shot_vect1_en);  in vxge_hw_vpath_msix_set()
2195 				0, 32), &vp_reg->one_shot_vect2_en);  in vxge_hw_vpath_msix_set()
2386 				&ring->vp_reg->prc_rxd_doorbell);  in vxge_hw_vpath_poll_rx()