683 		t4_write_reg(adap, MYPF_REG(PL_PF_INT_CAUSE_A), v);  in t4_nondata_intr()
961 	t4_write_reg(adap, MYPF_REG(SGE_PF_GTS_A),  in cxgb4_enable_rx()
1123 	t4_write_reg(adap, is_t4(adap->params.chip) ?  in setup_sge_queues()
2197 	t4_write_reg(adap, ULP_RX_ISCSI_TAGMASK_A, tag_mask);  in cxgb4_iscsi_init()
2198 	t4_write_reg(adap, ULP_RX_ISCSI_PSZ_A, HPZ0_V(pgsz_order[0]) |  in cxgb4_iscsi_init()
2255 		t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A),  in cxgb4_sync_txq_pidx()
2442 		t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A),  in enable_txq_db()
2543 		t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A),  in sync_txq_pidx()
3746 		t4_write_reg(adapter, MPS_RX_VXLAN_TYPE_A, 0);  in cxgb_udp_tunnel_unset_port()
3750 		t4_write_reg(adapter, MPS_RX_GENEVE_TYPE_A, 0);  in cxgb_udp_tunnel_unset_port()
3789 		t4_write_reg(adapter, MPS_RX_VXLAN_TYPE_A,  in cxgb_udp_tunnel_set_port()
3794 		t4_write_reg(adapter, MPS_RX_GENEVE_TYPE_A,  in cxgb_udp_tunnel_set_port()
3965 		t4_write_reg(adap,  in setup_memwin_rdma()
3968 		t4_write_reg(adap,  in setup_memwin_rdma()
4222 	t4_write_reg(adap, TP_SHIFT_CNT_A, 0x64f8849);  in adap_init1()
4223 	t4_write_reg(adap, ULP_RX_TDDP_PSZ_A, HPZ0_V(PAGE_SHIFT - 12));  in adap_init1()
4224 	t4_write_reg(adap, TP_PIO_ADDR_A, TP_INGRESS_CONFIG_A);  in adap_init1()
4226 	t4_write_reg(adap, TP_PIO_DATA_A, v & ~CSUM_HAS_PSEUDO_HDR_F);  in adap_init1()
4230 	t4_write_reg(adap, TP_TX_MOD_QUEUE_REQ_MAP_A,  in adap_init1()
4244 		t4_write_reg(adap, TP_TX_MOD_QUEUE_WEIGHT0_A,  in adap_init1()
4249 		t4_write_reg(adap, TP_TX_MOD_CHANNEL_WEIGHT_A,  in adap_init1()
6799 		t4_write_reg(adapter, SGE_STAT_CFG_A, STATSOURCE_T5_V(7) |  in init_one()