Lines Matching refs:PMU

10 	tristate "ARM CCI PMU driver"
14 	  Support for PMU events monitoring on the ARM CCI (Cache Coherent
41 	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
45 	tristate "Arm CMN-600 PMU support"
48 	  Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
53 	bool "ARM PMU framework"
73 	tristate "ARM DynamIQ Shared Unit (DSU) PMU"
78 	  system, control logic. The PMU allows counting various events related
90 	bool "Qualcomm Technologies L2-cache PMU"
94 	  Provides support for the L2 cache performance monitor unit (PMU)
96 	  Adds the L2 cache PMU into the perf events subsystem for
100 	bool "Qualcomm Technologies L3-cache PMU"
104 	   Provides support for the L3 cache performance monitor unit (PMU)
106 	   Adds the L3 cache PMU into the perf events subsystem for
110 	tristate "Cavium ThunderX2 SoC PMU UNCORE"
115 	   The SoC has PMU support in its L3 cache controller (L3C) and
120         bool "APM X-Gene SoC PMU"
134 	tristate "Enable PMU support for the ARM DMC-620 memory controller"
137 	  Support for PMU events monitoring on the ARM DMC-620 memory