19   UINTN  DeviceBase,  in GetTpoCapability()  argument
26   L1ssCapabilities = MmioRead32 (DeviceBase + L1ssCapOffset + R_PCIE_EX_L1SCAP_OFFSET);  in GetTpoCapability()
39   UINTN  DeviceBase,  in GetTpo()  argument
46   L1ssControl2 = MmioRead32 (DeviceBase + L1ssCapOffset + R_PCIE_EX_L1SCTL2_OFFSET);  in GetTpo()
61   UINTN      DeviceBase,  in SetTpo()  argument
68   L1_2 = MmioRead32 (DeviceBase + L1ssCapOffset + R_PCIE_EX_L1SCTL1_OFFSET) & (BIT2 | BIT0);  in SetTpo()
69   MmioAnd32 (DeviceBase + L1ssCapOffset + R_PCIE_EX_L1SCTL1_OFFSET, (UINT32)(~ (BIT2 | BIT0)));  in SetTpo()
70 …MmioAndThenOr32 (DeviceBase + L1ssCapOffset + R_PCIE_EX_L1SCTL2_OFFSET, (UINT32)(~0xFB), (Tpo.Valu…  in SetTpo()
71   MmioOr32 (DeviceBase + L1ssCapOffset + R_PCIE_EX_L1SCTL1_OFFSET, L1_2);  in SetTpo()
116   UINTN DeviceBase;  in PcieFindCapId()  local
118   DeviceBase = MmPciBase (Bus, Device, Function);  in PcieFindCapId()
121   if ((MmioRead8 (DeviceBase + PCI_PRIMARY_STATUS_OFFSET) & EFI_PCI_STATUS_CAPABILITY) == 0x00) {  in PcieFindCapId()
130 …if ((MmioRead8 (DeviceBase + PCI_HEADER_TYPE_OFFSET) & HEADER_LAYOUT_CODE) == (HEADER_TYPE_CARDBUS…  in PcieFindCapId()
145     CapHeaderOffset = MmioRead8 (DeviceBase + CapHeaderOffset) & ((UINT8) ~(BIT0 | BIT1));  in PcieFindCapId()
147       CapHeaderId = MmioRead8 (DeviceBase + CapHeaderOffset);  in PcieFindCapId()
164       CapHeaderOffset = MmioRead8 (DeviceBase + CapHeaderOffset + 1) & ((UINT8) ~(BIT0 | BIT1));  in PcieFindCapId()
196   UINTN   DeviceBase;  in PcieFindExtendedCapId()  local
198   DeviceBase = MmPciBase (Bus, Device, Function);  in PcieFindExtendedCapId()
207     CapHeaderId = MmioRead16 (DeviceBase + CapHeaderOffset);  in PcieFindExtendedCapId()
216 …CapHeaderOffset = (MmioRead16 (DeviceBase + CapHeaderOffset + 2) >> 4) & ((UINT16) ~(BIT0 | BIT1));  in PcieFindExtendedCapId()
365   UINTN       DeviceBase;  in PcieSetClkreq()  local
370   DeviceBase = MmPciBase (EndPointBus, EndPointDevice, 0);  in PcieSetClkreq()
376   if (MmioRead8 (DeviceBase + PCI_HEADER_TYPE_OFFSET) & HEADER_TYPE_MULTI_FUNCTION) {  in PcieSetClkreq()
400     DeviceBase = MmPciBase (EndPointBus, EndPointDevice, FunctionIndex);  in PcieSetClkreq()
404     if ((MmioRead32 (DeviceBase + CapOffset + R_PCIE_LCAP_OFFSET) & B_PCIE_LCAP_CPM) == 0) {  in PcieSetClkreq()
428     DeviceBase = MmPciBase (EndPointBus, EndPointDevice, FunctionIndex);  in PcieSetClkreq()
429     MmioOr16 (DeviceBase + CapOffset + R_PCIE_LCTL_OFFSET, B_PCIE_LCTL_ECPM);  in PcieSetClkreq()
451   UINTN   DeviceBase;  in PcieMaxPayloadSize()  local
460   DeviceBase = MmPciBase (EndPointBus, EndPointDevice, 0);  in PcieMaxPayloadSize()
464   if (MmioRead8 (DeviceBase + PCI_HEADER_TYPE_OFFSET) & HEADER_TYPE_MULTI_FUNCTION) {  in PcieMaxPayloadSize()
477     DeviceBase = MmPciBase (EndPointBus, EndPointDevice, FunctionIndex);  in PcieMaxPayloadSize()
478     if (MmioRead16 (DeviceBase + PCI_VENDOR_ID_OFFSET) != MAX_UINT16) {  in PcieMaxPayloadSize()
492           DeviceBase + PcieCapOffset + R_PCIE_DCTL_OFFSET,  in PcieMaxPayloadSize()
500 …EndPointMaxPayload = MmioRead16 (DeviceBase + PcieCapOffset + R_PCIE_DCAP_OFFSET) & B_PCIE_DCAP_MP…  in PcieMaxPayloadSize()
538   UINTN   DeviceBase;  in PcieSetEoiFwdDisable()  local
554   DeviceBase = MmPciBase (EndPointBus, EndPointDevice, 0);  in PcieSetEoiFwdDisable()
558   if (MmioRead8 (DeviceBase + PCI_HEADER_TYPE_OFFSET) & HEADER_TYPE_MULTI_FUNCTION) {  in PcieSetEoiFwdDisable()
571     DeviceBase    = MmPciBase (EndPointBus, EndPointDevice, FunctionIndex);  in PcieSetEoiFwdDisable()
572     BaseClassCode = MmioRead8 (DeviceBase + PCI_CLASSCODE_OFFSET + 2);  in PcieSetEoiFwdDisable()
573     SubClassCode  = MmioRead8 (DeviceBase + PCI_CLASSCODE_OFFSET + 1);  in PcieSetEoiFwdDisable()
574     ProgInterface = MmioRead8 (DeviceBase + PCI_CLASSCODE_OFFSET);  in PcieSetEoiFwdDisable()
840   IN UINTN                              DeviceBase,  in ConfigureL1s()  argument
854       DeviceBase + L1SubstateExtCapOffset + R_PCIE_EX_L1SCTL1_OFFSET,  in ConfigureL1s()
864       DeviceBase + L1SubstateExtCapOffset + R_PCIE_EX_L1SCTL1_OFFSET,  in ConfigureL1s()
877     DeviceBase + L1SubstateExtCapOffset + R_PCIE_EX_L1SCTL1_OFFSET,  in ConfigureL1s()
887     DeviceBase + L1SubstateExtCapOffset + R_PCIE_EX_L1SCTL2_OFFSET,  in ConfigureL1s()
897     DeviceBase + L1SubstateExtCapOffset + R_PCIE_EX_L1SCTL1_OFFSET,  in ConfigureL1s()