Lines Matching defs:gpio_reg
19 struct gpio_reg { struct
20 u32 gplr; /* Pin Level Register - 0x0000 */
21 u32 pad0[2];
22 u32 gpdr; /* Pin Direction Register - 0x000C */
23 u32 pad1[2];
24 u32 gpsr; /* Pin Output Set Register - 0x0018 */
25 u32 pad2[2];
26 u32 gpcr; /* Pin Output Clear Register - 0x0024 */
27 u32 pad3[2];
28 u32 grer; /* Rising-Edge Detect Enable Register - 0x0030 */
29 u32 pad4[2];
30 u32 gfer; /* Falling-Edge Detect Enable Register - 0x003C */
31 u32 pad5[2];
32 u32 gedr; /* Edge Detect Status Register - 0x0048 */
33 u32 pad6[2];
34 u32 gsdr; /* Bitwise Set of GPIO Direction Register - 0x0054 */
35 u32 pad7[2];
36 u32 gcdr; /* Bitwise Clear of GPIO Direction Register - 0x0060 */
37 u32 pad8[2];
38 u32 gsrer; /* Bitwise Set of Rising-Edge Detect Enable
40 u32 pad9[2];
41 u32 gcrer; /* Bitwise Clear of Rising-Edge Detect Enable
43 u32 pad10[2];
44 u32 gsfer; /* Bitwise Set of Falling-Edge Detect Enable
46 u32 pad11[2];
47 u32 gcfer; /* Bitwise Clear of Falling-Edge Detect Enable
49 u32 pad12[2];
50 u32 apmask; /* Bitwise Mask of Edge Detect Register - 0x009C */