arm/dts/meson-gxbb.dtsi

10 #include <dt-bindings/clock/gxbb-clkc.h>
23 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
33 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
42 			clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
54 			clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
66 	clocks = <&clkc CLKID_AIU_GLUE>,
67 		 <&clkc CLKID_I2S_OUT>,
68 		 <&clkc CLKID_AOCLK_GATE>,
69 		 <&clkc CLKID_CTS_AMCLK>,
70 		 <&clkc CLKID_MIXER_IFACE>,
71 		 <&clkc CLKID_IEC958>,
72 		 <&clkc CLKID_IEC958_GATE>,
73 		 <&clkc CLKID_CTS_MCLK_I958>,
74 		 <&clkc CLKID_CTS_I958>;
274 		clocks = <&clkc CLKID_SPI>;
286 	clocks = <&xtal>, <&clkc CLKID_CLK81>;
291 	clocks = <&clkc CLKID_EFUSE>;
295 	clocks = <&clkc CLKID_ETH>,
296 		 <&clkc CLKID_FCLK_DIV2>,
297 		 <&clkc CLKID_MPLL2>,
298 		 <&clkc CLKID_FCLK_DIV2>;
314 	clocks = <&clkc CLKID_HDMI_PCLK>,
315 		 <&clkc CLKID_CLK81>,
316 		 <&clkc CLKID_GCLK_VENCI_INT0>;
321 	clkc: clock-controller {  label
322 		compatible = "amlogic,gxbb-clkc";
330 	clocks = <&clkc CLKID_RNG0>;
335 	clocks = <&clkc CLKID_I2C>;
339 	clocks = <&clkc CLKID_AO_I2C>;
343 	clocks = <&clkc CLKID_I2C>;
347 	clocks = <&clkc CLKID_I2C>;
353 	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
356 	assigned-clocks = <&clkc CLKID_GP0_PLL>;
738 	clocks = <&clkc CLKID_VPU>,
739 	         <&clkc CLKID_VAPB>;
747 	assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
748 			  <&clkc CLKID_VPU_0>,
749 			  <&clkc CLKID_VPU>, /* Glitch free mux */
750 			  <&clkc CLKID_VAPB_0_SEL>,
751 			  <&clkc CLKID_VAPB_0>,
752 			  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
753 	assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
755 				 <&clkc CLKID_VPU_0>,
756 				 <&clkc CLKID_FCLK_DIV4>,
758 				 <&clkc CLKID_VAPB_0>;
770 		 <&clkc CLKID_SAR_ADC>,
771 		 <&clkc CLKID_SAR_ADC_CLK>,
772 		 <&clkc CLKID_SAR_ADC_SEL>;
777 	clocks = <&clkc CLKID_SD_EMMC_A>,
778 		 <&clkc CLKID_SD_EMMC_A_CLK0>,
779 		 <&clkc CLKID_FCLK_DIV2>;
785 	clocks = <&clkc CLKID_SD_EMMC_B>,
786 		 <&clkc CLKID_SD_EMMC_B_CLK0>,
787 		 <&clkc CLKID_FCLK_DIV2>;
793 	clocks = <&clkc CLKID_SD_EMMC_C>,
794 		 <&clkc CLKID_SD_EMMC_C_CLK0>,
795 		 <&clkc CLKID_FCLK_DIV2>;
801 	clocks = <&clkc CLKID_HDMI_PCLK>,
802 		 <&clkc CLKID_CLK81>,
803 		 <&clkc CLKID_GCLK_VENCI_INT0>;
807 	clocks = <&clkc CLKID_SPICC>;
814 	clocks = <&clkc CLKID_SPI>;
818 	clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
833 	clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
838 	clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
849 	clocks = <&clkc CLKID_DOS_PARSER>,
850 		 <&clkc CLKID_DOS>,
851 		 <&clkc CLKID_VDEC_1>,
852 		 <&clkc CLKID_VDEC_HEVC>;